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    • 9. 发明授权
    • VLSI graphics display image buffer using logic enhanced pixel memory
cells
    • VLSI图形显示图像缓冲区使用逻辑增强像素存储单元
    • US4783649A
    • 1988-11-08
    • US408045
    • 1982-08-13
    • Henry FuchsJohn W. Poulton
    • Henry FuchsJohn W. Poulton
    • G06T17/00G09G5/42G09G1/16
    • G06T17/00G09G5/42
    • A VLSI graphics display image buffer which enables the graphics display system of Fuchs U.S. Pat. No. 4,590,465 to be economically realized. According to the present invention, the X and Y multiplier trees disclosed in Fuchs U.S. Pat. No. 4,590,465 can be combined into a single tree and connected to an IC memory grid of conventional design. Special memory chips of this design are then much like conventional RAM chips with only a small amount of additional logic circuitry. However, the standard grid of memory cells on such a chip is organized so that each row of memory cells corresponds to the different bits of the single pixel, whereas each column is the corresponding bit in every pixel. Each output of the X-Y multiplier tree is then available to the circuitry associated with a particular pixel and its row of memory cells. These VLSI chips can be organized so that the system can be implemented by a set of identical chips that need no special interconnection. All control and data input signals may be broadcasted to the chips by simulating on each chip the top parts of the X-Y multiplier tree. In other words, the simulated tree levels are loaded with the high order bits of the X and Y addresses of the screen area represented by the pixels of the particular chip.
    • 一种VLSI图形显示图像缓冲器,其使得Fuchs美国专利的图形显示系统成为可能。 经济实现的第4,590,465号。 根据本发明,Fuchs的美国专利No. 第4,590,465号可以组合成一棵树,并连接到常规设计的IC存储网格。 这种设计的特殊存储器芯片就像传统的RAM芯片,只有少量附加的逻辑电路。 然而,这种芯片上的存储器单元的标准网格被组织成使得每行存储器单元对应于单个像素的不同位,而每列是每个像素中的相应位。 然后X-Y乘法器树的每个输出可用于与特定像素及其行存储器单元相关联的电路。 这些VLSI芯片可以被组织使得系统可以由不需要特殊互连的一组相同的芯片来实现。 可以通过在每个芯片上模拟X-Y乘法器树的顶部部分来将所有控制和数据输入信号广播到芯片。 换句话说,模拟树级别由特定芯片的像素表示的屏幕区域的X和Y地址的高位比特加载。