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    • 4. 发明申请
    • Configurable Light Emitting System
    • 可配置发光系统
    • US20100142198A1
    • 2010-06-10
    • US12331383
    • 2008-12-09
    • Chih-Wen Yang
    • Chih-Wen Yang
    • F21V21/00F21K7/00
    • F21S2/005F21V21/08F21V21/088F21V21/35F21V23/06F21Y2115/10H05K1/0286H05K1/142H05K2201/09963H05K2201/10106H05K2201/10325
    • A configurable light emitting system includes a plurality of light emitting units, at least a first external conductor, and at least a second external conductor. Each of the light emitting units includes an anode, a cathode, a first electrical contact electrically connected to the anode, and a second electrical contact electrically connected to the cathode. The first external conductor is electrically connected to the first electrical contact of each of the light emitting unit, and configured to supply a positive voltage thereto. The second external conductor is electrically connected to the second electrical contact of each of the light emitting unit, and configured to supply a negative voltage thereto. The plurality of the light emitting units are configured as a tile structure or a brick structure, and are electrically connected together through the first external conductor and second external conductor.
    • 可配置的发光系统包括多个发光单元,至少第一外部导体和至少第二外部导体。 每个发光单元包括阳极,阴极,电连接到阳极的第一电触点和电连接到阴极的第二电触点。 第一外部导体电连接到每个发光单元的第一电触点,并且被配置为向其提供正电压。 第二外部导体电连接到每个发光单元的第二电触点,并且被配置为向其提供负电压。 多个发光单元被构造为瓦片结构或砖结构,并且通过第一外部导体和第二外部导体电连接在一起。
    • 9. 发明授权
    • Level shifter with reduced power consumption and low propagation delay
    • 电平移位器具有降低的功耗和低传播延迟
    • US07847611B2
    • 2010-12-07
    • US12357179
    • 2009-01-21
    • Chih-Wen YangSheng-Hua Chen
    • Chih-Wen YangSheng-Hua Chen
    • H03L5/00
    • H03K19/018521
    • A level shifter includes a Not gate coupled to a signal input and operable between a first high level and a low level; a first PMOS transistor coupled to a second voltage source and a control end; a first NMOS transistor coupled to the first PMOS transistor, a Not-gate output end and a reference voltage; and a control circuit coupled to the signal input, the Not-gate output end and the second voltage source. When the signal input and the Not-gate output end are at the first high level and the low level, respectively, the first PMOS transistor is turned on so that the signal output is at a second high level; and when the signal input and the Not-gate output end are switched contrarily, the first PMOS transistor is turned off and the signal output is at the low level.
    • 电平移位器包括耦合到信号输入并可在第一高电平和低电平之间操作的“否”门; 耦合到第二电压源和控制端的第一PMOS晶体管; 耦合到第一PMOS晶体管的第一NMOS晶体管,非栅极输出端和参考电压; 以及耦合到信号输入,非栅极输出端和第二电压源的控制电路。 当信号输入和非栅极输出端分别处于第一高电平和低电平时,第一PMOS晶体管导通,使得信号输出处于第二高电平; 并且当信号输入和非栅极输出端相反地切换时,第一PMOS晶体管被截止并且信号输出处于低电平。