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1. 发明授权

US6037206A Method of fabricating a capacitor of a dynamic random access memory 失效
标题翻译：制造动态随机存取存储器的电容器的方法
公开(公告)号：US6037206A
公开(公告)日：2000-03-14
申请号：US080116
申请日：1998-05-15
申请人： Kuo-Tai Huang , Hsi-Ta Chuang , Tri-Rung Yew
发明人： Kuo-Tai Huang , Hsi-Ta Chuang , Tri-Rung Yew
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10852 , H01L27/10817
摘要： A method for fabricating a capacitor of a DRAM includes a lower conductive layer of the capacitor is formed over a substrate and is electrically coupled to an interchangeable source/drain region through a contact window penetrating an insulating layer. Then performing etching process on the lower conductive layer so as to form a fence-like plate with a higher height than a thickness of the lower conductive layer and adhere to the lower conductive layer. Next a media conductive layer is formed over the lower conductive layer and the fence-like plate. Then the technology of etching back is utilized to round the sharp area on the tip of the fence-like plate. The lower conductive layer and the media conductive layer are electrically coupled together as a lower electrode. Then, a dielectric thin film is formed over the media conductive layer and an upper electrode is formed over the dielectric thin film. Therefore, a MIM capacitor according to the preferred embodiment of the invention is formed.
摘要翻译：一种用于制造DRAM电容器的方法包括：电容器的下导电层形成在衬底上，并通过穿透绝缘层的接触窗电耦合到可互换的源/漏区。然后对下导电层进行蚀刻处理，以形成具有比下导电层的厚度高的高度的栅栏状的板，并粘附到下导电层。接下来，在下导电层和栅栏状板上形成介质导电层。然后，利用蚀刻技术来围绕栅栏状板的尖端上的尖锐区域。下导电层和介质导电层作为下电极电耦合在一起。然后，在介质导电层上形成电介质薄膜，在电介质薄膜上方形成上电极。因此，形成根据本发明的优选实施例的MIM电容器。

2. 发明授权

US06479344B2 Method of fabricating DRAM capacitor 失效
标题翻译：制造DRAM电容的方法
公开(公告)号：US06479344B2
公开(公告)日：2002-11-12
申请号：US09542715
申请日：2000-04-04
申请人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L218242
CPC分类号： H01L28/75 , H01L21/28568 , H01L21/3211 , H01L27/10852 , H01L28/55
摘要： A method of fabricating a DRAM capacitor uses tungsten nitride in the process of forming a capacitor. The structure of the capacitor is simple and the process is easily executed. Furthermore, the invention provides a method of forming tungsten nitride, comprising a step of implanting nitrogen into a tungsten silicide layer and a step of executing a rapid thermal process under ammonia gas to form a tungsten nitride layer on the surface of the tungsten silicide layer. The method of fabricating a DRAM capacitor comprises forming the tungsten silicide layer after forming a part smaller than a bottom electrode of the capacitor from doped polysilicon and forming tungsten nitride on the surface of the tungsten nitride layer.
摘要翻译：制造DRAM电容器的方法在形成电容器的过程中使用氮化钨。电容器的结构简单，易于执行。此外，本发明提供了一种形成氮化钨的方法，包括将氮气注入到硅化钨层中的步骤以及在氨气下执行快速热处理以在硅化钨层的表面上形成氮化钨层的步骤。制造DRAM电容器的方法包括在从掺杂多晶硅形成小于电容器的底部电极的部分之后形成硅化钨层，并在氮化钨层的表面上形成氮化钨。

3. 发明授权

US06221712B1 Method for fabricating gate oxide layer 失效
标题翻译：栅极氧化层的制造方法
公开(公告)号：US06221712B1
公开(公告)日：2001-04-24
申请号：US09385805
申请日：1999-08-30
申请人： Kuo-Tai Huang , Michael W C Huang , Tri-Rung Yew
发明人： Kuo-Tai Huang , Michael W C Huang , Tri-Rung Yew
IPC分类号： B32B1900
CPC分类号： H01L21/28194 , C23C16/405 , H01L21/28088 , H01L21/31604 , H01L29/4966 , H01L29/517
摘要： A method for fabricating a gate structure. The method involves providing a substrate, followed by forming a nitride region on a surface of the substrate. With a Tantalum (Ta)-based organic compound and a Titanium (Ti)-based organic compound serving as precursors, an organic metal chemical vapor deposition (OMCVD) is performed, so that a Ta2−xTixO5 dielectric layer is formed on the substrate. A barrier layer, a conducting layer, and an anti-reflection (AR) layer are then formed in sequence on the Ta2−xTixO5 dielectric layer. Subsequently, the AR layer, the conducting layer, the barrier layer, and the Ta2−xTixO5 dielectric layer are defined to form a gate structure on the substrate of the nitride region. The Ta-based organic compound in this case may include a Ta-alkoxide compound, whereas the Ti-based organic compound may include a Ti-alkoxide compound or a Ti-amide compound.
摘要翻译：一种用于制造栅极结构的方法。该方法包括提供衬底，随后在衬底的表面上形成氮化物区域。使用钽（Ta）基有机化合物和作为前体的钛（Ti）基有机化合物，进行有机金属化学气相沉积（OMCVD），从而在衬底上形成Ta2-xTixO5电介质层。然后依次在Ta2-xTixO5电介质层上形成阻挡层，导电层和抗反射（AR）层。随后，将AR层，导电层，阻挡层和Ta2-xTixO5电介质层定义为在氮化物区域的衬底上形成栅极结构。在这种情况下，Ta类有机化合物可以包括Ta-醇盐化合物，而Ti基有机化合物可以包括Ti-醇盐化合物或Ti-酰胺化合物。

4. 发明授权

US6087262A Method for manufacturing shallow trench isolation structure 有权
标题翻译：浅沟槽隔离结构的制造方法
公开(公告)号：US6087262A
公开(公告)日：2000-07-11
申请号：US189140
申请日：1998-11-09
申请人： Gwo-Shii Yang , Kuo-Tai Huang , Tri-Rung Yew , Water Lur
发明人： Gwo-Shii Yang , Kuo-Tai Huang , Tri-Rung Yew , Water Lur
IPC分类号： H01L21/3105 , H01L21/762 , H01L21/00
CPC分类号： H01L21/31053 , H01L21/76229
摘要： A method for manufacturing shallow trench isolation structure includes the steps of fabricating a self-aligned silicon nitride mask over the trench region so that a kink effect due to the misalignment of mask during a conventional mask-making process can be avoided. Moreover, the silicon nitride mask requires fewer steps and less complicated operations to construct than a conventional reverse tone mask.
摘要翻译：用于制造浅沟槽隔离结构的方法包括以下步骤：在沟槽区域上制造自对准氮化硅掩模，从而可以避免在常规掩模制造工艺期间由于掩模的未对准而产生的扭结效应。此外，与传统的反向色调掩模相比，氮化硅掩模需要更少的步骤和更少的复杂操作来构造。

5. 发明授权

US06403411B1 Method for manufacturing lower electrode of DRAM capacitor 失效
标题翻译：制造DRAM电容器下电极的方法
公开(公告)号：US06403411B1
公开(公告)日：2002-06-11
申请号：US09208601
申请日：1998-12-08
申请人： Chih-Hsun Chu , Horng-Nan Chern , Kevin Lin , Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Chih-Hsun Chu , Horng-Nan Chern , Kevin Lin , Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L218234
CPC分类号： H01L28/84 , H01L21/76895
摘要： A method for manufacturing the lower electrode of a DRAM capacitor. The method includes depositing polysilicon instead of amorphous silicon to form the lower electrode. Because polysilicon has a higher depositing temperature, it has a higher depositing rate capable of shortening depositing time. After forming the polysilicon lower electrode, the upper portion of the polysilicon layer is transformed into an amorphous layer by bombarding the polysilicon layer with ions to damage its internal structure. Eventually, hemispherical grain silicon is able to grow over the lower electrode, thereby increasing its surface area.
摘要翻译：一种用于制造DRAM电容器的下电极的方法。该方法包括沉积多晶硅而不是非晶硅以形成下电极。由于多晶硅具有较高的沉积温度，因此具有更高的沉积速率，能够缩短沉积时间。在形成多晶硅下电极之后，通过用离子轰击多晶硅层将多晶硅层的上部转变成非晶层，以破坏其内部结构。最终，半球形晶粒硅能够在下电极上生长，从而增加其表面积。

6. 发明授权

US06251783B1 Method of manufacturing shallow trench isolation 失效
标题翻译：制造浅沟槽隔离的方法
公开(公告)号：US06251783B1
公开(公告)日：2001-06-26
申请号：US09189847
申请日：1998-11-12
申请人： Tri-Rung Yew , Kuo-Tai Huang , Gwo-Shii Yang , Water Lur
发明人： Tri-Rung Yew , Kuo-Tai Huang , Gwo-Shii Yang , Water Lur
IPC分类号： H01L21302
CPC分类号： H01L21/31053 , H01L21/76229
摘要： A method of manufacturing shallow trench isolation structures. The method includes the steps of depositing insulating material into the trench of a substrate to form an insulation layer. The substrate has a plurality of active regions, each occupying a different area and having different sizes. In addition, there is a silicon nitride layer on top of each active region. Thereafter, a photoresist layer is then deposited over the insulation layer. Next, a portion of the photoresist layer is etched back to expose a portion of the oxide layer so that the remaining photoresist material forms a cap layer over the recessed area of the insulation layer. Subsequently, using the photoresist cap layer as a mask, the insulation layer is etched to remove a portion of the exposed oxide layer, thereby forming trenches within the oxide layer. After that, the photoresist cap layer is removed. Finally, a chemical-mechanical polishing operation is carried out to polish the insulation layer until the silicon nitride layer is exposed.
摘要翻译：制造浅沟槽隔离结构的方法。该方法包括以下步骤：将绝缘材料沉积到衬底的沟槽中以形成绝缘层。基板具有多个活性区域，每个活性区域占据不同的区域并且具有不同的尺寸。此外，在每个有源区的顶部有一个氮化硅层。此后，然后将光致抗蚀剂层沉积在绝缘层上。接下来，将光致抗蚀剂层的一部分回蚀刻以暴露氧化物层的一部分，使得剩余的光致抗蚀剂材料在绝缘层的凹陷区域上形成覆盖层。随后，使用光致抗蚀剂覆盖层作为掩模，蚀刻绝缘层以去除暴露的氧化物层的一部分，从而在氧化物层内形成沟槽。之后，去除光致抗蚀剂覆盖层。最后，进行化学机械抛光操作以抛光绝缘层，直到暴露氮化硅层。

7. 发明授权

US06251769B1 Method of manufacturing contact pad 失效
标题翻译：制造接触垫的方法
公开(公告)号：US06251769B1
公开(公告)日：2001-06-26
申请号：US09347180
申请日：1999-07-02
申请人： Tri-Rung Yew , Kuo-Tai Huang , Water Lur
发明人： Tri-Rung Yew , Kuo-Tai Huang , Water Lur
IPC分类号： H01L214763
CPC分类号： H01L24/03 , H01L21/02532 , H01L21/02576 , H01L21/0262 , H01L21/02639 , H01L21/28525 , H01L21/76814 , H01L21/76879 , H01L21/76895 , H01L21/76897 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01018 , H01L2924/01033 , H01L2924/01082 , H01L2924/14
摘要： A method of manufacturing a contact pad. A substrate having a source/drain region formed therein is provided. A dielectric layer is formed over the substrate. An opening is formed in the dielectric layer and exposes the source/drain region. A selective epitaxial process is performed to form a contact pad in the opening, wherein a top of the contact pad extends onto a surface of the dielectric layer.
摘要翻译：一种制造接触垫的方法。提供其中形成有源极/漏极区的衬底。介电层形成在衬底上。在电介质层中形成开口并使源极/漏极区域露出。执行选择性外延工艺以在开口中形成接触焊盘，其中接触焊盘的顶部延伸到介电层的表面上。

8. 发明授权

US06218238B1 Method of fabricating DRAM capacitor 有权
标题翻译：制造DRAM电容的方法
公开(公告)号：US06218238B1
公开(公告)日：2001-04-17
申请号：US09172458
申请日：1998-10-14
申请人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L218242
CPC分类号： H01L28/75 , H01L21/28568 , H01L21/3211 , H01L27/10852 , H01L28/55
摘要： A method of fabricating a DRAM capacitor uses tungsten nitride in the process of forming a capacitor. The structure of the capacitor is simple and the process is easily executed. Furthermore, the invention provides a method of forming tungsten nitride, comprising a step of implanting nitrogen into a tungsten silicide layer and a step of executing a rapid thermal process under ammonia gas to form a tungsten nitride layer on the surface of the tungsten silicide layer. The method of fabricating a DRAM capacitor comprises forming the tungsten silicide layer after forming a part smaller than a bottom electrode of the capacitor from doped polysilicon and forming tungsten nitride on the surface of the tungsten nitride layer.
摘要翻译：制造DRAM电容器的方法在形成电容器的过程中使用氮化钨。电容器的结构简单，易于执行。此外，本发明提供了一种形成氮化钨的方法，包括将氮气注入到硅化钨层中的步骤以及在氨气下执行快速热处理以在硅化钨层的表面上形成氮化钨层的步骤。制造DRAM电容器的方法包括在从掺杂多晶硅形成小于电容器的底部电极的部分之后形成硅化钨层，并在氮化钨层的表面上形成氮化钨。

9. 发明授权

US6146941A Method for fabricating a capacitor in a semiconductor device 失效
标题翻译：在半导体器件中制造电容器的方法
公开(公告)号：US6146941A
公开(公告)日：2000-11-14
申请号：US128221
申请日：1998-08-03
申请人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
发明人： Kuo-Tai Huang , Wen-Yi Hsieh , Tri-Rung Yew
IPC分类号： H01L27/108 , H01L21/02 , H01L21/8242 , H01L21/8244 , H01L21/20 , H01L21/44 , H01L21/4763
CPC分类号： H01L27/10852 , H01L28/82
摘要： A fabricating method of a capacitor includes two gates and a commonly used source/drain region formed on a substrate. Then, a process of sell align contact has been applied to make a pitted self align contact window (PSACW) to partly expose the commonly used source/drain region. Then an glue/barrier layer and a lower electrode of the capacitor are formed over the PSACW. Then a dielectric thin film with a material having high dielectric constant is formed over the lower electrode. Then, an upper electrode is formed over the dielectric thin film to complete a capacitor, which has a structure of metal insulator metal with a shape like the PSACW.
摘要翻译：电容器的制造方法包括形成在基板上的两个栅极和常用的源极/漏极区域。然后，已经应用了销售对齐接触的过程，以形成凹陷的自对准接触窗口（PSACW）以部分地暴露常用的源极/漏极区域。然后在PSACW上形成电容器的胶/阻挡层和下电极。然后在下部电极上形成具有高介电常数的材料的电介质薄膜。然后，在电介质薄膜的上方形成上部电极，形成电容器，该电容器具有像PSACW的形状的金属绝缘体金属的结构。

10. 发明授权

US6133086A Fabrication method of a tantalum pentoxide dielectric layer for a DRAM capacitor 失效
标题翻译：用于DRAM电容器的五氧化二钽介电层的制造方法
公开(公告)号：US6133086A
公开(公告)日：2000-10-17
申请号：US339154
申请日：1999-06-24
申请人： Kuo-Tai Huang , Tri-Rung Yew
发明人： Kuo-Tai Huang , Tri-Rung Yew
IPC分类号： H01L21/02 , H01L21/316 , H01L21/8242 , H01L21/20 , H01L21/31 , H01L21/469 , H01L27/108
CPC分类号： H01L21/31637 , H01L21/31604 , H01L28/40
摘要： A method of fabricating a dielectric layer for a dynamic random access memory capacitor is described in which a tantalum pentoxide layer is deposited on the polysilicon storage electrode, followed by a two-step treatment on the tantalum pentoxide layer. The first treatment step includes a remote oxygen plasma or an ultraviolet-ozone treatment, followed by a spike annealing second treatment step.
摘要翻译：描述了制造用于动态随机存取存储器电容器的介电层的方法，其中在多晶硅存储电极上沉积五氧化二钽层，然后在五氧化二钽层上进行两步处理。第一处理步骤包括远程氧等离子体或紫外 - 臭氧处理，随后是尖峰退火第二处理步骤。

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