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    • 1. 发明授权
    • High efficiency thin film inductor
    • 高效薄膜电感
    • US06373369B2
    • 2002-04-16
    • US09839927
    • 2001-04-23
    • Kuo-Ching HuangJin-Yuan LeeTse-Liang Ying
    • Kuo-Ching HuangJin-Yuan LeeTse-Liang Ying
    • H01F500
    • H01F5/003
    • An improved thin film inductor design is described. A spiral geometry is used to which has been added a core of high permeability material located at the center of the spiral. If the high permeability material is a conductor, care must be taken to avoid any contact between the core and the spiral. If a dielectric ferromagnetic material is used, this constraint is removed from the design. Several other embodiments are shown in which, in addition to the high permeability core, provide low reluctance paths for the structure. In one case this takes the form of a frame of ferromagnetic material surrounding the spiral while in a second case it has the form of a hollow square located directly above the spiral.
    • 描述了改进的薄膜电感器设计。 使用螺旋几何形状,其中已经添加了位于螺旋中心的高磁导率材料的核心。 如果高导磁率材料是导体,则必须注意避免芯和螺旋之间的任何接触。 如果使用介电铁磁材料,则从设计中去除该约束。 示出了其中除了高磁导率芯之外还提供用于结构的低磁阻路径的其它实施例。 在一种情况下,这采取围绕螺旋的铁磁材料框架的形式,而在第二种情况下,其具有直接位于螺旋上方的中空正方形的形式。
    • 3. 发明授权
    • High efficiency thin film inductor
    • 高效薄膜电感
    • US06278352B1
    • 2001-08-21
    • US09359892
    • 1999-07-26
    • Kuo-Ching HuangJin-Yuan LeeTse-Liang Ying
    • Kuo-Ching HuangJin-Yuan LeeTse-Liang Ying
    • H01F500
    • H01F5/003
    • An improved thin film inductor design is described. A spiral geometry is used to which has been added a core of high permeability material located at the center of the spiral. If the high permeability material is a conductor, care must be taken to avoid any contact between the core and the spiral. If a dielectric ferromagnetic material is used, this constraint is removed from the design. Several other embodiments are shown in which, in addition to the high permeability core, provide low reluctance paths for the structure. In one case this takes the form of a frame of ferromagnetic material surrounding the spiral while in a second case it has the form of a hollow square located directly above the spiral.
    • 描述了改进的薄膜电感器设计。 使用螺旋几何形状,其中已经添加了位于螺旋中心的高磁导率材料的核心。 如果高导磁率材料是导体,则必须注意避免芯和螺旋之间的任何接触。 如果使用介电铁磁材料,则从设计中去除该约束。 示出了其中除了高磁导率芯之外还提供用于结构的低磁阻路径的其它实施例。 在一种情况下,这采取围绕螺旋的铁磁材料框架的形式,而在第二种情况下,其具有直接位于螺旋上方的中空正方形的形式。
    • 4. 发明授权
    • Method for fabricating a self aligned contact which eliminates the key hole problem using a two step contact deposition
    • 用于制造自对准接触的方法,其消除使用两步接触沉积的键孔问题
    • US06174802B1
    • 2001-01-16
    • US09342042
    • 1999-06-28
    • Kuo-Ching HuangTse-Liang YingWen-Chuan ChiangMin-Hsiung Chiang
    • Kuo-Ching HuangTse-Liang YingWen-Chuan ChiangMin-Hsiung Chiang
    • H01L214763
    • H01L21/76897
    • A method for forming a self aligned contact without key holes using a two step contact deposition. The process begins by providing a semiconductor structure having conductive structures (such as bit lines) thereover with sidewalls and having a contact area adjacent to the conductive structures. The conductive structures comprise at least one conductive layer with a hard mask thereover. A spacer layer is formed over the hard mask and the substrate structure and anisotropically etched to form sidewall spacers on the sidewalls of the conductive structure. A second dielectric (IPO) layer is formed over the sidewall spacers, the hard mask, and the substrate structure, whereby the second dielectric layer has a keyhole. A contact opening is formed in the second dielectric layer over the contact area. A first contact layer having poor step coverage is formed in the contact openings and over the second dielectric layer, thereby plugging the keyhole without filling it. A second contact layer is formed over the first contact layer.
    • 使用两步接触沉积形成无键孔的自对准接触的方法。 该过程开始于提供具有导电结构(例如位线)的半导体结构,其具有侧壁并且具有与导电结构相邻的接触区域。 导电结构包括至少一个具有硬掩模的导电层。 在硬掩模和衬底结构之上形成间隔层,并且各向异性蚀刻以在导电结构的侧壁上形成侧壁间隔物。 在侧壁间隔物,硬掩模和基板结构上方形成第二电介质层(IPO),由此第二介电层具有锁孔。 在接触区域上的第二电介质层中形成接触开口。 在接触开口和第二电介质层上形成具有差的台阶覆盖率的第一接触层,从而在不填充锁孔的情况下封闭钥匙孔。 在第一接触层上形成第二接触层。
    • 5. 发明授权
    • Method for fabricating a self aligned contact which eliminates the key hole problem using a two step spacer deposition
    • 用于制造自对准接触的方法,其消除使用两步间隔物沉积的键孔问题
    • US06214715B1
    • 2001-04-10
    • US09349841
    • 1999-07-08
    • Kuo-Ching HuangTse-Liang YingWen-Chuan Chiang
    • Kuo-Ching HuangTse-Liang YingWen-Chuan Chiang
    • H01L2144
    • H01L27/10855H01L21/76897H01L27/10885H01L28/91H01L28/92
    • This invention provides a method for forming a self aligned contact without key holes using a two step sidewall spacer deposition. The process begins by providing a semiconductor structure having a device layer, a first inter poly oxide layer (IPO-1), and a conductive structure (such as a bit line) thereover, and having a contact area on the device layer adjacent to the conductive structure. The semiconductor structure can further include an optional etch stop layer overlying the first inter poly oxide layer. The conductive structure comprises at least one conductive layer with a hard mask thereover. A first spacer layer is formed over the hard mask and the IPO-1 layer and anisotropically etched to form first sidewall spacers on the sidewalls of the conductive structure up to a level above the bottom of the hard mask and below the level of the top of the hard mask such that the profile of the first sidewall spacers are not concave at any point. A second spacer layer is formed over the first sidewall spacers and anisotropically etched to form second sidewall spacers, having a profile that is not concave at any point. A second inter poly oxide layer is formed over the second sidewall spacers, the hard mask, and the IPO-1 layer, whereby the second inter poly oxide layer is free from key holes. A contact opening is formed in the second inter poly oxide layer and the first inter poly oxide layer over the contact area. A contact plug is formed in the contact openings.
    • 本发明提供一种用于使用两步侧壁间隔物沉积形成无键孔的自对准接触的方法。 该过程开始于提供具有器件层,第一多晶硅氧化物层(IPO-1)和导电结构(例如位线)的半导体结构,并且在与其相邻的器件层上具有接触区域 导电结构。 半导体结构还可以包括覆盖在第一多晶硅氧化物层上的任选的蚀刻停止层。 导电结构包括至少一个具有硬掩模的导电层。 在硬掩模和IPO-1层上形成第一间隔层,并且各向异性蚀刻以在导电结构的侧壁上形成直到硬掩模的底部以上的水平并且低于 硬掩模,使得第一侧壁隔片的轮廓在任何点都不是凹的。 第二间隔层形成在第一侧壁间隔物上并且各向异性蚀刻以形成第二侧壁间隔物,其具有在任何点处不凹的轮廓。 在第二侧壁间隔物,硬掩模和IPO-1层上形成第二多晶硅氧化物层,由此第二多晶氧化物层没有键孔。 在接触区域上的第二多晶氧化物层和第一多晶氧化物层中形成接触开口。 在接触开口中形成接触塞。