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1. 发明申请

US20110214730A1 DYE-SENSITIZED SOLAR CELL 审中-公开
标题翻译：透明的太阳能电池
公开(公告)号：US20110214730A1
公开(公告)日：2011-09-08
申请号：US13038508
申请日：2011-03-02
申请人： Kunpei Kobayashi , Mikio Baba , Norihiro Arai
发明人： Kunpei Kobayashi , Mikio Baba , Norihiro Arai
IPC分类号： H01L31/0224 , H01L31/0236
CPC分类号： H01G9/2031 , Y02E10/542
摘要： A dye-sensitized solar cell includes a first electrode, a second electrode, an electron-collector/dye layer, and an electron donor. The second electrode faces the first electrode. The electron-collector/dye layer provided on the first electrode includes an electron collector and dye. The electron collector includes first electron collector grains and second electron collector grains. The first electron collector grains have a diameter or diameters within a first diameter range and the second electron collector grains have a diameter or diameters within a second diameter range. A minimum value of the second diameter range is greater than a maximum value of the first diameter range. The electron donor is provided between the electron-collector/dye layer and the second electrode.
摘要翻译：染料敏化太阳能电池包括第一电极，第二电极，电子收集器/染料层和电子给体。第二电极面对第一电极。设置在第一电极上的电子收集器/染料层包括电子收集器和染料。电子收集器包括第一电子收集器晶粒和第二电子收集器晶粒。第一电子收集器晶粒具有在第一直径范围内的直径或直径，并且第二电子收集器晶粒具有在第二直径范围内的直径或直径。第二直径范围的最小值大于第一直径范围的最大值。电子给体被提供在电子收集器/染料层和第二电极之间。

2. 发明授权

US06313521B1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US06313521B1
公开(公告)日：2001-11-06
申请号：US09433112
申请日：1999-11-03
申请人： Mikio Baba
发明人： Mikio Baba
IPC分类号： H01L2302
CPC分类号： H01L23/4334 , H01L21/563 , H01L23/10 , H01L23/49531 , H01L23/642 , H01L24/48 , H01L2224/05568 , H01L2224/05573 , H01L2224/05599 , H01L2224/056 , H01L2224/16225 , H01L2224/32225 , H01L2224/32245 , H01L2224/48247 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/854 , H01L2924/00014 , H01L2924/01322 , H01L2924/07802 , H01L2924/12044 , H01L2924/15311 , H01L2924/16195 , H01L2924/181 , H01L2924/19041 , H01L2924/19105 , H01L2924/19107 , H01L2924/3025 , H01L2924/00 , H01L2924/00012 , H01L2224/45015 , H01L2924/207 , H01L2224/45099
摘要： A semiconductor device having one or more semiconductor chips and chip components and a manufacturing method. In the semiconductor device, electrical short of the chip components and the like can be effectively avoided, and break away of the chip components from a substrate can be avoided. The semiconductor device comprises: one or more semiconductor chips each of which is flip chip bonded at a first surface thereof to the substrate; at least one chip components mounted on the substrate and in the proximity of the semiconductor chips; insulating underfill resin which covers the chip components and which fills at least part of a portion between the first surface of each of the semiconductor chips and the substrate; and a lid member which is bonded to a second surface of each of the semiconductor devices opposite to the first surface, via conductive adhesive resin.
摘要翻译：具有一个或多个半导体芯片和芯片部件的半导体器件和制造方法。在半导体装置中，能够有效地避免芯片部件等的短路，能够避免芯片部件脱离基板。半导体器件包括：一个或多个半导体芯片，每个半导体芯片在其第一表面处被倒装芯片结合到衬底; 至少一个芯片部件安装在基板上并且在半导体芯片附近; 绝缘底部填充树脂，其覆盖芯片部件并且填充每个半导体芯片的第一表面和基板之间的至少一部分部分; 以及通过导电性粘合树脂与每个所述半导体器件与所述第一表面相对的第二表面接合的盖构件。

3. 发明授权

US6046077A Semiconductor device assembly method and semiconductor device produced by the method 有权
标题翻译：半导体装置组装方法和半导体装置制造方法
公开(公告)号：US6046077A
公开(公告)日：2000-04-04
申请号：US222992
申请日：1998-12-30
申请人： Mikio Baba
发明人： Mikio Baba
IPC分类号： H01L21/60 , H01L21/56 , H01L23/28 , H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L24/29 , H01L21/563 , H01L2224/16225 , H01L2224/32225 , H01L2224/73203 , H01L2224/73204 , H01L2224/73253 , H01L2224/83102 , H01L2224/92125 , H01L2224/92225 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01023 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01082 , H01L2924/15311 , H01L2924/16152 , H01L2924/16195 , H01L2924/3511
摘要： A method of assembling a semiconductor device dissipates the stress of hardening an underfill resin injected between the wiring board and a semiconductor chip mounted on the wiring board. The underfill resin and a sealing member bonding resin are simultaneously hardened. Alternatively, a sealing space sealed by the sealing member is filled with the underfill resin.
摘要翻译：组装半导体器件的方法消散了注入到布线板和安装在布线板上的半导体芯片之间的底部填充树脂硬化的应力。底部填充树脂和密封构件接合树脂同时硬化。或者，由密封构件密封的密封空间填充有底部填充树脂。

4. 发明授权

US5742477A Multi-chip module 失效
标题翻译：多芯片模块
公开(公告)号：US5742477A
公开(公告)日：1998-04-21
申请号：US676722
申请日：1996-07-08
申请人： Mikio Baba
发明人： Mikio Baba
IPC分类号： H01L25/18 , H01L25/10 , H01L25/11 , H01L25/16 , H05K1/00 , H05K1/14 , H05K1/18 , H05K7/20
CPC分类号： H01L25/165 , H01L25/105 , H01L2224/16 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/49109 , H01L2225/107 , H01L2225/1094 , H01L2924/01079 , H01L2924/15312 , H01L2924/1532 , H01L2924/16195 , H01L2924/19041 , H05K1/0284 , H05K1/144 , H05K1/181
摘要： A multi-chip module includes an insulating board, a semiconductor chip, a plurality of carriers, and semiconductor devices. The insulating board has a recess portion formed in a central portion of a lower surface. A wiring pattern is formed on the insulating board. The semiconductor chip is mounted in the recess portion in the insulating board. Each carrier is mounted on the upper surface of the insulating board and has a leg portion with a side-surface electrode formed on a side surface. The resin-sealed semiconductor devices are respectively mounted on the carriers. The resin-sealed semiconductor devices are mounted in a stacked state.
摘要翻译：多芯片模块包括绝缘板，半导体芯片，多个载体和半导体器件。绝缘板具有形成在下表面的中心部分的凹部。在绝缘板上形成布线图形。半导体芯片安装在绝缘板的凹部中。每个载体安装在绝缘板的上表面上，并且具有在侧表面上形成有侧面电极的腿部。树脂密封的半导体器件分别安装在载体上。树脂密封的半导体器件以堆叠状态安装。

5. 发明授权

US6016013A Semiconductor device mounting structure 失效
标题翻译：半导体器件安装结构
公开(公告)号：US6016013A
公开(公告)日：2000-01-18
申请号：US915272
申请日：1997-08-20
申请人： Mikio Baba
发明人： Mikio Baba
IPC分类号： H01L21/60 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L24/81 , H01L2224/73204 , H01L2224/81136 , H01L2224/81801 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/15311 , H01L2924/351
摘要： Insulating resin layers are formed respectively so as to cover electrical pads for the purpose of connecting metal bumps of a semiconductor device and a mounting board, metal bump electrode pads being formed on the surface of these insulating resin layers, so that the electrode pads are electrically connected to one another. Thermal stress between the semiconductor device and the mounting board is absorbed by the insulating resin layers, the influence felt on the metal bumps being alleviated, thereby achieving an improvement in the reliability of the connection made by the metal bumps.
摘要翻译：分别形成绝缘树脂层，以覆盖用于连接半导体器件的金属凸块和安装板的电焊盘，在这些绝缘树脂层的表面上形成金属凸块电极焊盘，使得电极焊盘是电相互连接。半导体器件和安装板之间的热应力被绝缘树脂层吸收，从而可以减轻对金属凸块的影响，从而提高由金属凸块形成的连接的可靠性。

6. 发明授权

US5751063A Multi-chip module 失效
标题翻译：多芯片模块
公开(公告)号：US5751063A
公开(公告)日：1998-05-12
申请号：US714675
申请日：1996-09-16
申请人： Mikio Baba
发明人： Mikio Baba
IPC分类号： H01L23/12 , H01L23/36 , H01L25/04 , H01L25/10 , H01L25/11 , H01L25/18 , H05K1/02 , H05K1/14 , H05K1/18 , H01L23/34 , H01L23/02 , H01L23/10
CPC分类号： H01L23/36 , H05K1/0204 , H01L2224/48091 , H01L2224/49109 , H01L24/48 , H01L24/49 , H01L2924/00014 , H01L2924/01079 , H01L2924/01322 , H01L2924/15311 , H01L2924/1532 , H05K1/0201 , H05K1/141 , H05K1/182 , H05K2201/10416 , H05K2201/10734
摘要： Disclosed is a multi-chip module. According to the present invention, the multi-chip module comprises: a first insulating board having a first surface and a second surface that is positioned opposite to the first surface; at least one semiconductor chip mounted on the first surface of the first insulating board; a plurality of metal connection members arranged on the second surface of the first insulating board; a second insulating board that is connected to the plurality of metal connection members; a metal plate that is securely attached to one part of the second surface of the first insulating board through an opening in the second insulating board; and electric components mounted on a surface of the second insulating board.
摘要翻译：公开了一种多芯片模块。根据本发明，多芯片模块包括：具有第一表面和与第一表面相对定位的第二表面的第一绝缘板; 安装在第一绝缘板的第一表面上的至少一个半导体芯片; 多个金属连接构件，布置在第一绝缘板的第二表面上; 连接到所述多个金属连接构件的第二绝缘板; 金属板，其通过第二绝缘板中的开口固定在第一绝缘板的第二表面的一部分上; 以及安装在所述第二绝缘板的表面上的电气部件。

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