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1. 依法登记的发明

USH1167H Process for manufacturing silver halide color photographic light sensitive material 失效
公开(公告)号：USH1167H
公开(公告)日：1993-04-06
申请号：US586682
申请日：1990-09-24
申请人： Kuniaki Uezawa , Masaru Iwagaki , Kiichi Sato , Hideo Akamatsu , Minoru Ishikawa
发明人： Kuniaki Uezawa , Masaru Iwagaki , Kiichi Sato , Hideo Akamatsu , Minoru Ishikawa
IPC分类号： G03C7/20 , G03C1/035 , G03C7/30
CPC分类号： G03C1/035 , G03C7/3022 , G03C2001/03564
摘要： A process for manufacturing a silver halide color photographic material is disclosed. The photographic material comprises a blue light-sensitive layer-unit, a green light-sensitive layer-unit and a red light-sensitive layer-unit in which at least one of the light-sensitive layer-units comprises two or three silver halide emulsion layers being substantially the same in spectral sensitivity and different in speed from each other. The manufacturing process comprises steps ofproducing a high-speed silver halide emulsion having a largest average grain size among the silver halide emulsions to be used in the at least one light sensitive layer-unit,chemically sensitizing the high-speed silver halide emulsion, producing a low-speed silver halide emulsion having a smaller average grain size than that of the high-speed emulsion,chemically sensitizing the low-speed emulsion,mixing the chemically sensitized high-speed and the chemically sensitized low-speed emulsion in a ratio of from 5:95 to 50:50 by weight in terms of silver, andcoating the chemically sensitized high-speed emulsion and the mixture of the chemically sensitized high-speed emulsion and the chemically sensitized low-speed emulsion to form the at least one light-sensitive layer-unit.The photographic material is improved in adaptability to fluctuation of processing conditions.

2. 发明申请

US20070202557A1 Enzyme immunoassay chip and method 审中-公开
标题翻译：酶免疫测定芯片及方法
公开(公告)号：US20070202557A1
公开(公告)日：2007-08-30
申请号：US11710508
申请日：2007-02-26
申请人： Takehiko Kitamori , Manabu Tokeshi , Kiichi Sato
发明人： Takehiko Kitamori , Manabu Tokeshi , Kiichi Sato
IPC分类号： G01N33/53 , C12M3/00
CPC分类号： G01N33/54346 , B01L3/502753 , B01L2200/0668 , B01L2300/0816 , B01L2300/0867 , G01N33/54366 , G01N33/54386
摘要： An enzyme immunoassay chip having, as micro channels, a reaction liquid leading-in flow passage part, a reaction flow passage part, and detection flow passage part sequentially disposed on a substrate continuously to each other, comprising an installed part for bead-bodies supporting antibodies and the bead-body flow stopping part formed in the micro channel of the reaction flow passage part, wherein enzyme reactive product flowing beyond the flow stopping part can be analyzed by using the chip.
摘要翻译：一种酶免疫测定芯片，其具有作为微通道的反应液引入流路部分，反应流路部分和检测流路部分，其顺序地彼此连续地设置在基板上，包括用于珠体支撑的安装部分抗体和形成在反应流路部分的微通道中的珠粒体流动停止部分，其中可以通过使用芯片来分析流过流动停止部分的酶反应产物。

3. 发明授权

US5996026A Method and apparatus for connecting i/o channels between sub-channels and devices through virtual machines controlled by a hypervisor using ID and configuration information 失效
标题翻译：用于通过使用ID和配置信息由管理程序控制的虚拟机在子通道和设备之间连接i / o通道的方法和装置
公开(公告)号：US5996026A
公开(公告)日：1999-11-30
申请号：US833349
申请日：1997-04-04
申请人： Osamu Onodera , Makiko Shinohara , Kiichi Sato
发明人： Osamu Onodera , Makiko Shinohara , Kiichi Sato
IPC分类号： G06F13/12 , G06F7/04 , G06F9/00
CPC分类号： G06F13/122 , Y10S707/99931
摘要： A connection method of a plurality of input/output channels between a plurality of sub-channels of an information processing system having a virtual machine running on a physical machine under control of a hypervisor and a plurality of devices. The method includes issuing from the hypervisor a command for setting configuration information defining a plurality of configuration structures between the sub-channels set for the respective virtual machines and the devices in a storage device and acquiring configuration information containing the sub-channel corresponding to a designated device from the configuration information corresponding to one of the virtual machines based on the device designation contained in the input/output command from the one virtual machine. The virtual machines are enabled after the issuance of the set command and before the issuance of the input/output command. The corresponding configuration information is searched by using ID information of the virtual machine which issued the input/output command in order to execute the step so that one of a plurality of channel paths between a plurality of devices and the sub-channels is selected to execute the input/output designated by the input/output command.
摘要翻译：信息处理系统的多个子信道之间的多个输入/输出信道的连接方法，具有在管理程序的控制下在物理机上运行的虚拟机和多个设备。该方法包括从管理程序发出用于设置在针对各个虚拟机设置的子信道和存储装置中的设备之间定义多个配置结构的配置信息的命令，并且获取包含与指定的对应的子信道的配置信息设备根据来自一个虚拟机的输入/输出命令中包含的设备指定从与虚拟机之一相对应的配置信息。虚拟机在发出设置命令之后以及发出输入/输出命令之前启用。通过使用发出输入/输出命令的虚拟机的ID信息来搜索相应的配置信息，以执行该步骤，使得选择多个设备和子信道之间的多个信道路径中的一个来执行由输入/输出指令指定的输入/输出。

4. 发明授权

US6125411A System storing plural I/O arrangement information wherein each I/O arrangement information corresponding to each operating system is created in response to more than two operating systems 失效
标题翻译：存储多个I / O布置信息的系统，其中响应于两个以上操作系统创建与每个操作系统相对应的每个I / O布置信息
公开(公告)号：US6125411A
公开(公告)日：2000-09-26
申请号：US29888
申请日：1998-03-12
申请人： Kiichi Sato
发明人： Kiichi Sato
IPC分类号： G06F9/455 , G06F13/10 , G06F13/14
CPC分类号： G06F13/10 , G06F9/455
摘要： In an electronic computer system in which a plurality of OSs are operated, a plurality of input-output arrangement information defined in response to each of a plurality of OSs and a correspondence table indicative of a correspondence relationship between each OS and each input-output arrangement information are created previously and stored in a control information storage means. When an input-output request is issued from an arbitrary OS, the central processing unit identifies the corresponding OS, and recognizes input-output arrangement information corresponding to the identified OS based on the correspondence table. Then, the central processing unit executes an input-output processing based on the recognized input-output arrangement information. According to the present invention, since one electronic computer system becomes able to use a plurality of input-output arrangement information at the same time, the maximum number of input-output arrangements can be distributed to each OS so that the data processing capability of the whole system can be improved considerably.
摘要翻译： PCT No.PCT / JP95 / 01813 Sec。 371日期1998年3月12日 102（e）1998年3月12日PCT PCT 1995年9月13日PCT公布。公开号WO97 / 10549 日期1997年3月20日在其中操作多个OS的电子计算机系统中，响应于多个OS中的每一个定义的多个输入 - 输出布置信息和指示每个OS和每个输入 - 输出布置信息先前创建并存储在控制信息存储装置中。当从任意的OS发出输入输出请求时，中央处理单元识别对应的OS，并且基于对应表识别对应于所识别的OS的输入输出布置信息。然后，中央处理单元基于识别的输入输出配置信息执行输入输出处理。根据本发明，由于一个电子计算机系统能够同时使用多个输入 - 输出布置信息，所以可以将最大数量的输入 - 输出布置分配给每个OS，使得数据处理能力整个系统可以大大改善。

5. 发明申请

US20050158213A1 Microfluid system 审中-公开
标题翻译：微流体系统
公开(公告)号：US20050158213A1
公开(公告)日：2005-07-21
申请号：US11028673
申请日：2005-01-05
申请人： Hidekazu Tsudome , Takehiko Kitamori , Kiichi Sato , Manabu Tokeshi
发明人： Hidekazu Tsudome , Takehiko Kitamori , Kiichi Sato , Manabu Tokeshi
IPC分类号： G01N37/00 , B01J19/00 , B01L3/00 , B01L9/00 , B81B3/00
CPC分类号： B01L3/502715 , B01L3/565 , B01L9/527 , B01L2200/027 , B01L2300/0825 , B01L2300/0887 , B01L2400/0487
摘要： In a microfluid system it is intended to expand the application range of samples capable of being treated, decrease the amount of samples used, and prevent deterioration of samples with the lapse of time. In a microfluid system having a microchip for feeding plural samples to a treating portion and performing predetermined treatments, plural sample servers for storage of the samples therein are provided in the microchip, the sample servers and the treating portion are connected with each other through capillary channels provided respectively on outlet sides of the sample servers, and a pressurizing device for pressurizing the samples stored in the sample servers and feeding them to the treating portion is provided.
摘要翻译：在微流体系统中，旨在扩大能够处理的样品的应用范围，减少使用的样品量，并防止样品随时间的退化。在具有用于向处理部供给多个样品并执行预定处理的微芯片的微流体系统中，在微芯片中提供用于存储样品的多个样品服务器，样品服务器和处理部通过毛细通道彼此连接分别设置在样本服务器的出口侧，并且提供用于对存储在样本服务器中的样本加压并将其馈送到处理部分的加压装置。

6. 发明授权

US5401741A Topical preparation for treating otopathy 失效
标题翻译：治疗耳病的专题准备
公开(公告)号：US5401741A
公开(公告)日：1995-03-28
申请号：US048959
申请日：1993-04-12
申请人： Kiichi Sato , Akira Handa , Takeji Kitahara
发明人： Kiichi Sato , Akira Handa , Takeji Kitahara
IPC分类号： C07D498/06 , A61K9/08 , A61K31/535 , A61P27/16
CPC分类号： A61K31/535
摘要： A topical preparation for treating otophathy which contains ofloxacin or a salt thereof as an active ingredient is disclosed.
摘要翻译：公开了一种用于治疗含有氧氟沙星或其盐作为活性成分的耳科的外用制剂。

7. 发明授权

US4922410A Input/output system capable of allotting addresses to a plurality of input/output devices 失效
标题翻译：能够将地址分配给多个输入/输出装置的输入/输出系统
公开(公告)号：US4922410A
公开(公告)日：1990-05-01
申请号：US86279
申请日：1987-08-17
申请人： Takashi Morikawa , Tetuji Ogawa , Akio Sasaki , Kiichi Sato
发明人： Takashi Morikawa , Tetuji Ogawa , Akio Sasaki , Kiichi Sato
IPC分类号： G06F13/12 , G06F13/14
CPC分类号： G06F13/122
摘要： In an input/output process device for controlling data transfer between a central processing unit and an input/output device through a channel by use of any of a plurality of input/output control devices connected to the input/output device, a memory unit is disposed so as to store information representing the address of the input/output control device in association with an identification number of the channels connected to the input/output control device. When selecting the channel for data transfer, the input/output process device reads out the information representing the address of the input/output control device from the memory unit and generates the address for the input/output control device on the basis of the information read out.
摘要翻译：在用于通过使用连接到输入/输出设备的多个输入/输出控制设备中的任何一个通过信道来控制中央处理单元和输入/输出设备之间的数据传输的输入/输出处理设备中，存储单元是被配置为与连接到输入/输出控制装置的通道的标识号相关联地存储表示输入/输出控制装置的地址的信息。当选择用于数据传送的通道时，输入/输出处理装置从存储器单元中读出表示输入/输出控制装置的地址的信息，并根据读取的信息产生输入/输出控制装置的地址出来

8. 发明申请

US20050142624A1 Chip and method for analyzing enzyme immunity 审中-公开
标题翻译：芯片和分析酶免疫的方法
公开(公告)号：US20050142624A1
公开(公告)日：2005-06-30
申请号：US10502256
申请日：2002-11-08
申请人： Takehiko Kitamori , Manabu Tokeshi , Kiichi Sato
发明人： Takehiko Kitamori , Manabu Tokeshi , Kiichi Sato
IPC分类号： B01L3/00 , G01N33/543 , G01N33/53 , C12M1/34 , G01N33/537
CPC分类号： G01N33/54346 , B01L3/502753 , B01L2200/0668 , B01L2300/0816 , B01L2300/0867 , G01N33/54366 , G01N33/54386
摘要： An enzyme immunoassay chip having, as micro channels, a reaction liquid leading-in flow passage part, a reaction flow passage part, and detection flow passage part sequentially disposed on a substrate continuously to each other, comprising an installed part for bead-bodies supporting antibodies and the bead-body flow stopping part formed in the micro channel of the reaction flow passage part, wherein enzyme reactive product flowing beyond the flow stopping part can be analyzed by using the chip.
摘要翻译：一种酶免疫测定芯片，其具有作为微通道的反应液引入流路部分，反应流路部分和检测流路部分，其顺序地彼此连续地设置在基板上，包括用于珠体支撑的安装部分抗体和形成在反应流路部分的微通道中的珠粒体流动停止部分，其中可以通过使用芯片来分析流过流动停止部分的酶反应产物。

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