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1. 发明授权

US08067286B2 Methods of forming recessed access devices associated with semiconductor constructions 有权
标题翻译：形成与半导体结构相关联的凹陷接入设备的方法
公开(公告)号：US08067286B2
公开(公告)日：2011-11-29
申请号：US13012675
申请日：2011-01-24
申请人： Kunal R. Parekh , Suraj J. Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
发明人： Kunal R. Parekh , Suraj J. Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
IPC分类号： H01L21/336
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
摘要翻译：本发明包括形成凹入进入装置的方法。提供基板以在其中具有凹入的接入装置沟槽。一对凹进的接入设备沟槽彼此相邻。导电材料形成在凹进的存取装置沟槽内，源极/漏极区域靠近导电材料形成。导电材料和源极/漏极区域一起被并入一对相邻的凹进入器件中。在凹陷的访问设备沟槽形成在衬底内之后，在相邻的凹进的访问设备之间形成隔离区沟槽，并且填充有电绝缘材料以形成沟槽隔离区域。

2. 发明授权

US07384849B2 Methods of forming recessed access devices associated with semiconductor constructions 有权
标题翻译：形成与半导体结构相关联的凹陷接入设备的方法
公开(公告)号：US07384849B2
公开(公告)日：2008-06-10
申请号：US11090529
申请日：2005-03-25
申请人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
发明人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
IPC分类号： H01L21/336
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
摘要翻译：本发明包括形成凹入进入装置的方法。提供基板以在其中具有凹入的接入装置沟槽。一对凹进的接入设备沟槽彼此相邻。导电材料形成在凹进的存取装置沟槽内，源极/漏极区域靠近导电材料形成。导电材料和源极/漏极区域一起被并入一对相邻的凹进入器件中。在凹陷的访问设备沟槽形成在衬底内之后，在相邻的凹进的访问设备之间形成隔离区沟槽，并且填充有电绝缘材料以形成沟槽隔离区域。

3. 发明申请

US20080166856A1 Methods of Forming Recessed Access Devices Associated With Semiconductor Constructions 有权
标题翻译：形成与半导体结构相关的嵌入式接入设备的方法
公开(公告)号：US20080166856A1
公开(公告)日：2008-07-10
申请号：US12051620
申请日：2008-03-19
申请人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
发明人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
IPC分类号： H01L21/76
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
摘要翻译：本发明包括形成凹入进入装置的方法。提供基板以在其中具有凹入的接入装置沟槽。一对凹进的接入设备沟槽彼此相邻。导电材料形成在凹进的存取装置沟槽内，源极/漏极区域靠近导电材料形成。导电材料和源极/漏极区域一起被并入一对相邻的凹进入器件中。在凹陷的访问设备沟槽形成在衬底内之后，在相邻的凹进的访问设备之间形成隔离区沟槽，并且填充有电绝缘材料以形成沟槽隔离区域。

4. 发明申请

US20110117725A1 Methods of Forming Recessed Access Devices Associated with Semiconductor Constructions 有权
标题翻译：形成与半导体结构相关的嵌入式接入设备的方法
公开(公告)号：US20110117725A1
公开(公告)日：2011-05-19
申请号：US13012675
申请日：2011-01-24
申请人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
发明人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
IPC分类号： H01L21/76
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.
摘要翻译：本发明包括形成凹入进入装置的方法。提供基板以在其中具有凹入的接入装置沟槽。一对凹进的接入设备沟槽彼此相邻。导电材料形成在凹进的存取装置沟槽内，源极/漏极区域靠近导电材料形成。导电材料和源极/漏极区域一起被并入一对相邻的凹进入器件中。在凹陷的访问设备沟槽形成在衬底内之后，在相邻的凹进的访问设备之间形成隔离区沟槽，并且填充有电绝缘材料以形成沟槽隔离区域。

5. 发明授权

US07897460B2 Methods of forming recessed access devices associated with semiconductor constructions 有权
公开(公告)号：US07897460B2
公开(公告)日：2011-03-01
申请号：US12051620
申请日：2008-03-19
申请人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
发明人： Kunal R. Parekh , Suraj Mathew , Jigish D. Trivedi , John K. Zahurak , Sanh D. Tang
IPC分类号： H01L21/336
CPC分类号： H01L27/10876 , H01L27/10823
摘要： The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the recessed access device trenches are adjacent one another. Electrically conductive material is formed within the recessed access device trenches, and source/drain regions are formed proximate the electrically conductive material. The electrically conductive material and source/drain regions together are incorporated into a pair of adjacent recessed access devices. After the recessed access device trenches are formed within the substrate, an isolation region trench is formed between the adjacent recessed access devices and filled with electrically insulative material to form a trenched isolation region.

6. 发明授权

US06809014B2 Method to fabricate surface p-channel CMOS 有权
标题翻译：制造表面p沟道CMOS的方法
公开(公告)号：US06809014B2
公开(公告)日：2004-10-26
申请号：US09808261
申请日：2001-03-14
申请人： Suraj J. Mathew , Jigish D. Trivedi
发明人： Suraj J. Mathew , Jigish D. Trivedi
IPC分类号： H01L21425
CPC分类号： H01L21/823842 , H01L27/10873
摘要： An improved method of making CMOS surface channel transistors using fewer masking steps. In-situ doped poly silicon deposition can be used to reduce problems with poly depletion effects in transistor gates. In addition, using this method, the number of layers in each gate dielectric, the dielectric type, and dielectric thickness between n-channel and p-channel devices can be separately controlled. This method also allows the use of a lithography mask normally used to fabricate buried channel devices for use in fabricating surface channel devices, thus saving the manufacture of an additional mask.
摘要翻译：使用较少掩蔽步骤制造CMOS表面沟道晶体管的改进方法。可以使用原位掺杂的多晶硅沉积来减少晶体管栅极中的多晶硅耗尽效应的问题。此外，使用这种方法，可以单独地控制n沟道和p沟道器件之间的每个栅极电介质层中的层数，介电类型和电介质厚度。该方法还允许使用通常用于制造用于制造表面通道器件的掩埋通道器件的光刻掩模，从而节省了附加掩模的制造。

7. 发明授权

US06797596B2 Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device 失效
公开(公告)号：US06797596B2
公开(公告)日：2004-09-28
申请号：US10232980
申请日：2002-08-29
申请人： Fawad Ahmed , Jigish D. Trivedi , Suraj J Mathew
发明人： Fawad Ahmed , Jigish D. Trivedi , Suraj J Mathew
IPC分类号： H01L21425
CPC分类号： H01L29/6659 , H01L21/2652 , H01L21/28061 , H01L29/4933 , Y10S438/914 , Y10S438/923
摘要： A method used during the formation of a semiconductor device reduces ion channeling during implantation of the wafer. The method comprises providing a semiconductor wafer and an unetched transistor gate stack assembly over the wafer. The unetched transistor gate stack assembly comprises a gate oxide layer, a control gate layer, a metal layer, and a dielectric capping layer. A patterned photoresist layer is formed over the unetched transistor gate stack assembly, then each of the capping layer, the metal layer, the control gate layer, and the gate oxide layer is etched to form a plurality of laterally-spaced transistor gate stacks. A screening layer is formed overlying the semiconductor wafer between the transistor gate stacks. A dopant is implanted into the semiconductor wafer through the screening layer, then the screening layer is removed.

8. 发明授权

US07005342B2 Method to fabricate surface p-channel CMOS 失效
公开(公告)号：US07005342B2
公开(公告)日：2006-02-28
申请号：US10929284
申请日：2004-08-30
申请人： Suraj J. Mathew , Jigish D. Trivedi
发明人： Suraj J. Mathew , Jigish D. Trivedi
IPC分类号： H01L21/66 , H01L21/425 , H01L21/8238
CPC分类号： H01L21/823842 , H01L27/10873
摘要： An improved method of making CMOS surface channel transistors using fewer masking steps. In-situ doped poly silicon deposition can be used to reduce problems with poly depletion effects in transistor gates. In addition, using this method, the number of layers in each gate dielectric, the dielectric type, and dielectric thickness between n-channel and p-channel devices can be separately controlled. This method also allows the use of a lithography mask normally used to fabricate buried channel devices for use in fabricating surface channel devices, thus saving the manufacture of an additional mask.

9. 发明授权

US08035160B2 Recessed access device for a memory 有权
标题翻译：嵌入式存储设备
公开(公告)号：US08035160B2
公开(公告)日：2011-10-11
申请号：US12627869
申请日：2009-11-30
申请人： Kurt D. Beigel , Jigish D. Trivedi , Kevin G. Duesman
发明人： Kurt D. Beigel , Jigish D. Trivedi , Kevin G. Duesman
IPC分类号： H01L29/66
CPC分类号： H01L29/66621 , H01L27/10876
摘要： Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate oxide layer in the recess. The device recess may be extended to a second depth that is greater that the first depth to form an extended portion of the device recess. A field oxide layer may be provided within an interior of the device recess that extends inwardly into the interior of the device recess and into the substrate. Active regions may be formed in the substrate that abut the field oxide layer, and a gate material may be deposited into the device recess.
摘要翻译：公开了具有凹入式存取装置的半导体存储器件。在一些实施例中，形成凹陷进入装置的方法包括在衬底材料中形成器件凹部，该衬底材料延伸到衬底中的第一深度，该第一深度包括凹陷中的栅极氧化物层。装置凹部可以延伸到大于第一深度的第二深度，以形成装置凹部的延伸部分。场氧化物层可以设置在器件凹部的内部，其内部延伸到器件凹部的内部并进入衬底。活性区域可以形成在衬底中，其邻接场氧化物层，并且栅极材料可以沉积到器件凹部中。

10. 发明申请

US20100072532A1 Recessed Access Device For A Memory 有权
标题翻译：嵌入式存储设备
公开(公告)号：US20100072532A1
公开(公告)日：2010-03-25
申请号：US12627869
申请日：2009-11-30
申请人： Kurt D. Beigel , Jigish D. Trivedi , Kevin G. Duesman
发明人： Kurt D. Beigel , Jigish D. Trivedi , Kevin G. Duesman
IPC分类号： H01L27/108 , H01L27/105
CPC分类号： H01L29/66621 , H01L27/10876
摘要： Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming a device recess in a substrate material that extends to a first depth in the substrate that includes a gate oxide layer in the recess. The device recess may be extended to a second depth that is greater that the first depth to form an extended portion of the device recess. A field oxide layer may be provided within an interior of the device recess that extends inwardly into the interior of the device recess and into the substrate. Active regions may be formed in the substrate that abut the field oxide layer, and a gate material may be deposited into the device recess.
摘要翻译：公开了具有凹入式存取装置的半导体存储器件。在一些实施例中，形成凹陷进入装置的方法包括在衬底材料中形成器件凹部，该衬底材料延伸到衬底中的第一深度，该第一深度包括凹陷中的栅极氧化物层。装置凹部可以延伸到大于第一深度的第二深度，以形成装置凹部的延伸部分。场氧化物层可以设置在器件凹部的内部，其内部延伸到器件凹部的内部并进入衬底。活性区域可以形成在衬底中，其邻接场氧化物层，并且栅极材料可以沉积到器件凹部中。

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