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1. 发明申请

US20150346272A1 SYSTEM FOR TESTING INTEGRATED CIRCUIT 有权
标题翻译：用于测试集成电路的系统
公开(公告)号：US20150346272A1
公开(公告)日：2015-12-03
申请号：US14288358
申请日：2014-05-27
申请人： Kumar Abhishek , Kushal Kamal , Vandana Sapra
发明人： Kumar Abhishek , Kushal Kamal , Vandana Sapra
IPC分类号： G01R31/28
CPC分类号： G01R31/2856 , H03M1/1245 , H03M1/38 , H03M1/40 , H03M1/42 , H03M1/466
摘要： An integrated circuit (IC) is connected to an automated test equipment (ATE) with pogo pins. The IC includes an analog-to-digital converter (ADC), a voltage controlled oscillator (VCO), and a compensation circuit. The ATE provides reference voltage signals to the ADC by way of the pogo pins. A potential drop across a pogo pin introduces an error in a reference voltage signal that is reflected in a digital signal generated by the ADC. The VCO generates reference frequency signals corresponding to the reference voltage signals. The compensation circuit receives the reference frequency signals and the digital signal and generates a compensation factor signal. The compensation circuit multiplies the compensation factor signal and the digital signal to generate a compensated digital signal to compensate for the error introduced by the potential drop across the pogo pins.
摘要翻译：集成电路（IC）连接到具有弹簧针的自动测试设备（ATE）。该IC包括模数转换器（ADC），压控振荡器（VCO）和补偿电路。 ATE通过弹簧引脚向ADC提供参考电压信号。在pogo引脚上的电压降引起在ADC产生的数字信号中反映的参考电压信号中的误差。 VCO产生对应于参考电压信号的参考频率信号。补偿电路接收参考频率信号和数字信号，并产生补偿因子信号。补偿电路将补偿因子信号和数字信号相乘以产生补偿数字信号，以补偿由pogo引脚上的电位降引入的误差。

2. 发明授权

US09645195B2 System for testing integrated circuit 有权
公开(公告)号：US09645195B2
公开(公告)日：2017-05-09
申请号：US14288358
申请日：2014-05-27
申请人： Kumar Abhishek , Kushal Kamal , Vandana Sapra
发明人： Kumar Abhishek , Kushal Kamal , Vandana Sapra
IPC分类号： H03M1/12 , G01R31/28 , H03M1/40 , H03M1/42 , H03M1/46 , H03M1/38
CPC分类号： G01R31/2856 , H03M1/1245 , H03M1/38 , H03M1/40 , H03M1/42 , H03M1/466
摘要： An integrated circuit (IC) is connected to an automated test equipment (ATE) with pogo pins. The IC includes an analog-to-digital converter (ADC), a voltage controlled oscillator (VCO), and a compensation circuit. The ATE provides reference voltage signals to the ADC by way of the pogo pins. A potential drop across a pogo pin introduces an error in a reference voltage signal that is reflected in a digital signal generated by the ADC. The VCO generates reference frequency signals corresponding to the reference voltage signals. The compensation circuit receives the reference frequency signals and the digital signal and generates a compensation factor signal. The compensation circuit multiplies the compensation factor signal and the digital signal to generate a compensated digital signal to compensate for the error introduced by the potential drop across the pogo pins.

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