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1. 发明授权

US07384566B2 Fabrication method for printed circuit board 有权
标题翻译：印刷电路板制造方法
公开(公告)号：US07384566B2
公开(公告)日：2008-06-10
申请号：US11121091
申请日：2005-05-04
申请人： Hung-Nan Chen , Jen-Kuang Fang , Kuang-Lin Lo
发明人： Hung-Nan Chen , Jen-Kuang Fang , Kuang-Lin Lo
IPC分类号： H01B13/00 , H05K3/02
CPC分类号： H05K3/242 , H05K3/0035 , H05K3/06 , H05K3/28 , H05K2201/0989 , H05K2203/175 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49162
摘要： A fabrication method for PCBs. The method includes providing a substrate having a layout area and a periphery area around the layout area on a surface, forming a patterned wiring layer, having a bus line in the periphery area, a plurality of pads in the layout area, a plurality of bridge lines providing electrical connection between the pads, and a plating line electrically connecting the bus line and pads, overlying the substrate, forming a patterned solder mask over the substrate and wiring layer, the patterned solder mask having a plurality of first openings respectively exposing the pads and plating a metal layer respectively overlying the pads, forming a plurality of second openings respectively exposing the bridge lines between the pads, and removing the exposed bridge lines.
摘要翻译：一种PCB制造方法。该方法包括提供具有在表面上的布局区域周围的布局区域和周边区域的基板，形成图案化的布线层，在周边区域中具有总线，布局区域中的多个焊盘，多个桥在衬垫之间提供电连接的线，以及覆盖衬底的电连接总线和衬垫的电镀线，在衬底和布线层上形成图案化的焊料掩模，图案化的焊料掩模具有多个第一开口，分别暴露衬垫以及分别覆盖覆盖在所述焊盘上的金属层，形成分别暴露所述焊盘之间的所述桥接线并且去除所暴露的桥接线的多个第二开口。

2. 发明申请

US20050246892A1 Fabrication method for printed circuit board 有权
标题翻译：印刷电路板制造方法
公开(公告)号：US20050246892A1
公开(公告)日：2005-11-10
申请号：US11121091
申请日：2005-05-04
申请人： Hung-Nan Chen , Jen-Kuang Fang , Kuang-Lin Lo
发明人： Hung-Nan Chen , Jen-Kuang Fang , Kuang-Lin Lo
IPC分类号： H01R43/00 , H05K3/00 , H05K3/06 , H05K3/24 , H05K3/28
CPC分类号： H05K3/242 , H05K3/0035 , H05K3/06 , H05K3/28 , H05K2201/0989 , H05K2203/175 , Y10T29/49117 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49162
摘要： A fabrication method for PCBs. The method includes providing a substrate having a layout area and a periphery area around the layout area on a surface, forming a patterned wiring layer, having a bus line in the periphery area, a plurality of pads in the layout area, a plurality of bridge lines providing electrical connection between the pads, and a plating line electrically connecting the bus line and pads, overlying the substrate, forming a patterned solder mask over the substrate and wiring layer, the patterned solder mask having a plurality of first openings respectively exposing the pads and plating a metal layer respectively overlying the pads, forming a plurality of second openings respectively exposing the bridge lines between the pads, and removing the exposed bridge lines.
摘要翻译：一种PCB制造方法。该方法包括提供具有在表面上的布局区域周围的布局区域和周边区域的基板，形成图案化布线层，在周边区域中具有总线，布局区域中的多个焊盘，多个桥在衬垫之间提供电连接的线，以及覆盖衬底的电连接总线和衬垫的电镀线，在衬底和布线层上形成图案化的焊料掩模，图案化的焊料掩模具有多个第一开口，分别暴露衬垫以及分别覆盖覆盖在所述焊盘上的金属层，形成分别暴露所述焊盘之间的所述桥接线并且去除所暴露的桥接线的多个第二开口。

3. 发明申请

US20050282314A1 Printed circuit boards and methods for fabricating the same 审中-公开
标题翻译：印刷电路板及其制造方法
公开(公告)号：US20050282314A1
公开(公告)日：2005-12-22
申请号：US11150346
申请日：2005-06-13
申请人： Kuang-Lin Lo , Jen-Kuang Fang
发明人： Kuang-Lin Lo , Jen-Kuang Fang
IPC分类号： H01L21/44 , H05K3/24 , H05K3/40 , H05K3/42
CPC分类号： H05K3/242 , H05K3/403 , H05K3/42 , H05K2201/0959 , H05K2201/09645 , H05K2203/1581 , H05K2203/175
摘要： Printed circuit boards and methods for fabricating the same. A via in a printed circuit board electrically connects to trace lines of the PCB, such that only one plating line is required to electrically connect a plating bus and the plating through hole. Thus, in an electroplating step, current can flow to fingers in the trace lines to plate an anti-oxidation metal layer thereon. The via is separated into several sub-vias to electrically isolate the plating line from trace lines and fingers, each of which connects to the plating line or the trace lines. Finally, at least one plating line remains, thus avoiding negative impact on electrical performance of an electronic device that uses the printed circuit board.
摘要翻译：印刷电路板及其制造方法。印刷电路板中的通孔电连接到PCB的迹线，使得仅需要一条电镀线来电镀连接电镀母线和电镀通孔。因此，在电镀步骤中，电流可以流到迹线中的指状物，以在其上镀上抗氧化金属层。通孔被分成几个子通孔，以将电镀线与痕迹线和手指电隔离，每条线连接到电镀线或迹线。最后，保留至少一个电镀线，从而避免对使用印刷电路板的电子设备的电气性能的负面影响。

4. 发明授权

US07726544B2 Method of packaging flip chip and method of forming pre-solders on substrate thereof 有权
标题翻译：包装倒装芯片的方法和在其基材上形成预焊料的方法
公开(公告)号：US07726544B2
公开(公告)日：2010-06-01
申请号：US11293093
申请日：2005-12-05
申请人： Jen-Kuang Fang , Chung-Hwa Feng
发明人： Jen-Kuang Fang , Chung-Hwa Feng
IPC分类号： B23K31/02 , H01L23/48
CPC分类号： H05K3/3484 , H01L21/4853 , H01L24/16 , H01L24/80 , H01L24/81 , H01L2224/0401 , H01L2224/05572 , H01L2224/13099 , H01L2224/16225 , H01L2224/81801 , H01L2924/0002 , H01L2924/01033 , H01L2924/0105 , H01L2924/014 , H05K2203/043 , H05K2203/0568 , H05K2203/0574 , H01L2924/00014 , H01L2224/05552
摘要： A method of forming pre-solders on a substrate is provided. Firstly, a substrate is provided. The substrate includes an upper surface and a lower surface. There are several metal circuits and a solder mask both on the upper and the lower surfaces. Each solder mask covers parts of the corresponding metal circuits and parts of the corresponding surface for exposing parts of several pads of the corresponding metal circuits. Then, a patterned photo-resist film is formed on the upper surface. The patterned photo-resist film has several openings for exposing the upper-surface pads. Afterwards, several metal materials are formed in the opening by printing. Thereon, the metal materials are reflown to form several pre-solders on the upper-surface pads. Finally, the patterned photo-resist film is removed.
摘要翻译：提供了在基板上形成预焊料的方法。首先，提供基板。基板包括上表面和下表面。在上表面和下表面都有几个金属电路和焊接掩模。每个焊接掩模覆盖对应的金属电路的部分和相应表面的部分，用于暴露相应金属电路的几个焊盘的部分。然后，在上表面上形成图案化的光刻胶膜。图案化的光致抗蚀剂膜具有用于暴露上表面焊盘的几个开口。之后，通过印刷在开口中形成几种金属材料。在这种情况下，金属材料被重新熔化以在上表面焊盘上形成几个预焊料。最后，去除图案化的光刻胶膜。

5. 发明授权

US06861346B2 Solder ball fabricating process 有权
标题翻译：焊球制造工艺
公开(公告)号：US06861346B2
公开(公告)日：2005-03-01
申请号：US10604743
申请日：2003-08-14
申请人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee , Yu-Chen Chou
发明人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee , Yu-Chen Chou
IPC分类号： H01L21/60 , H01K21/44 , B23K31/02
CPC分类号： H01L24/11 , H01L2224/0401 , H01L2224/05124 , H01L2224/05139 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05172 , H01L2224/05184 , H01L2224/05558 , H01L2224/05571 , H01L2224/05624 , H01L2224/05639 , H01L2224/05647 , H01L2224/05655 , H01L2224/05666 , H01L2224/05671 , H01L2224/05672 , H01L2224/05684 , H01L2224/11332 , H01L2224/11334 , H01L2224/1147 , H01L2224/11474 , H01L2224/11906 , H01L2224/13099 , H01L2924/0002 , H01L2924/01013 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/351 , H01L2924/00 , H01L2224/05552 , H01L2924/00014 , H01L2924/013
摘要： A solder ball fabricating process for forming solder balls over a wafer having an active layer is provided. A patterned solder mask layer is formed over the active surface of the wafer. The patterned solder mask layer has an opening that exposes a bonding pad on the wafer. Solder material is deposited into the opening over the bonding pad. A reflow process is conducted to form a pre-solder body. The aforementioned steps are repeated so that various solder materials are fused together to form a solder ball over the bonding pad.
摘要翻译：提供了一种用于在具有有源层的晶片上形成焊球的焊球制造工艺。在晶片的有效表面上形成图案化的焊接掩模层。图案化的焊接掩模层具有暴露晶片上的焊盘的开口。焊料沉积在焊盘上的开口中。进行回流工艺以形成预焊料体。重复上述步骤，使得各种焊料材料熔合在一起以在焊盘上形成焊球。

6. 发明授权

US06838311B2 Flip chip package and method for forming the same 有权
标题翻译：倒装芯片封装及其形成方法
公开(公告)号：US06838311B2
公开(公告)日：2005-01-04
申请号：US10269910
申请日：2002-10-11
申请人： Jen-Kuang Fang
发明人： Jen-Kuang Fang
IPC分类号： H01L21/56 , H01L21/60 , H01L23/31 , H01L23/485 , H01L21/44
CPC分类号： H01L24/10 , H01L21/563 , H01L23/3128 , H01L24/13 , H01L24/81 , H01L2224/05568 , H01L2224/05573 , H01L2224/13 , H01L2224/13099 , H01L2224/16 , H01L2224/73203 , H01L2224/81801 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01047 , H01L2924/0105 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/181 , H01L2924/00 , H01L2224/05599
摘要： The present invention relates to a flip chip package comprising a chip assembly, a substrate, and an underfill material. The chip assembly has at least one chip. Each chips has a plurality of bond pads formed on a bottom portion of the chip. Each bond pad has a first solder bump formed on the bond pad. The chips are packaged by molding compound to form the chip assembly. The chip assembly has a bottom surface exposing a portion of the first solder bumps. The substrate has a plurality of support pads formed on a top surface of the substrate. Each support pad has a second solder bump formed on the support pad. The first solder bumps electrically connect to the second solder bumps to support the chip assembly by the substrate. The underfill material fills into a gap between the bottom surface of the chip assembly and the top surface of the substrate so as to form the flip chip package. Therefore, when the flip chip package structure is cut into a piece of flip chip package, the chip will not break because there is molding compound around the chip. Besides, a logo or company name is printed on the molding compound, not on the chip directly, so it will not hurt the chip. According to the invention, the product yield rate can be improved.
摘要翻译：本发明涉及一种包括芯片组件，衬底和底部填充材料的倒装芯片封装。芯片组件具有至少一个芯片。每个芯片具有形成在芯片的底部上的多个接合焊盘。每个接合焊盘具有形成在接合焊盘上的第一焊料凸块。芯片通过模塑料包装以形成芯片组件。芯片组件具有暴露第一焊料凸块的一部分的底表面。衬底具有形成在衬底的顶表面上的多个支撑焊盘。每个支撑垫具有形成在支撑垫上的第二焊料凸块。第一焊料凸块电连接到第二焊料凸块以通过衬底支撑芯片组件。底部填充材料填充到芯片组件的底表面和基板的顶表面之间的间隙中，以形成倒装芯片封装。因此，当将倒装芯片封装结构切成一片倒装芯片封装时，由于芯片周围存在模塑料，芯片不会断裂。此外，标志或公司名称印刷在模塑料上，而不是直接在芯片上，因此不会伤害芯片。根据本发明，可以提高产品产率。

7. 发明授权

US06692581B2 Solder paste for fabricating bump 有权
标题翻译：用于制造凸块的焊膏
公开(公告)号：US06692581B2
公开(公告)日：2004-02-17
申请号：US10248802
申请日：2003-02-20
申请人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Ching-Fu Horng , Shih-Kuang Chen , Shyh-Ing Wu , Chun-Hung Lin , Yung-Chi Lee , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
发明人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Ching-Fu Horng , Shih-Kuang Chen , Shyh-Ing Wu , Chun-Hung Lin , Yung-Chi Lee , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
IPC分类号： B23K35363
CPC分类号： H01L24/10 , B23K35/0244 , B23K35/025 , B23K35/262 , H01L24/13 , H01L2224/05001 , H01L2224/05022 , H01L2224/05572 , H01L2224/13 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/0103 , H01L2924/01033 , H01L2924/01075 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H05K3/3484 , H05K2201/0266 , H05K2203/043 , H01L2924/00
摘要： A solder paste for fabricating bumps includes a flux and metallic alloy powder. The metallic alloy powder includes a plurality of low eutectic metallic alloy granules, and the size of these metallic alloy granules is 20-60 &mgr;m and the average size of the metallic granules is 35 &mgr;m to 45 &mgr;m.
摘要翻译：用于制造凸块的焊膏包括焊剂和金属合金粉末。金属合金粉末包含多个低共晶金属合金颗粒，这些金属合金颗粒的尺寸为20-60μm，金属颗粒的平均尺寸为35μm〜45μm。

8. 发明授权

US06664128B2 Bump fabrication process 有权
标题翻译：凸起制造工艺
公开(公告)号：US06664128B2
公开(公告)日：2003-12-16
申请号：US10248716
申请日：2003-02-12
申请人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
发明人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
IPC分类号： H01L2144
CPC分类号： C25F3/02 , C23F1/26 , H01L21/32134 , H01L24/11 , H01L2224/05001 , H01L2224/05022 , H01L2224/05027 , H01L2224/0508 , H01L2224/05572 , H01L2224/1147 , H01L2224/131 , H01L2924/00013 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H05K3/3473 , H05K2203/054 , H01L2224/13099 , H01L2924/00014
摘要： The present invention provides a bump fabrication process. After forming an under bump metallurgy (UBM) layer and bumps in sequence over the substrate, the under bump metallurgy layer that is not covered by the bumps is etched with an etchant. The etchant mainly comprises sulfuric acid and de-ionized water. The etchant can etch the nickel-vanadium layer of the UBM layer without damaging the bumps.
摘要翻译：本发明提供一种凸块制造工艺。在衬底上顺序地形成凹凸不平的冶金（UBM）层和凸块之后，用蚀刻剂蚀刻未被凸块覆盖的凸块下金属层。蚀刻剂主要包括硫酸和去离子水。蚀刻剂可以蚀刻UBM层的镍钒层，而不会损坏凸块。

9. 发明授权

US07064428B2 Wafer-level package structure 有权
标题翻译：晶圆级封装结构
公开(公告)号：US07064428B2
公开(公告)日：2006-06-20
申请号：US10248114
申请日：2002-12-19
申请人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
发明人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee , Yu-Chen Chou , Tsung-Hua Wu , Su Tao
IPC分类号： H01L23/10 , H05K7/20
CPC分类号： H01L24/10 , H01L23/3107 , H01L24/13 , H01L2224/05026 , H01L2224/05111 , H01L2224/05124 , H01L2224/05147 , H01L2224/05166 , H01L2224/05171 , H01L2224/05568 , H01L2224/05573 , H01L2224/05647 , H01L2224/13 , H01L2224/13099 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/14 , H01L2924/00 , H01L2924/00014
摘要： A wafer-level package structure, applicable to a flip-chip arrangement on a carrier, which comprises a plurality of contact points, is described. This wafer-level package structure is mainly formed with a chip and a conductive layer. The conductive layer is arranged on the bonding pads of the chip as contact points. The conductive layer can further be arranged at a region outside the bonding pads on the chip as a heat sink to enhance the heat dissipation ability of the package.
摘要翻译：描述了适用于包括多个接触点的载体上的倒装芯片布置的晶片级封装结构。该晶片级封装结构主要由芯片和导电层形成。导电层设置在芯片的焊盘上作为接触点。导电层还可以布置在作为散热片的芯片上的接合焊盘外部的区域，以增强封装的散热能力。

10. 发明授权

US06989326B2 Bump manufacturing method 有权
标题翻译：凸起制造方法
公开(公告)号：US06989326B2
公开(公告)日：2006-01-24
申请号：US10248197
申请日：2002-12-26
申请人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee
发明人： Ho-Ming Tong , Chun-Chi Lee , Jen-Kuang Fang , Min-Lung Huang , Jau-Shoung Chen , Ching-Huei Su , Chao-Fu Weng , Yung-Chi Lee
IPC分类号： H01L21/44
CPC分类号： H01L24/11 , H01L2224/03622 , H01L2224/05001 , H01L2224/05022 , H01L2224/05023 , H01L2224/05027 , H01L2224/0508 , H01L2224/05568 , H01L2224/05572 , H01L2224/1147 , H01L2224/13099 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01072 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/00
摘要： A method of forming bumps on the active surface of a silicon wafer. A first under-bump metallic layer is formed over the active surface of the wafer. A second under-bump metallic layer is formed over the first under-bump metallic layer. A portion of the second under-bump metallic layer is removed to expose the first under-bump metallic layer. A plurality of solder bumps is implanted onto the second under-bump metallic layer. The exposed first under-bump metallic layer is removed so that only the first under-bump metallic layer underneath the second under-bump metallic layer remains.
摘要翻译：一种在硅晶片的有源表面上形成凸块的方法。在晶片的有效表面上形成第一凸块下金属层。在第一凸块下金属层上形成第二凸块下金属层。去除第二凸块下金属层的一部分以露出第一凸块下金属层。将多个焊料凸点植入到第二凸块下金属层上。去除暴露的第一凸块下金属层，使得仅剩下第二凸块下金属层下面的第一凸块下金属层。

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