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1. 发明授权

US07939891B2 Semiconductor device having MISFETs and manufacturing method thereof 有权
标题翻译：具有MISFET的半导体器件及其制造方法
公开(公告)号：US07939891B2
公开(公告)日：2011-05-10
申请号：US12409092
申请日：2009-03-23
申请人： Kouji Matsuo , Katsunori Yahashi , Takashi Shinyama
发明人： Kouji Matsuo , Katsunori Yahashi , Takashi Shinyama
IPC分类号： H01L27/12
CPC分类号： H01L29/0847 , H01L21/823807 , H01L21/823814 , H01L29/665 , H01L29/6656 , H01L29/66636 , H01L29/7834 , H01L29/7848
摘要： A semiconductor device includes a dielectric film and gate electrode that are stacked on a substrate, sidewalls formed to cover the side surfaces of the electrode and dielectric film, and SiGe films formed to sandwich the sidewalls, electrode and dielectric film, filled in portions separated from the sidewalls, having upper portions higher than the surface of the substrate and having silicide layers formed on regions of exposed from the substrate. The lower portion of the SiGe film that faces the electrode is formed to extend in a direction perpendicular to the surface of the substrate and the upper portion is inclined and separated farther apart from the gate electrode as the upper portion is separated away from the surface of the substrate. The surface of the silicide layer of the SiGe film that faces the gate electrode is higher than the channel region.
摘要翻译：半导体器件包括层叠在基板上的电介质膜和栅电极，形成为覆盖电极和电介质膜的侧面的侧壁和形成为夹持侧壁，电极和电介质膜的SiGe膜，填充有与所述侧壁具有高于所述基板的表面的上部，并且在从所述基板暴露的区域上形成有硅化物层。 SiGe膜的与电极相对的下部形成为在垂直于基板的表面的方向上延伸，并且当上部与栅电极的表面分离时，上部分与栅电极分离得更远离，底物。面向栅电极的SiGe膜的硅化物层的表面高于沟道区。

2. 发明授权

US08236641B2 Semiconductor device with extension structure and method for fabricating the same 有权
标题翻译：具有延伸结构的半导体器件及其制造方法
公开(公告)号：US08236641B2
公开(公告)日：2012-08-07
申请号：US13168183
申请日：2011-06-24
申请人： Takayuki Ito , Kyoichi Suguro , Kouji Matsuo
发明人： Takayuki Ito , Kyoichi Suguro , Kouji Matsuo
IPC分类号： H01L21/8238
CPC分类号： H01L21/823857 , H01L21/823814 , H01L21/823842
摘要： A semiconductor device includes a semiconductor region, a source region, a drain region, a source extension region a drain extension region, a first gate insulation film, a second gate insulation film, and a gate electrode. The source region, drain region, source extension region and drain extension region are formed in a surface portion of the semiconductor region. The first gate insulation film is formed on the semiconductor region between the source extension region and the drain extension region. The first gate insulation film is formed of a silicon oxide film or a silicon oxynitride film having a nitrogen concentration of 15 atomic % or less. The second gate insulation film is formed on the first gate insulation film and contains nitrogen at a concentration of between 20 atomic % and 57 atomic %. The gate electrode is formed on the second gate insulation film.
摘要翻译：半导体器件包括半导体区域，源极区域，漏极区域，源极延伸区域，漏极延伸区域，第一栅极绝缘膜，第二栅极绝缘膜和栅极电极。源极区域，漏极区域，源极延伸区域和漏极延伸区域形成在半导体区域的表面部分中。第一栅极绝缘膜形成在源极延伸区域和漏极延伸区域之间的半导体区域上。第一栅极绝缘膜由氮浓度为15原子％以下的氧化硅膜或氮氧化硅膜形成。第二栅极绝缘膜形成在第一栅极绝缘膜上，并且含有浓度为20原子％至57原子％之间的氮。栅电极形成在第二栅绝缘膜上。

3. 发明授权

US08148717B2 Manufacturing method for semiconductor device and semiconductor device 失效
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US08148717B2
公开(公告)日：2012-04-03
申请号：US12929504
申请日：2011-01-28
申请人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
发明人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
IPC分类号： H01L29/06 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L21/823807 , H01L21/2686 , H01L21/823814 , H01L21/823878 , H01L29/165 , H01L29/66636 , H01L29/78 , H01L29/7848
摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp (21541/T).
摘要翻译：一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y＆nlE; 1E-5exp（21541 / T）的关系。

4. 发明申请

US20110127578A1 Manufacturing method for semiconductor device and semiconductor device 失效
标题翻译：半导体器件和半导体器件的制造方法
公开(公告)号：US20110127578A1
公开(公告)日：2011-06-02
申请号：US12929504
申请日：2011-01-28
申请人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
发明人： Takayuki Ito , Yusuke Oshiki , Kouji Matsuo , Kenichi Yoshino , Takaharu Itani , Takuo Ohashi , Toshihiko Iinuma , Kiyotaka Miyano , Kunihiro Miyazaki
IPC分类号： H01L29/12
CPC分类号： H01L21/823807 , H01L21/2686 , H01L21/823814 , H01L21/823878 , H01L29/165 , H01L29/66636 , H01L29/78 , H01L29/7848
摘要： A manufacturing method for semiconductor device includes: forming an opening, in a surface of a semiconductor substrate being composed of first atom, the opening having an opening ratio y to an area of the surface of the semiconductor substrate ranging from 5 to 30%; forming an epitaxial layer in the opening, the epitaxial layer being made of a mixed crystal containing a second atom in a concentration ranging from 15 to 25%, and the second atom having a lattice constant different from a lattice constant of the first atom; implanting impurity ion into the epitaxial layer; and performing activation annealing at a predetermined temperature T, the predetermined temperature T being equal to or higher than 1150° C. and satisfies a relationship of y≦1E-5exp (21541/T).
摘要翻译：一种半导体装置的制造方法，其特征在于，在半导体基板的由第一原子构成的表面上形成有与半导体基板的表面的面积为5〜30％的开口率y的开口的开口部; 在所述开口中形成外延层，所述外延层由含有15〜25％的浓度的第二原子的混合晶体构成，所述第二原子的晶格常数不同于所述第一原子的晶格常数; 将杂质离子注入到外延层中; 并在预定温度T下进行活化退火，预定温度T等于或高于1150℃，并且满足y＆nlE; 1E-5exp（21541 / T）的关系。

5. 发明授权

US07935235B2 Gas sensor with sealing structure 有权
标题翻译：具有密封结构的气体传感器
公开(公告)号：US07935235B2
公开(公告)日：2011-05-03
申请号：US11971705
申请日：2008-01-09
申请人： Kouji Matsuo , Satoshi Ishikawa
发明人： Kouji Matsuo , Satoshi Ishikawa
IPC分类号： G01N27/407
CPC分类号： G01N27/4077 , Y10T29/49929
摘要： In a method of manufacturing a sensor, firstly, a plate-type detection element is inserted through an element-insertion through-hole of a first powder-compacted ring. Secondly, a flange section including at least the first powder-compacted ring is integrally assembled to the plate-type detection element, applying axially compressive pressure to the first powder-compacted ring so as to compressively deform the first powder-compacted ring such that the cross-sectional area of the element-insertion through-hole is reduced. Thirdly, the flange section is engaged, directly or via an intermediate member, with the stepped portion of the metallic shell at the time of disposing of the plate-type detection element in the through-hole of the metallic shell. A sensor prepared by the method is also disclosed.
摘要翻译：在制造传感器的方法中，首先，通过第一粉末压实环的元件插入通孔插入板型检测元件。其次，至少包括第一粉末压实环的凸缘部分一体地组装到板式检测元件上，对第一粉末压实环施加轴向压缩压力，以使第一粉末压实环压缩变形，使得元件插入通孔的横截面积减小。第三，当将板状检测元件设置在金属外壳的通孔中时，凸缘部分直接或经由中间构件与金属外壳的台阶部分接合。还公开了通过该方法制备的传感器。

6. 发明授权

US07745073B2 Method for manufacturing a semiconductor device, stencil mask and method for manufacturing a the same 失效
标题翻译：半导体器件的制造方法，模板掩模及其制造方法
公开(公告)号：US07745073B2
公开(公告)日：2010-06-29
申请号：US12289895
申请日：2008-11-06
申请人： Kyoichi Suguro , Takeshi Shibata , Kazuyoshi Sugihara , Kouji Matsuo
发明人： Kyoichi Suguro , Takeshi Shibata , Kazuyoshi Sugihara , Kouji Matsuo
IPC分类号： G03F9/00
CPC分类号： B82Y10/00 , C23C14/042 , C23C14/48 , G03F1/20 , H01J2237/0453 , H01J2237/31788 , H01L21/266 , Y10T428/24273
摘要： Preparing a stencil mask comprising a silicon thin film in which an opening for selectively irradiating charged particles to a semiconductor substrate is provided and whose irradiation surface on which the charged particles are irradiated is implanted with an impurity, and selectively irradiating charged particles to the semiconductor substrate using the stencil mask which is opposingly arranged on the semiconductor substrate.
摘要翻译：制备包括硅薄膜的模板掩模，其中用于选择性地将带电粒子照射到半导体基板的开口，并且其上照射有带电粒子的照射面被注入杂质，并且将带电粒子选择性地照射到半导体衬底使用相对设置在半导体衬底上的模板掩模。

7. 发明申请

US20080116068A1 METHOD OF MANUFACTURING SENSOR AND SENSOR 有权
标题翻译：制造传感器和传感器的方法
公开(公告)号：US20080116068A1
公开(公告)日：2008-05-22
申请号：US11971705
申请日：2008-01-09
申请人： Kouji Matsuo , Satoshi Ishikawa
发明人： Kouji Matsuo , Satoshi Ishikawa
IPC分类号： G01N27/26
CPC分类号： G01N27/4077 , Y10T29/49929
摘要： In a method of manufacturing a sensor, firstly, a plate-type detection element is inserted through an element-insertion through-hole of a first powder-compacted ring. Secondly, a flange section including at least the first powder-compacted ring is integrally assembled to the plate-type detection element, applying axially compressive pressure to the first powder-compacted ring so as to compressively deform the first powder-compacted ring such that the cross-sectional area of the element-insertion through-hole is reduced. Thirdly, the flange section is engaged, directly or via an intermediate member, with the stepped portion of the metallic shell at the time of disposing of the plate-type detection element in the through-hole of the metallic shell. A sensor prepared by the method is also disclosed.
摘要翻译：在制造传感器的方法中，首先，通过第一粉末压实环的元件插入通孔插入板型检测元件。其次，至少包括第一粉末压实环的凸缘部分一体地组装到板式检测元件上，对第一粉末压实环施加轴向压缩压力，以使第一粉末压实环压缩变形，使得元件插入通孔的横截面积减小。第三，当将板状检测元件设置在金属外壳的通孔中时，凸缘部分直接或经由中间构件与金属外壳的台阶部分接合。还公开了通过该方法制备的传感器。

8. 发明申请

US20070238255A1 Semiconductor device and manufacturing method of the same 失效
标题翻译：半导体器件及其制造方法相同
公开(公告)号：US20070238255A1
公开(公告)日：2007-10-11
申请号：US11649752
申请日：2007-01-05
申请人： Kiyotaka Miyano , Ichiro Mizushima , Kouji Matsuo
发明人： Kiyotaka Miyano , Ichiro Mizushima , Kouji Matsuo
IPC分类号： H01L21/336
CPC分类号： H01L29/1054 , H01L21/30625 , H01L21/324 , H01L29/165 , H01L29/4916 , H01L29/495 , H01L29/665 , H01L29/66545 , H01L29/6659 , H01L29/66606 , H01L29/66621
摘要： A semiconductor device includes: a layer provided on or above a semiconductor substrate, having an opening, and containing Si and Ge; and a gate provided at a position corresponding to the opening. It is possible to provide a semiconductor device and a manufacturing method of the same which realize easy control of a recess amount and reduction in damage at the time of the recessing.
摘要翻译：半导体器件包括：设置在半导体衬底上或上方的具有开口并且包含Si和Ge的层; 以及设置在与开口相对应的位置处的门。可以提供一种半导体器件及其制造方法，其实现容易控制凹陷量并减少凹陷时的损伤。

9. 发明申请

US20060237315A1 Gas sensor 审中-公开
标题翻译：气体传感器
公开(公告)号：US20060237315A1
公开(公告)日：2006-10-26
申请号：US11410936
申请日：2006-04-26
申请人： Kouji Matsuo , Keiichi Noda , Yuichi Yamada
发明人： Kouji Matsuo , Keiichi Noda , Yuichi Yamada
IPC分类号： G01N27/26
CPC分类号： F02D41/1454 , F01N11/007 , G01N27/4062 , G01N27/407
摘要： A gas sensor 100 includes: a cylindrical metal shell 110; a gas detection element 120; a cylindrical sleeve 170 at least partially located inside the metal shell 110, and an axial hole 170c penetrating through the sleeve and accommodating the gas detection element 120 therein; and a connector 180 joined to a rear end portion of the gas detection element 120 and spaced apart from the sleeve 170, the connector 180 including a plurality of connector terminal portions 182 to 186 electrically connected to corresponding electrode terminal portions 125 to 129.
摘要翻译：气体传感器100包括：圆柱形金属壳110; 气体检测元件120; 至少部分地位于金属外壳110内部的圆柱形套筒170和穿过套筒并将气体检测元件120容纳在其中的轴向孔170c; 以及连接到气体检测元件120的后端部并且与套筒170间隔开的连接器180，连接器180包括电连接到对应的电极端子部125至129的多个连接器端子部分182至186。

10. 发明申请

US20060038241A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20060038241A1
公开(公告)日：2006-02-23
申请号：US11256093
申请日：2005-10-24
申请人： Kouji Matsuo
发明人： Kouji Matsuo
IPC分类号： H01L29/76
CPC分类号： H01L27/10873 , H01L21/28114 , H01L21/823807 , H01L21/823814 , H01L21/823842 , H01L27/10894 , H01L27/10897 , H01L29/66545 , H01L29/66613 , H01L29/7834
摘要： A semiconductor device comprising a semiconductor substrate having a recess whose depth is not more than 6 nm, a source region and a drain region which are formed in a surface region of the semiconductor substrate so as to sandwich the recess, each of the source region and the drain region being constituted of an extension region and a contact junction region, a gate insulating film formed between the source region and the drain region in the semiconductor substrate, and a gate electrode formed on the gate insulating film.
摘要翻译：一种半导体器件，包括具有深度不大于6nm的凹部的半导体衬底，形成在所述半导体衬底的表面区域中以形成所述凹部的源极区域和漏极区域，所述源极区域和漏极区域的每个源极区域和所述漏极区域由延伸区域和接触区域构成，形成在所述半导体衬底中的所述源极区域和所述漏极区域之间的栅极绝缘膜以及形成在所述栅极绝缘膜上的栅电极。

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