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1. 发明授权

US06940458B2 Electronic equipment and antenna mounting printed-circuit board 失效
标题翻译：电子设备和天线安装印刷电路板
公开(公告)号：US06940458B2
公开(公告)日：2005-09-06
申请号：US10721671
申请日：2003-11-25
申请人： Kouichi Mukai , Shuichiro Yasuda , Kenji Asakura , Hidenobu Muranaka
发明人： Kouichi Mukai , Shuichiro Yasuda , Kenji Asakura , Hidenobu Muranaka
IPC分类号： H01Q1/24 , H01Q1/36 , H01Q1/38 , H01Q1/40 , H01Q21/24 , H01Q1/48
CPC分类号： H01Q1/36 , H01Q1/243 , H01Q1/40 , H01Q21/24
摘要： A PDA includes a printed-circuit board on which at least one printed antenna pair having two chip-like printed antennas, which receive linearly polarized signals and are disposed along axes orthogonal to each other, is mounted. In each of the printed antennas, an open end is formed of at least two antenna conductors separated from each other. Besides, in the printed-circuit board, a ground required by one or plural other modules is disposed so as to surround a surrounding area of at least three sides of four sides forming a rectangular section in each of the printed antennas, and each of the printed antennas is disposed and mounted so that a remaining one side faces an edge portion of the printed-circuit board. While the PDA can receive circularly polarized signals very effectively, the degree of freedom in layout is greatly expanded and miniaturization can be realized.
摘要翻译： PDA包括印刷电路板，其上安装有至少一个具有两个片状印刷天线的印刷天线对，其接收线偏振信号并且沿着彼此正交的轴设置。在每个印刷天线中，开口端由彼此分离的至少两个天线导体形成。此外，在印刷电路板中，设置一个或多个其他模块所需的地面，以便围绕在每个印刷天线中形成矩形截面的四边形的至少三边的至少三边的周围区域，并且布置和安装印刷天线，使得剩余的一侧面对印刷电路板的边缘部分。虽然PDA可以非常有效地接收圆偏振信号，但是布局自由度大大地扩大并且可以实现小型化。

2. 发明授权

US07034750B2 Antenna mounting printed-circuit board 失效
标题翻译：天线安装印刷电路板
公开(公告)号：US07034750B2
公开(公告)日：2006-04-25
申请号：US10694598
申请日：2003-10-27
申请人： Kenji Asakura , Hidenobu Muranaka , Shuichiro Yasuda
发明人： Kenji Asakura , Hidenobu Muranaka , Shuichiro Yasuda
IPC分类号： H01Q1/38
CPC分类号： H01Q1/2275 , H01Q1/22 , H01Q1/2266 , H01Q1/243 , H01Q1/38 , H01Q9/0421 , H05K1/16
摘要： A chip-like printed antenna in which an open end is formed by at least two antenna conductors separated from each other is mounted on a printed-circuit board. A ground required by one or plural other modules is disposed and mounted on the printed-circuit board so as to surround a remaining area of a surrounding area of the printed antenna except a partial area as indicated by oblique line parts. By this, in the printed-circuit board , a radiation electric field does not come to have a dipole mode, but is formed into a balloon shape and is radiated in one direction as indicated by a broken line.
摘要翻译：其中开口端由彼此分离的至少两个天线导体形成的芯片状印刷天线安装在印刷电路板上。一个或多个其他模块所需的地面被布置和安装在印刷电路板上，以便围绕除了斜线部分所示的部分区域之外的打印天线的周围区域的剩余区域。由此，在印刷电路板中，辐射电场不会具有偶极模式，而是形成为气球形状，并且如虚线所示沿一个方向辐射。

3. 发明授权

US08912516B2 Memory element with ion source layer and memory device 有权
标题翻译：具有离子源层和存储器件的存储元件
公开(公告)号：US08912516B2
公开(公告)日：2014-12-16
申请号：US13527779
申请日：2012-06-20
申请人： Kazuhiro Ohba , Tetsuya Mizuguchi , Shuichiro Yasuda , Masayuki Shimuta , Katsuhisa Aratani
发明人： Kazuhiro Ohba , Tetsuya Mizuguchi , Shuichiro Yasuda , Masayuki Shimuta , Katsuhisa Aratani
IPC分类号： H01L29/02 , H01L27/24 , H01L45/00 , G11C13/00
CPC分类号： H01L45/085 , G11C13/0007 , G11C2213/11 , G11C2213/15 , G11C2213/55 , G11C2213/56 , G11C2213/79 , H01L27/2436 , H01L27/2472 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/16 , H01L45/1608
摘要： A memory element, including: a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer containing an oxide, and the resistance change layer being provided on the first electrode side, and an ion source layer in a stacking structure of two or more of a unit ion source layer, the unit ion source layer including a first layer and a second layer, the first layer containing one or more of chalcogen elements of tellurium (Te), sulfur (S), and selenium (Se) and an easy-to-move element that is easy to move in the memory layer, and having a density distribution of the easy-to-move element from the first electrode to the second electrode, and the second layer containing a difficult-to-move element that is difficult to move in the memory layer.
摘要翻译：一种存储元件，包括：第一电极，存储层和第二电极。存储层包括含有氧化物的电阻变化层和设置在第一电极侧的电阻变化层，以及设置在单位离子源层中的两个以上的层叠结构的离子源层，单位离子源层包括第一层和第二层，第一层含有一种或多种碲（Te），硫（S）和硒（Se）的硫族元素元素，以及容易移动的元素，其易于在存储层，并且具有易于移动的元件从第一电极到第二电极的密度分布，并且第二层包含难以在存储层中移动的难移动元件。

4. 发明授权

US08687404B2 Memory element and drive method for the same, and memory device 有权
标题翻译：存储器元件和驱动方法相同，和存储器件
公开(公告)号：US08687404B2
公开(公告)日：2014-04-01
申请号：US13164945
申请日：2011-06-21
申请人： Masayuki Shimuta , Jun Sumino , Shuichiro Yasuda
发明人： Masayuki Shimuta , Jun Sumino , Shuichiro Yasuda
IPC分类号： G11C11/00
CPC分类号： G11C13/0009 , G11C2213/75 , G11C2213/79 , H01L27/2436 , H01L27/2481 , H01L45/04 , H01L45/06 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/144 , H01L45/146
摘要： A memory element capable of increasing capacity with an improvement of distribution of resistance in the high-resistance state, a drive method therefor, and a memory device are provided. The memory element includes first and second electrodes, and a plurality of resistance change elements electrically connected in series between the first and second electrodes, whose resistance values are reversibly changeable in response to application of a voltage to the first and second electrodes, and changeable to the same resistance state relative to the voltage application.
摘要翻译：提供了能够通过改善高电阻状态下的电阻分布来提高容量的存储元件，其驱动方法和存储器件。存储元件包括第一和第二电极以及串联电连接在第一和第二电极之间的多个电阻变化元件，其电阻值可响应于向第一和第二电极施加电压而可逆地改变，并且可改变为相对于电压施加相同的电阻状态。

5. 发明申请

US20120294063A1 MEMORY ELEMENT AND MEMORY DEVICE 有权
标题翻译：存储元件和存储器件
公开(公告)号：US20120294063A1
公开(公告)日：2012-11-22
申请号：US13403560
申请日：2012-02-23
申请人： Tetsuya Mizuguchi , Kazuhiro Ohba , Shuichiro Yasuda , Masayuki Shimuta , Akira Kouchiyama , Hiroaki Sei
发明人： Tetsuya Mizuguchi , Kazuhiro Ohba , Shuichiro Yasuda , Masayuki Shimuta , Akira Kouchiyama , Hiroaki Sei
IPC分类号： H01L47/00 , G11C11/00
CPC分类号： G11C13/0011 , G11C2213/56 , H01L27/2436 , H01L27/2472 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/144 , H01L45/146
摘要： There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
摘要翻译：提供了以低电流良好地操作并具有令人满意的保持特性的存储元件和存储器件。存储元件依次包括第一电极，存储层和第二电极。存储层包括设置在第一电极侧上的电阻变化层，并且处于单层或多层结构，其包括含有最高百分比的碲（Te）作为阴离子组分的层，以及离子源层设置在第二电极侧，并且包含金属元素和包含碲（Te），硫（S）和硒（Se）的一种或多种硫族元素，铝（Al）为27.7原子％以上且47.4原子％以下。

6. 发明授权

US08213214B2 Storage device and information rerecording method 有权
标题翻译：存储设备和信息记录方法
公开(公告)号：US08213214B2
公开(公告)日：2012-07-03
申请号：US12747413
申请日：2008-12-11
申请人： Tomohito Tsushima , Tsunenori Shiimoto , Shuichiro Yasuda
发明人： Tomohito Tsushima , Tsunenori Shiimoto , Shuichiro Yasuda
IPC分类号： G11C11/00
CPC分类号： G11C13/0064 , G11C13/0069 , G11C2013/0071 , G11C2013/009 , G11C2213/56 , G11C2213/79
摘要： A storage device that improves ability of adjusting a resistance value level in recording and enables stable verification control is provided. VWL supplied from a second power source to a control terminal of a transistor is increased (increase portion: ΔVWL) for every rerecording by verification control by a WL adjustment circuit. In the case where a variable resistive element is able to record multiple values, ΔVWL is a value variable for every resistance value level of multiple value information. That is, ΔVWL is a value variable according to magnitude relation of a variation range of recording resistance of the variable resistive element due to a current. In the region where the variation range of the recording resistance is large (source-gate voltage VGS of the transistor is small), ΔVWL is small, while in the region where the variation range of the recording resistance is small (VGS is large), ΔVWL is large.
摘要翻译：提供一种存储装置，其提高了在记录中调整电阻值电平的能力并且实现了稳定的验证控制。通过WL调整电路的验证控制，每次重新录制时，从第二电源向晶体管的控制端子提供的VWL增加（增加部分：＆Dgr; VWL）。在可变电阻元件能够记录多个值的情况下，＆Dgr; VWL是多值信息的每个电阻值电平的值变量。也就是说，＆Dgr; VWL是根据由于电流引起的可变电阻元件的记录电阻的变化范围的大小关系的值变量。在记录电阻的变化范围大（晶体管的源极栅极电压VGS小）的区域中，＆Dgr; VWL小，而在记录电阻的变化范围小（VGS大的区域）），＆Dgr; VWL很大。

7. 发明申请

US20120068146A1 MEMORY ELEMENT AND MEMORY DEVICE 有权
标题翻译：存储元件和存储器件
公开(公告)号：US20120068146A1
公开(公告)日：2012-03-22
申请号：US13227870
申请日：2011-09-08
申请人： Shinnosuke Hattori , Toshiyuki Kunikiyo , Mitsunori Nakamoto , Shuichiro Yasuda
发明人： Shinnosuke Hattori , Toshiyuki Kunikiyo , Mitsunori Nakamoto , Shuichiro Yasuda
IPC分类号： H01L47/00 , H01L27/24
CPC分类号： H01L27/2472 , G11C13/0002 , G11C13/0007 , G11C2213/55 , G11C2213/56 , H01L27/2436 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/144 , H01L45/146
摘要： There are provided a memory element and a memory device with a smaller range of element-to-element variation of electrical characteristics. The memory element includes a first electrode, a memory layer, and a second layer in this order. The memory layer includes a resistance change layer including a plurality of layers varying in diffusion coefficient of mobile atoms, and an ion source layer disposed between the resistance change layer and the second electrode.
摘要翻译：提供了具有较小范围的电特性元件间元件变化的存储元件和存储器件。存储元件依次包括第一电极，存储层和第二层。存储层包括电阻变化层，该电阻变化层包括以移动原子的扩散系数变化的多个层，以及设置在电阻变化层和第二电极之间的离子源层。

8. 发明申请

US20110175049A1 MEMORY COMPONENT AND MEMORY DEVICE 有权
标题翻译：存储组件和存储器件
公开(公告)号：US20110175049A1
公开(公告)日：2011-07-21
申请号：US13004976
申请日：2011-01-12
申请人： Shuichiro Yasuda , Katsuhisa Aratani , Kazuhiro Ohba , Hiroaki Sei
发明人： Shuichiro Yasuda , Katsuhisa Aratani , Kazuhiro Ohba , Hiroaki Sei
IPC分类号： H01L45/00
CPC分类号： H01L45/142 , G11C13/0007 , G11C2213/51 , G11C2213/56 , H01L27/2436 , H01L27/2472 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/143 , H01L45/144 , H01L45/1625
摘要： A memory component includes: a first electrode; a memory layer; and a second electrode in this order, wherein the memory layer includes a high resistance layer which includes tellurium (Te) as the chief component among anion components and is formed on the first electrode side; and an ion source layer which includes at least one kind of metal element and at least one kind of chalcogen element among tellurium (Te), sulfur (S) and selenium (Se) and is formed on the second electrode side.
摘要翻译：存储器组件包括：第一电极; 记忆层; 和第二电极，其中，所述存储层包括高电阻层，所述高电阻层包含碲（Te）作为阴离子成分中的主要成分，并形成在所述第一电极侧上; 以及离子源层，其在碲（Te），硫（S）和硒（Se）中包含至少一种金属元素和至少一种硫属元素，并且形成在第二电极侧。

9. 发明申请

US20110155988A1 MEMORY ELEMENT AND MEMORY DEVICE 有权
标题翻译：存储元件和存储器件
公开(公告)号：US20110155988A1
公开(公告)日：2011-06-30
申请号：US13060351
申请日：2009-08-28
申请人： Kazuhiro Ohba , Tetsuya Mizuguchi , Shuichiro Yasuda
发明人： Kazuhiro Ohba , Tetsuya Mizuguchi , Shuichiro Yasuda
IPC分类号： H01L45/00
CPC分类号： H01L45/085 , H01L27/2436 , H01L27/2472 , H01L45/1233 , H01L45/1266 , H01L45/146 , H01L45/1625 , H01L45/1633
摘要： Provided are a memory element and a memory device. A memory layer is provided with an ion source layer. The ion source layer includes Zr (zirconium), Cu (copper), and Al (aluminum) as a metal element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogen element). The amount of Al in the ion source layer is 30 to 50 atomic percent. The amount of Zr is preferably 7.5 to 25 atomic percent, and more preferably, the composition ratio of Zr to the chalcogen element in total included in the ion source layer (=Zr (atomic percent)/chalcogen element in total (atomic percent)) falls within a range from 0.2 to 0.74.
摘要翻译：提供了存储器元件和存储器件。存储层设置有离子源层。离子源层包括作为金属元素的Zr（锆），Cu（铜）和Al（铝）以及诸如S（硫），Se（硒）和Te（碲）的离子导电材料（硫属元素）。离子源层中的Al的量为30〜50原子％。 Zr的含量优选为7.5〜25原子％，更优选的是，离子源层（= Zr（原子％）/硫族元素）总计中的Zr与硫属元素的组成比（原子百分比）在0.2至0.74的范围内。

10. 发明授权

US09202560B2 Memory element and memory device with ion source layer and resistance change layer 有权
标题翻译：具有离子源层和电阻变化层的存储元件和存储器件
公开(公告)号：US09202560B2
公开(公告)日：2015-12-01
申请号：US13403560
申请日：2012-02-23
申请人： Tetsuya Mizuguchi , Kazuhiro Ohba , Shuichiro Yasuda , Masayuki Shimuta , Akira Kouchiyama , Hiroaki Sei
发明人： Tetsuya Mizuguchi , Kazuhiro Ohba , Shuichiro Yasuda , Masayuki Shimuta , Akira Kouchiyama , Hiroaki Sei
IPC分类号： H01L23/52 , G11C11/00 , G11C13/00 , H01L45/00 , H01L27/24
CPC分类号： G11C13/0011 , G11C2213/56 , H01L27/2436 , H01L27/2472 , H01L45/085 , H01L45/1233 , H01L45/1266 , H01L45/141 , H01L45/144 , H01L45/146
摘要： There are provided a memory element and a memory device excellently operating at a low current, and having the satisfactory retention characteristics. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and being in a single- or multi-layer structure including a layer containing a highest percentage of tellurium (Te) as an anionic component, and an ion source layer disposed on the second electrode side, and containing a metallic element and one or more chalcogen elements including tellurium (Te), sulfur (S), and selenium (Se) with aluminum (Al) of 27.7 atomic % or more but 47.4 atomic % or less.
摘要翻译：提供了以低电流良好地操作并具有令人满意的保持特性的存储元件和存储器件。存储元件依次包括第一电极，存储层和第二电极。存储层包括设置在第一电极侧上的电阻变化层，并且处于单层或多层结构，其包括含有最高百分比的碲（Te）作为阴离子组分的层，以及离子源层设置在第二电极侧，并且包含金属元素和包含碲（Te），硫（S）和硒（Se）的一种或多种硫族元素，铝（Al）为27.7原子％以上且47.4原子％以下。

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