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    • 1. 发明授权
    • Voltage monitoring circuit
    • 电压监控电路
    • US5568074A
    • 1996-10-22
    • US309899
    • 1994-09-20
    • Kouichi KitaguchiYoshihide Okumura
    • Kouichi KitaguchiYoshihide Okumura
    • H03F3/45G01R19/165H03F3/08H03K5/22H03K17/04
    • H03F3/085G01R19/1659G01R19/16557
    • The positive input terminal (1), the negative input terminal (2) and the differential amplifier (10) are connected to the voltage converting circuit (9a). The differential amplifier (10) is composed of the operational amplifier (6) and the resistors (5a, 5b, 5c and 5d). The voltage converting circuit (9a) includes NPN transistors (91, 92 and 93). The base of the transistor (91) is connected to the positive input terminal (1) and the base of the transistor (92) is connected to the reference potential input end (3) to which the reference potential (V.sub.x) is applied, respectively. The collectors of the transistors (91 and 92) are connected to the potential point (81) in common and the emitters are connected to the other end of the resistor (5a). The base of the transistor (93) is connected to the negative input terminal (2), the collector is connected to the potential point (81) and the emitter is connected to the other end of the resistor (5c). It is prevented that the voltage applied to the differential amplifier (10) considerably differs from the desired value (V.phi.). The delay time of the output potential for a sharp change in the input voltage is shortened.
    • 正输入端(1),负输入端(2)和差分放大器(10)连接到电压转换电路(9a)。 差分放大器(10)由运算放大器(6)和电阻(5a,5b,5c,5d)构成。 电压转换电路(9a)包括NPN晶体管(91,92和93)。 晶体管(91)的基极连接到正输入端(1),晶体管(92)的基极分别与施加了基准电位(Vx)的基准电位输入端(3)连接 。 晶体管(91和92)的集电极共同连接到电位点(81),发射极连接到电阻器(5a)的另一端。 晶体管(93)的基极连接到负输入端子(2),集电极连接到电位点(81),发射极连接到电阻器(5c)的另一端。 防止施加到差分放大器(10)的电压与期望值(V phi)显着不同。 输入电压急剧变化的输出电位的延迟时间缩短。