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1. 发明申请

US20050009282A1 Semiconductor apparatus 有权
标题翻译：半导体装置
公开(公告)号：US20050009282A1
公开(公告)日：2005-01-13
申请号：US10913478
申请日：2004-08-09
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L21/316 , H01L21/28 , H01L21/336 , H01L21/337 , H01L27/12 , H01L29/10 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/786 , H01L21/00
CPC分类号： H01L29/78696 , H01L21/28194 , H01L21/28211 , H01L27/1203 , H01L29/1054 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66742 , H01L29/66893 , H01L29/78648 , H01L29/78654 , H01L29/78687
摘要： A semiconductor apparatus includes a substrate, a buffer layer made of a monocrystal semiconductor material and formed on the substrate, a strained-Si layer formed on the buffer layer and having a lattice constant different from that of the buffer layer, a monocrystal insulating film formed on the strained-Si layer and made of a material having a rare earth structure with a lattice constant different from that of Si, and an electrode formed on the insulating film.
摘要翻译：半导体装置包括基板，由单晶半导体材料制成并形成在基板上的缓冲层，形成在缓冲层上并具有不同于缓冲层的晶格常数的应变Si层，形成单晶绝缘膜在应变Si层上并且由具有不同于Si的晶格常数的稀土结构的材料制成，以及形成在绝缘膜上的电极。

2. 发明授权

US06943385B2 Semiconductor apparatus with monocrystal insulating film 有权
标题翻译：具有单晶绝缘膜的半导体装置
公开(公告)号：US06943385B2
公开(公告)日：2005-09-13
申请号：US10627648
申请日：2003-07-28
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L21/316 , H01L21/28 , H01L21/336 , H01L21/337 , H01L27/12 , H01L29/10 , H01L29/49 , H01L29/51 , H01L29/78 , H01L29/786 , H01L31/0328 , H01L31/0336 , H01L31/072 , H01L31/109
CPC分类号： H01L29/78696 , H01L21/28194 , H01L21/28211 , H01L27/1203 , H01L29/1054 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66742 , H01L29/66893 , H01L29/78648 , H01L29/78654 , H01L29/78687
摘要： A semiconductor apparatus includes a substrate, a buffer layer made of a monocrystal semiconductor material and formed on the substrate, a strained-Si layer formed on the buffer layer and having a lattice constant different from that of the buffer layer, a monocrystal insulating film formed on the strained-Si layer and made of a material having a rare earth structure with a lattice constant different from that of Si, and an electrode formed on the insulating film.
摘要翻译：半导体装置包括基板，由单晶半导体材料制成并形成在基板上的缓冲层，形成在缓冲层上并具有不同于缓冲层的晶格常数的应变Si层，形成单晶绝缘膜在应变Si层上并且由具有不同于Si的晶格常数的稀土结构的材料制成，以及形成在绝缘膜上的电极。

3. 发明申请

US20050189610A1 Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050189610A1
公开(公告)日：2005-09-01
申请号：US11064001
申请日：2005-02-24
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L21/762 , H01L21/8234 , H01L21/8238 , H01L21/84 , H01L27/08 , H01L27/088 , H01L27/092 , H01L27/10 , H01L29/10 , H01L29/51 , H01L29/786 , H01L31/0328
CPC分类号： H01L21/76267 , H01L21/76243 , H01L21/823878 , H01L21/84 , H01L29/1054 , H01L29/51
摘要： A method of manufacturing a semiconductor device, includes selectively forming a mask having an opening on a semiconductor substrate, ion-implanting oxygen to a predetermined depth position of the substrate from a surface of the substrate exposed in the opening of the mask, carrying out annealing with respect to the substrate to oxidize an ion implantation region so that an insulating layer is formed, and forming a first semiconductor element on a region of the semiconductor substrate on the insulating layer, and forming a second semiconductor element on a region other than the region formed with the insulating layer.
摘要翻译：一种制造半导体器件的方法，包括：选择性地形成在半导体衬底上具有开口的掩模，从暴露在掩模开口中的衬底的表面离子注入到衬底的预定深度位置，进行退火相对于所述基板氧化离子注入区域，从而形成绝缘层，并且在所述绝缘层上的所述半导体基板的区域上形成第一半导体元件，并且在所述区域以外的区域上形成第二半导体元件形成有绝缘层。

4. 发明授权

US07229892B2 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07229892B2
公开(公告)日：2007-06-12
申请号：US11064943
申请日：2005-02-25
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L21/762 , H01L21/8232
CPC分类号： H01L21/76283 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/76275 , H01L21/823481 , H01L21/84 , H01L27/1203 , H01L29/1054
摘要： A method of manufacturing a semiconductor device, includes preparing a semiconductor substrate, bonding a first semiconductor layer onto a part of the semiconductor substrate with a first insulating layer interposed therebetween, forming a second insulating layer on a side of the first semiconductor layer, epitaxially growing a second semiconductor layer in a region on the semiconductor substrate other than a region formed with the first insulating layer, forming a first semiconductor element in the first semiconductor layer on the first insulating layer, and forming a second semiconductor element in the second semiconductor layer on the second insulating layer.
摘要翻译：一种制造半导体器件的方法，包括：制备半导体衬底，将第一半导体层与介于其间的第一绝缘层接合在半导体衬底的一部分上，在第一半导体层侧形成第二绝缘层，外延生长在除了形成有第一绝缘层的区域之外的半导体衬底上的区域中的第二半导体层，在第一绝缘层上的第一半导体层中形成第一半导体元件，以及在第二半导体层中形成第二半导体元件第二绝缘层。

5. 发明授权

US07119385B2 Semiconductor apparatus having first and second gate electrodes 有权
标题翻译：具有第一和第二栅电极的半导体装置
公开(公告)号：US07119385B2
公开(公告)日：2006-10-10
申请号：US10913478
申请日：2004-08-09
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H01L29/78696 , H01L21/28194 , H01L21/28211 , H01L27/1203 , H01L29/1054 , H01L29/4908 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66742 , H01L29/66893 , H01L29/78648 , H01L29/78654 , H01L29/78687
摘要： A semiconductor apparatus includes a substrate, a buffer layer made of a monocrystal semiconductor material and formed on the substrate, a strained-Si layer formed on the buffer layer and having a lattice constant different from that of the buffer layer, a monocrystal insulating film formed on the strained-Si layer and made of a material having a rare earth structure with a lattice constant different from that of Si, and an electrode formed on the insulating film.
摘要翻译：半导体装置包括基板，由单晶半导体材料制成并形成在基板上的缓冲层，形成在缓冲层上并具有不同于缓冲层的晶格常数的应变Si层，形成单晶绝缘膜在应变Si层上并且由具有不同于Si的晶格常数的稀土结构的材料制成，以及形成在绝缘膜上的电极。

6. 发明授权

US07033913B2 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07033913B2
公开(公告)日：2006-04-25
申请号：US10736593
申请日：2003-12-17
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L21/30
CPC分类号： H01L29/78696 , H01L29/1054 , H01L29/66742 , H01L29/78681 , H01L29/78687
摘要： A semiconductor device comprises a base substrate, an insulating film formed on the substrate, an undoped first and lattice-relaxed semiconductor layer formed on the insulating film, a second semiconductor layer having a tensile strain and formed on the first semiconductor layer, and a MISFET formed on the second semiconductor layer. Since the MISFET is formed in a strained Si layer, electrons are prevented from scattering in a channel region, improving the electron mobility. Furthermore, since the MISFET is formed in a thin SOI layer having a thickness of 100 nm or less, it is possible to reduce a parasitic capacitance in addition to the improvement of the electron mobility. As a result, the MISFET excellent in drivability can be obtained.
摘要翻译：半导体器件包括基底基板，形成在基板上的绝缘膜，形成在绝缘膜上的未掺杂的第一和晶格弛豫半导体层，具有拉伸应变并形成在第一半导体层上的第二半导体层，以及MISFET 形成在第二半导体层上。由于MISFET形成在应变Si层中，所以防止电子在沟道区域中散射，提高电子迁移率。此外，由于MISFET形成在厚度为100nm以下的薄SOI层中，除了改善电子迁移率之外，还可以减小寄生电容。结果，可以获得驾驶性优异的MISFET。

7. 发明申请

US20050191797A1 Semiconductor device and method of manufacturing the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050191797A1
公开(公告)日：2005-09-01
申请号：US11064943
申请日：2005-02-25
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： C30B1/00 , H01L21/00 , H01L21/02 , H01L21/20 , H01L21/336 , H01L21/36 , H01L21/762 , H01L21/8234 , H01L21/8242 , H01L21/84 , H01L27/08 , H01L27/088 , H01L27/10 , H01L27/108 , H01L27/12 , H01L29/10 , H01L29/78 , H01L29/786
CPC分类号： H01L21/76283 , H01L21/02381 , H01L21/02532 , H01L21/0262 , H01L21/76275 , H01L21/823481 , H01L21/84 , H01L27/1203 , H01L29/1054
摘要： A method of manufacturing a semiconductor device, includes preparing a semiconductor substrate, bonding a first semiconductor layer onto a part of the semiconductor substrate with a first insulating layer interposed therebetween, forming a second insulating layer on a side of the first semiconductor layer, epitaxially growing a second semiconductor layer in a region on the semiconductor substrate other than a region formed with the first insulating layer, forming a first semiconductor element in the first semiconductor layer on the first insulating layer, and forming a second semiconductor element in the second semiconductor layer on the second insulating layer.
摘要翻译：一种制造半导体器件的方法，包括：制备半导体衬底，将第一半导体层与介于其间的第一绝缘层接合在半导体衬底的一部分上，在第一半导体层侧形成第二绝缘层，外延生长在除了形成有第一绝缘层的区域之外的半导体衬底上的区域中的第二半导体层，在第一绝缘层上的第一半导体层中形成第一半导体元件，并且在第二半导体层中形成第二半导体元件第二绝缘层。

8. 发明授权

US06690043B1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06690043B1
公开(公告)日：2004-02-10
申请号：US09717039
申请日：2000-11-22
申请人： Koji Usuda , Shinichi Takagi
发明人： Koji Usuda , Shinichi Takagi
IPC分类号： H01L310328
CPC分类号： H01L29/78696 , H01L29/1054 , H01L29/66742 , H01L29/78681 , H01L29/78687
摘要： A semiconductor device comprises a base substrate, an insulating film formed on the substrate, an undoped first and lattice-relaxed semiconductor layer formed on the insulating film, a second semiconductor layer having a tensile strain and formed on the first semiconductor layer, and a MISFET formed on the second semiconductor layer. Since the MISFET is formed in a strained Si layer, electrons are prevented from scattering in a channel region, improving the electron mobility. Furthermore, since the MISFET is formed in a thin SOI layer having a thickness of 100 nm or less, it is possible to reduce a parasitic capacitance in addition to the improvement of the electron mobility. As a result, the MISFET excellent in drivability can be obtained.
摘要翻译：半导体器件包括基底基板，形成在基板上的绝缘膜，形成在绝缘膜上的未掺杂的第一和晶格弛豫半导体层，具有拉伸应变并形成在第一半导体层上的第二半导体层，以及MISFET 形成在第二半导体层上。由于MISFET形成在应变Si层中，所以防止电子在沟道区域中散射，提高电子迁移率。此外，由于MISFET形成在厚度为100nm以下的薄SOI层中，除了改善电子迁移率之外，还可以减小寄生电容。结果，可以获得驾驶性优异的MISFET。

9. 发明申请

US20070187669A1 Field effect transistor and a method for manufacturing the same 审中-公开
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20070187669A1
公开(公告)日：2007-08-16
申请号：US11783930
申请日：2007-04-13
申请人： Tsutomu Tezuka , Tomohisa Mizuno , Koji Usuda
发明人： Tsutomu Tezuka , Tomohisa Mizuno , Koji Usuda
IPC分类号： H01L31/00
CPC分类号： H01L29/1054 , H01L21/76281 , H01L21/823807 , H01L27/1203 , H01L29/665 , H01L29/66628 , H01L29/66651 , H01L29/66742 , H01L29/78687
摘要： A field effect transistor fabricated in a device isolation region includes a Si1-xGex layer (0
摘要翻译：制造在器件隔离区域中的场效应晶体管包括晶格应变松弛的Si 1-x N x Ge x层（0

10. 发明授权

US6066571A Method of preparing semiconductor surface 失效
标题翻译：制备半导体表面的方法
公开(公告)号：US6066571A
公开(公告)日：2000-05-23
申请号：US4612
申请日：1998-01-08
申请人： Koji Usuda , Keisaku Yamada
发明人： Koji Usuda , Keisaku Yamada
IPC分类号： H01L21/306 , H01L21/302
CPC分类号： H01L21/02052
摘要： A method of preparing a semiconductor work surface comprises the steps of forming an Si monocrystaline substrate including a semiconductor work surface, removing by wet-etching a silicon oxide film formed on the work surface, using HF solution, and washing the work surface by pure water, serving as a washing liquid, of a dissolved oxygen concentration of 500 ppb or lower. The work surface is made of monocrystal and has an orientation a certain amount off the (001) plane. The certain amount is set such that an axis of the work surface has a component inclined with an angle of from 1.degree. to 5.degree. from the [001] direction to a direction. The washing liquid of pure water has a property of etching the Si monocrystal, such that a single or a plurality of surfaces, including the (111) plane, can be preferentially exposed.
摘要翻译：一种制备半导体工作表面的方法包括以下步骤：形成包括半导体工作表面的Si单晶衬底，通过使用HF溶液湿法蚀刻形成在工作表面上的氧化硅膜，并用纯水洗涤工作表面作为洗涤液，溶解氧浓度为500ppb以下。工作表面由单晶制成，并且具有一定的离开（001）平面的方向。一定量被设定为使得工作表面的轴线具有从[001]方向到<010方向倾斜角度为1°至5°的部件。纯水的洗涤液具有蚀刻Si单晶的性质，使得包括（111）面的单个或多个表面可以优先暴露。

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