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1. 发明授权

US5297290A Method and apparatus for interruption processing in multi-processor system 失效
标题翻译：多处理器系统中的中断处理方法和装置
公开(公告)号：US5297290A
公开(公告)日：1994-03-22
申请号：US408731
申请日：1989-09-18
申请人： Koji Masui , Masayuki Tanji
发明人： Koji Masui , Masayuki Tanji
IPC分类号： G06F15/16 , G06F9/46 , G06F13/24 , G06F15/177 , G06F13/14 , G06F13/368
CPC分类号： G06F13/24
摘要： An interruption signal from a common input/output device is coupled to all processors through a common bus, and each processor issues to the common bus its own interruption receipt acceptance or negation state and the respective processors watch and decide individually interruption receipt acceptance or negation states on the common bus of the individual processors. Only one of processors which are ready to accept the receipt of interruption is allowed to accept the receipt of an interruption signal from the common input/output device in accordance with a predetermined priority.
摘要翻译：来自公共输入/输出设备的中断信号通过公共总线耦合到所有处理器，并且每个处理器向公共总线发出其自己的中断接收接受或否定状态，并且各个处理器监视和决定单独的中断接收接收或否定状态在各个处理器的公共总线上。只有一个准备接受中断的接收的处理器被允许根据预定的优先级接受来自公共输入/输出设备的中断信号的接收。

2. 发明授权

US06216236B1 Processing unit for a computer and a computer system incorporating such a processing unit 失效
标题翻译：用于计算机的处理单元和包含这种处理单元的计算机系统
公开(公告)号：US06216236B1
公开(公告)日：2001-04-10
申请号：US09188903
申请日：1998-11-10
申请人： Takeshi Miyao , Manabu Araoka , Tomoaki Nakamura , Masayuki Tanji , Shigenori Kaneko , Koji Masui , Saburou Iijima , Nobuyasu Kanekawa , Shinichiro Kanekawa , Yoshiki Kobayashi , Hiroaki Fukumaru , Katsunori Tagiri
发明人： Takeshi Miyao , Manabu Araoka , Tomoaki Nakamura , Masayuki Tanji , Shigenori Kaneko , Koji Masui , Saburou Iijima , Nobuyasu Kanekawa , Shinichiro Kanekawa , Yoshiki Kobayashi , Hiroaki Fukumaru , Katsunori Tagiri
IPC分类号： G06F1134
CPC分类号： G06F11/187 , G06F11/1064 , G06F11/141 , G06F11/1604 , G06F11/1641 , G06F11/1666 , G06F11/1679 , G06F11/18 , G06F11/181 , G06F11/184 , G06F11/185 , G06F11/20 , G06F11/2007 , G06F11/2028 , G06F11/203 , G06F11/2035 , G06F11/2043 , G06F12/0833 , G11C29/74
摘要： A computer system has a plurality of processing units (2-1,2-2,2-n) connected via one or more system buses (1-1,1-2). Each processing unit (2-1,2-2,2-n) has three or more processors (20-1,20-2,20-3) on a common support board (PL) and controlled by a common clock unit (1000). The three processors (20-1,20-2,20-3) perform the same operation and a fault in a processor (20-1,20-2, 20-3) is detected by comparison of the operations of the three processors (20-1,20-2,20-3). If one processor (20-1,20-2,20-3) fails, the operation can continue in the other two processors (20-1,20-2,20-3) of the processing unit (2-1,2-2,2-n), at least temporarily, before replacement of the entire processing unit (2-1,2-2, 2-n). Furthermore, the processing unit (2-1,2-2,2-n) may have a plurality of clocks (A,B) within the clock unit (1000), with a switching arrangement so that the processors (20-1,20-2,20-n) normally receive clock pulses from a main clock (A), but receive pulses from an auxiliary clock (B) if the main clock (A) fails. Switching between the main and auxiliary clock (A,B) involves comparison of the pulse duration from the clocks (A,B). Additionally, a plurality of cache memories (220,221) may be connected in common to the processors (20-1,20-2,20-3), so that failure of one cache memory (220,221) permits the processing unit (2-1,2-2,2-n) to continue to operate using the other cache memory (220,221). Coherence of the contents of the cache memories (220,221) may be achieved by direct comparison, and a comparison method can also be used to invalidate data in an internal cache memory (2020-1,2020-2,2020-3) of a processor (20-1,20-2,20-3) which differs from that in the external cache memory (220,221). Coherence of protocols may also ensure that data in caches (220,221) of the different processor units (2-1,2-2,2-n) are always correct.
摘要翻译：计算机系统具有经由一个或多个系统总线（1-1,1-2）连接的多个处理单元（2-1,2-2,2-n）。每个处理单元（2-1,2-2,2-n）在公共支撑板（PL）上具有三个或更多个处理器（20-1,20-2,20-3），并由公共时钟单元 1000）。三个处理器（20-1,20-2,20-3）执行相同的操作，并且通过比较三个处理器（20-1,20-2,20-3）的操作来检测处理器（20-1,20-2,20-3）中的故障（20-1,20-2,20-3）。如果一个处理器（20-1,20-2,20-3）失败，则可以在处理单元的其他两个处理器（20-1,20-2,20-3）中继续操作（2-1,2 -2,2-n），至少暂时在更换整个处理单元（2-1,2-2,2-n）之前。此外，处理单元（2-1,2-2,2-n）可以在时钟单元（1000）内具有多个时钟（A，B），具有切换装置，使得处理器（20-1， 20-2,20-n）通常从主时钟（A）接收时钟脉冲，但是如果主时钟（A）发生故障，则从辅助时钟（B）接收脉冲。在主时钟和辅助时钟（A，B）之间切换涉及从时钟（A，B）的脉冲持续时间的比较。另外，多个高速缓冲存储器（220,221）可以共同地连接到处理器（20-1,20-2,20-3），使得一个高速缓冲存储器（220,221）的故障允许处理单元（2-1 ，2

3. 发明授权

US5901281A Processing unit for a computer and a computer system incorporating such a processing unit 失效
标题翻译：用于计算机的处理单元和包含这种处理单元的计算机系统
公开(公告)号：US5901281A
公开(公告)日：1999-05-04
申请号：US434288
申请日：1995-05-03
申请人： Takeshi Miyao , Manabu Araoka , Tomoaki Nakamura , Masayuki Tanji , Shigenori Kaneko , Koji Masui , Saburou Iijima , Nobuyasu Kanekawa , Shinichiro Kanekawa , Yoshiki Kobayashi , Hiroaki Fukumaru , Katsunori Tagiri
发明人： Takeshi Miyao , Manabu Araoka , Tomoaki Nakamura , Masayuki Tanji , Shigenori Kaneko , Koji Masui , Saburou Iijima , Nobuyasu Kanekawa , Shinichiro Kanekawa , Yoshiki Kobayashi , Hiroaki Fukumaru , Katsunori Tagiri
IPC分类号： G06F11/00 , G06F11/14 , G06F11/16 , G06F11/18 , G06F11/20 , G11C29/00 , G06F11/34
CPC分类号： G06F11/187 , G06F11/1064 , G06F11/141 , G06F11/1604 , G06F11/1666 , G06F11/1679 , G06F11/181 , G06F11/184 , G06F11/2007 , G06F11/2028 , G06F11/203 , G06F11/2035 , G06F11/2043 , G06F12/0833 , G06F11/1641 , G06F11/18 , G06F11/185 , G06F11/20 , G11C29/74
摘要： A computer system has a plurality of processing units connected via one or more system buses. Each processing unit has three or more processors on a common support board (PL) and controlled by a common clock unit. The three processors perform the same operation and a fault in a processor is detected by comparison of the operations of the three processors. If one processor fails, the operation can continue in the other two processors of the processing unit, at least temporarily, before replacement of the entire processing unit. Furthermore, the processing unit may have a plurality of clocks (A,B) within the clock unit, with a switching arrangement so that the processors normally receive clock pulses from a main clock (A), but receive pulses from an auxiliary clock (B) if the main clock (A) fails. Switching between the main and auxiliary clock (A,B) involves comparison of the pulse duration from the clocks (A,B). Additionally, a plurality of cache memories may be connected in common to the processors, so that failure of one cache memory permits the processing unit to continue to operate using the other cache memory. Coherence of the contents of the cache memories may be achieved by direct comparison, and a comparison method can also be used to invalidate data in an internal cache memory of a processor which differs from that in the external cache memory. Coherence of protocols may also ensure that data in caches of the different processor units are always correct.
摘要翻译：计算机系统具有经由一个或多个系统总线连接的多个处理单元。每个处理单元在公共支撑板（PL）上具有三个或更多个处理器，并由公共时钟单元控制。三个处理器执行相同的操作，并且通过比较三个处理器的操作来检测处理器中的故障。如果一个处理器发生故障，则在更换整个处理单元之前，至少暂时在处理单元的其他两个处理器中继续操作。此外，处理单元可以在时钟单元内具有多个时钟（A，B），具有切换装置，使得处理器通常从主时钟（A）接收时钟脉冲，但是从辅助时钟（B ）如果主时钟（A）失败。在主时钟和辅助时钟（A，B）之间切换涉及从时钟（A，B）的脉冲持续时间的比较。此外，多个高速缓冲存储器可以共同地连接到处理器，使得一个高速缓冲存储器的故障允许处理单元使用另一高速缓冲存储器继续操作。可以通过直接比较来实现高速缓冲存储器的内容的一致性，并且还可以使用比较方法来使处理器的内部高速缓冲存储器中的数据与外部高速缓冲存储器中的数据不同。协议的一致性还可以确保不同处理器单元的高速缓存中的数据总是正确的。

4. 发明授权

US5345566A Method and apparatus for controlling dual bus system 失效
标题翻译：用于控制双总线系统的方法和装置
公开(公告)号：US5345566A
公开(公告)日：1994-09-06
申请号：US825063
申请日：1992-01-24
申请人： Masayuki Tanji , Yoshihiro Miyazaki , Hiroaki Fukumaru , Syoji Yamaguchi , Koji Masui , Hisao Ogawa
发明人： Masayuki Tanji , Yoshihiro Miyazaki , Hiroaki Fukumaru , Syoji Yamaguchi , Koji Masui , Hisao Ogawa
IPC分类号： G06F11/14 , G06F11/18 , G06F11/20 , G06F13/00 , G06F13/364 , G06F13/40 , G06F13/42
CPC分类号： G06F13/4022 , G06F13/364
摘要： A method and apparatus for controlling a dual bus system, capable of realizing high speed and continuous operation even if one of the buses of the dual bus system fails. The method and apparatus has a dual bus system, a plurality of electronic circuits connected to both buses of the dual bus system, and bus controller for providing a bus use allowance signal to one of the plurality of electronic circuits, the one electronic circuit being selected in accordance with bus occupation request signals issued from the plurality of electronic circuits requesting data transfer. If the bus occupation request signals for both buses of the dual bus system originates from the one selected electronic circuit and the outputs of the arbiters coincide, the bus use allowance signal is provided to the one selected electronic circuit for the allowance of occupying both buses of the dual bus system. A completion of data transfer at the dual bus system is determined when data transfer is completed at both buses. Continuous operation can be ensured immediately upon occurrence of a failure, and high speed operation of a computer system is possible.
摘要翻译：一种用于控制双总线系统的方法和装置，即使双总线系统的总线之一发生故障，也能够实现高速和连续的操作。该方法和装置具有双总线系统，连接到双总线系统的两个总线的多个电子电路和用于向多个电子电路之一提供总线使用允许信号的总线控制器，所选择的一个电子电路根据从多个电子电路发出的请求数据传送的总线占用请求信号。如果双总线系统的两个总线的总线占用请求信号来自一个选定的电子电路，并且仲裁器的输出一致，那么总线使用允许信号被提供给一个所选择的电子电路，以允许占用两条总线的双总线系统。在两条总线完成数据传输时，确定双总线系统的数据传输完成。在出现故障时可以立即确保持续运转，能够实现计算机系统的高速运转。

5. 发明授权

US06873671B2 Reactor manual control system 有权
标题翻译：反应堆手动控制系统
公开(公告)号：US06873671B2
公开(公告)日：2005-03-29
申请号：US10334074
申请日：2002-12-31
申请人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
发明人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
IPC分类号： G21C7/16 , G21C7/36 , G21C17/10 , G21D3/00 , G21D3/02
CPC分类号： G21C7/36 , G21C7/16 , G21Y2004/401 , Y02E30/31 , Y02E30/39
摘要： In a boiling water reactor controlling each control rod hydraulically by driving a solenoid valve, the control system comprises an operation control means 41 having a duplicated data processing unit for generating sequence patterns based on the timing of the driving sequence based on the control information provided manually, a transmission control means 42 for creating a command word corresponding to each control rod being controlled based on said sequence pattern, and mutually communicating each command word between duplicated data processing units and computing the AND logic of said data within a predetermined time difference, and when the computed result coincide, transmitting the selected command word serially; a transmission unit 32 for receiving said command word and performing protocol conversion thereto, and transmitting the same to a plurality of transmission branch units positioned downstream as the control command; and a solenoid valve drive circuit 31 for driving the control rod drive unit corresponding to each rod branched from said transmission branch units.
摘要翻译：在通过驱动电磁阀来控制每个控制棒的沸水反应器中，控制系统包括操作控制装置41，其具有用于基于手动提供的控制信息基于驱动顺序的定时产生序列模式的复制数据处理单元发送控制装置42，用于根据所述序列模式创建与每个控制棒对应的命令字，并且在复制数据处理单元之间相互通信每个命令字，并在预定时间差内计算所述数据的与逻辑;以及当计算结果一致时，连续发送所选择的命令字; 用于接收所述命令字并执行协议转换的发送单元32，并将其发送到位于下游作为控制命令的多个发送支路单元; 以及用于驱动对应于从所述传输分支单元分支的每个杆的控制棒驱动单元的电磁阀驱动电路31。

6. 发明申请

US20050013398A1 Reactor manual control system 审中-公开
公开(公告)号：US20050013398A1
公开(公告)日：2005-01-20
申请号：US10885310
申请日：2004-07-07
申请人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
发明人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
IPC分类号： G21C7/16 , G21C7/36 , G21C17/10 , G21D3/00 , G21D3/02
CPC分类号： G21C7/36 , G21C7/16 , Y02E30/31 , Y02E30/39
摘要： In a boiling water reactor controlling each control rod hydraulically by driving a solenoid valve, the control system comprises an operation control means 41 having a duplicated data processing unit for generating sequence patterns based on the timing of the driving sequence based on the control information provided manually, a transmission control means 42 for creating a command word corresponding to each control rod being controlled based on said sequence pattern, and mutually communicating each command word between duplicated data processing units and computing the AND logic of said data within a predetermined time difference, and when the computed result coincide, transmitting the selected command word serially; a transmission unit 32 for receiving said command word and performing protocol conversion thereto, and transmitting the same to a plurality of transmission branch units positioned downstream as the control command; and a solenoid valve drive circuit 31 for driving the control rod drive unit corresponding to each rod branched from said transmission branch units.

7. 发明授权

US4658376A Magnetic bubble file system 失效
标题翻译：磁泡文件系统
公开(公告)号：US4658376A
公开(公告)日：1987-04-14
申请号：US664845
申请日：1984-10-25
申请人： Kunio Suzuki , Kunihiko Onuma , Koji Masui
发明人： Kunio Suzuki , Kunihiko Onuma , Koji Masui
IPC分类号： G11C11/14 , G11C19/08
CPC分类号： G11C19/0875
摘要： A magnetic bubble file system having a magnetic bubble memory includes magnetic bubble memory devices as memory media for constructing a plurality of pages of information store areas read and written by page. The store area of a selected one of the plurality of pages of the magnetic bubble memory devices is allotted to a write protection information store page for the magnetic bubble memory. The write protection information store page stores write protection information of each page of data store pages of the magnetic bubble memory. The magnetic bubble file system determines whether data can be written in to the data store page, in accordance with the write protection information stored in the write protection information store page.
摘要翻译：具有磁性缓冲存储器的磁性气泡文件系统包括作为存储介质的磁性气泡存储装置，用于构成通过页面读取和写入的多页信息存储区域。磁性气泡存储装置的多页中所选择的一个页面的存储区域被分配给用于磁性气泡存储器的写保护信息存储页面。写入保护信息存储页面存储磁性气泡存储器的数据存储页面的每一页的写入保护信息。磁气泡文件系统根据存储在写入保护信息存储页面中的写入保护信息确定是否可以将数据写入数据存储页面。

8. 发明申请

US20060106578A1 Machine management device, communication line diagnosis device and machine management method 审中-公开
标题翻译：机器管理装置，通讯线诊断装置及机器管理方法
公开(公告)号：US20060106578A1
公开(公告)日：2006-05-18
申请号：US11273072
申请日：2005-11-15
申请人： Tsutomu Yamada , Hiromichi Endoh , Koji Masui , Takashi Umehara
发明人： Tsutomu Yamada , Hiromichi Endoh , Koji Masui , Takashi Umehara
IPC分类号： G21C17/00
CPC分类号： G06F13/4226 , G06F11/221
摘要： In a computer system, a device for and a method of conducting self-diagnosis of failure such as a break and a short circuit of a data communication line remove difficulty of conducting the self-diagnosis of the break and the short circuit only by driving and monitoring the data communication line by itself. For this purpose, a diagnosis module receives information necessary for self-diagnosis from a monitoring module connected to the data communication line. The diagnosis module to conduct self-diagnosis is connected via a diagnosis communication line to the monitoring module to communicate diagnosis information between the modules.
摘要翻译：在计算机系统中，用于进行数据通信线路的断开和短路等故障的自诊断的装置和方法消除了仅通过驾驶和进行断路和短路的自诊断的难度，监控数据通信线路。为此，诊断模块从连接到数据通信线路的监视模块接收自诊断所需的信息。进行自诊断的诊断模块通过诊断通信线路连接到监控模块，以在模块之间传递诊断信息。

9. 发明授权

US06590952B2 Reactor manual control system 有权
公开(公告)号：US06590952B2
公开(公告)日：2003-07-08
申请号：US09941724
申请日：2001-08-30
申请人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
发明人： Kazuhiko Ishii , Shigeru Udono , Koji Masui , Masahiro Matsuda
IPC分类号： G21C1712
CPC分类号： G21C7/36 , G21C7/16 , G21Y2004/401 , Y02E30/31 , Y02E30/39
摘要： In a boiling water reactor controlling each control rod hydraulically by driving a solenoid valve, the control system comprises an operation control means 41 having a duplicated data processing unit for generating sequence patterns based on the timing of the driving sequence based on the control information provided manually, a transmission control means 42 for creating a command word corresponding to each control rod being controlled based on said sequence pattern, and mutually communicating each command word between duplicated data processing units and computing the AND logic of said data within a predetermined time difference, and when the computed result coincide, transmitting the selected command word serially; a transmission unit 32 for receiving said command word and performing protocol conversion thereto, and transmitting the same to a plurality of transmission branch units positioned downstream as the control command; and a solenoid valve drive circuit 31 for driving the control rod drive unit corresponding to each rod branched from said transmission branch units.

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