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1. 发明授权

US08355274B2 Current steering element, storage element, storage device, and method for manufacturing current steering element 有权
标题翻译：目前的导向元件，存储元件，存储装置以及用于制造当前转向元件的方法
公开(公告)号：US08355274B2
公开(公告)日：2013-01-15
申请号：US13061312
申请日：2009-09-17
申请人： Koji Arita , Takumi Mikawa , Mitsuteru IIjima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Mitsuteru IIjima , Kenji Tominaga
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0
摘要翻译：即使施加具有不同极性的电脉冲也能够防止写入干扰的发生，并且可能导致大的电流流过可变电阻元件并且可以无限制地写入数据的电流导向元件。在一种存储元件（3）中，包括：可变电阻元件（1），其电阻值响应于具有正极性和负极性的电脉冲的应用而变化并且保持改变的电阻值; 以及当施加电脉冲时转向流过可变电阻元件（1）的电流的当前操舵元件（2），所述电流操舵元件（2）包括：第一电极（32）; 第二电极（31）; 和介于所述第一电极（32）和所述第二电极（31）之间的电流转向层（33）。当电流导向层（33）包括SiNx（0

2. 发明申请

US20110164447A1 CURRENT STEERING ELEMENT, STORAGE ELEMENT, STORAGE DEVICE, AND METHOD FOR MANUFACTURING CURRENT STEERING ELEMENT 有权
标题翻译：电流转向元件，存储元件，存储器件和制造电流转向元件的方法
公开(公告)号：US20110164447A1
公开(公告)日：2011-07-07
申请号：US13061312
申请日：2009-09-17
申请人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Mitsuteru Iijima , Kenji Tominaga
IPC分类号： G11C11/00 , H01L45/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C13/003 , G11C13/0069 , G11C2013/0073 , G11C2013/0078 , G11C2213/15 , G11C2213/51 , G11C2213/56 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1625
摘要： A current steering element which can prevent occurrence of write disturb even when electric pulses having different polarities are applied and can cause large current to flow through a variable resistance element, and with which data can be written without problem. In a storage element (3) including: a variable resistance element (1) whose electric resistance value changes in response to application of electric pulses having a positive polarity and a negative polarity and which maintains the changed electric resistance value; and the current steering element (2) that steers current flowing through the variable resistance element (1) when the electric pulses are applied, the current steering element (2) includes: a first electrode (32); a second electrode (31); and a current steering layer (33) interposed between the first electrode (32) and the second electrode (31). When the current steering layer (33) includes SiNx (0
摘要翻译：即使施加具有不同极性的电脉冲也能够防止写入干扰的发生，并且可能导致大的电流流过可变电阻元件并且可以无限制地写入数据的电流导向元件。在一种存储元件（3）中，包括：可变电阻元件（1），其电阻值响应于具有正极性和负极性的电脉冲的应用而改变并且保持改变的电阻值; 以及当施加电脉冲时转向流过可变电阻元件（1）的电流的当前操舵元件（2），所述电流操舵元件（2）包括：第一电极（32）; 第二电极（31）; 和介于所述第一电极（32）和所述第二电极（31）之间的电流转向层（33）。当电流导向层（33）包括SiNx（0

3. 发明申请

US20110220862A1 RESISTANCE VARIABLE ELEMENT AND RESISTANCE VARIABLE MEMORY DEVICE 有权
标题翻译：电阻可变元件和电阻可变存储器件
公开(公告)号：US20110220862A1
公开(公告)日：2011-09-15
申请号：US13128575
申请日：2010-07-12
申请人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1666 , H01L45/1675
摘要： A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
摘要翻译：在根据本发明的通孔交叉点结构存储装置中使用的电阻可变元件（100）和包括电阻可变元件的电阻变化存储装置包括基板（7）和层间绝缘层（ 3），并且具有形成贯通层间绝缘层的通孔（4）的构造，在通孔的外侧形成有包含过渡金属氧化物的第一电阻变化层（2），在通孔内形成有包含过渡金属氧化物的第二电阻变化层（5），第一电阻变化层的电阻率与第二电阻变化层不同，第一电阻变化层和第二电阻变化层接触彼此仅在更靠近基板的通孔的开口（20）中。

4. 发明授权

US08394669B2 Resistance variable element and resistance variable memory device 有权
标题翻译：电阻可变元件和电阻变量存储器件
公开(公告)号：US08394669B2
公开(公告)日：2013-03-12
申请号：US13128575
申请日：2010-07-12
申请人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
发明人： Koji Arita , Takumi Mikawa , Atsushi Himeno , Yoshio Kawashima , Kenji Tominaga
IPC分类号： H01L21/02 , H01L45/00
CPC分类号： H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/08 , H01L45/1233 , H01L45/146 , H01L45/1666 , H01L45/1675
摘要： A resistance variable element (100) used in a through-hole cross-point structure memory device, according to the present invention, and a resistance variable memory device including the resistance variable element, includes a substrate (7) and an interlayer insulating layer (3) formed on the substrate, and have a configuration in which a through-hole (4) is formed to penetrate the interlayer insulating layer, a first resistance variable layer (2) comprising transition metal oxide is formed outside the through-hole, a second resistance variable layer (5) comprising transition metal oxide is formed inside the through-hole, the first resistance variable layer is different in resistivity from the second resistance variable layer, and the first resistance variable layer and the second resistance variable layer are in contact with each other only in an opening (20) of the through-hole which is closer to the substrate.
摘要翻译：在根据本发明的通孔交叉点结构存储装置中使用的电阻可变元件（100）和包括电阻可变元件的电阻变化存储装置包括基板（7）和层间绝缘层（ 3），并且具有形成贯通层间绝缘层的通孔（4）的构造，在通孔的外侧形成有包含过渡金属氧化物的第一电阻变化层（2），在通孔内形成有包含过渡金属氧化物的第二电阻变化层（5），第一电阻变化层的电阻率与第二电阻变化层不同，第一电阻变化层和第二电阻变化层接触彼此仅在更靠近基板的通孔的开口（20）中。

5. 发明申请

US20130224931A1 NONVOLATILE MEMORY DEVICE MANUFACTURING METHOD 有权
标题翻译：非易失性存储器件制造方法
公开(公告)号：US20130224931A1
公开(公告)日：2013-08-29
申请号：US13884630
申请日：2012-03-21
申请人： Haruyuki Sorada , Takumi Mikawa , Kenji Tominaga , Kiyotaka Tsuji
发明人： Haruyuki Sorada , Takumi Mikawa , Kenji Tominaga , Kiyotaka Tsuji
IPC分类号： H01L45/00
CPC分类号： H01L45/16 , H01L27/101 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L45/04 , H01L45/1683
摘要： A method of manufacturing a nonvolatile memory device that is a variable resistance nonvolatile memory device, which has good consistency with a dual damascene process that is suitable for the formation of fine copper lines and which enables large capacity and high integration. This method includes: forming a variable resistance element, a contact hole and a line groove; and forming a current steering layer of a bidirectional diode element above interlayer insulating layers and a variable resistance layer to cover the line groove without covering a bottom surface of the contact hole.
摘要翻译：一种制造非易失性存储器件的方法，其是可变电阻非易失性存储器件，其与适合于形成细铜线的双镶嵌工艺具有良好的一致性，并且能够实现大容量和高集成度。该方法包括：形成可变电阻元件，接触孔和线槽; 并且在层间绝缘层之上形成双向二极管元件的电流转向层和可变电阻层以覆盖线槽而不覆盖接触孔的底表面。

6. 发明授权

US08551853B2 Non-volatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US08551853B2
公开(公告)日：2013-10-08
申请号：US13498541
申请日：2011-07-07
申请人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
发明人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
IPC分类号： H01L21/20
CPC分类号： H01L27/2463 , H01L21/76879 , H01L45/04 , H01L45/146 , H01L45/1683
摘要： A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening of one of the memory cell holes; and one or more of the dummy holes being formed on each of the first wires.
摘要翻译：一种非易失性半导体存储器件包括：多条存储单元孔（101），其形成在层状绝缘层（80）的多个第一布线（10）的条状形状的各个交叉点处，多个第二布线（101）分别暴露在所述多个第一布线的上表面的多个虚设孔（111），所述多个第一布线形成在所述中间层绝缘层，使得所述虚拟孔分别到达所述多个第一布线的上表面，分别形成在所述存储单元孔内部和所述虚拟孔内部的堆叠层结构，所述层叠层结构中的每一个包括第一电极（30）和可变电阻层（40）; 在一个虚拟孔的下部开口中露出的第一线的一部分的面积大于暴露在一个存储单元孔的下部开口中的第一线的一部分的面积; 并且在每个第一导线上形成一个或多个虚拟孔。

7. 发明申请

US20120181500A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非挥发性半导体存储器件及其制造方法
公开(公告)号：US20120181500A1
公开(公告)日：2012-07-19
申请号：US13498541
申请日：2011-07-07
申请人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
发明人： Kiyotaka Tsuji , Takumi Mikawa , Kenji Tominaga
IPC分类号： H01L47/00 , H01L21/02
CPC分类号： H01L27/2463 , H01L21/76879 , H01L45/04 , H01L45/146 , H01L45/1683
摘要： A non-volatile semiconductor memory device comprises a plurality of memory cell holes (101) formed through an interlayer insulating layer (80) at respective cross-points of a plurality of first wires (10) of a stripe shape and a plurality of second wires (20) of a stripe shape when viewed from above such that the memory cell holes (101) expose upper surfaces of the plurality of first wires, respectively, a plurality of dummy holes (111) formed on the plurality of first wires in the interlayer insulating layer such that the dummy holes reach the upper surfaces of the plurality of first wires, respectively, and stacked-layer structures formed inside the memory cell holes and inside the dummy holes, respectively, each of the stacked-layer structures including a first electrode (30) and a variable resistance layer (40); an area of a portion of the first wire which is exposed in a lower opening of one of the dummy holes being greater than an area of a portion of the first wire which is exposed in a lower opening of one of the memory cell holes; and one or more of the dummy holes being formed on each of the first wires.
摘要翻译：一种非易失性半导体存储器件包括：多条存储单元孔（101），其形成在层状绝缘层（80）的多个第一布线（10）的条状形状的各个交叉点处，多个第二布线（101）分别暴露在所述多个第一布线的上表面的多个虚设孔（111），所述多个第一布线形成在所述中间层绝缘层，使得所述虚拟孔分别到达所述多个第一布线的上表面，分别形成在所述存储单元孔内部和所述虚拟孔内部的堆叠层结构，所述层叠层结构中的每一个包括第一电极（30）和可变电阻层（40）; 在一个虚拟孔的下部开口中露出的第一线的一部分的面积大于暴露在一个存储单元孔的下部开口中的第一线的一部分的面积; 并且在每个第一导线上形成一个或多个虚拟孔。

8. 发明申请

US20100264393A1 NONVOLATILE MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100264393A1
公开(公告)日：2010-10-21
申请号：US12747060
申请日：2008-12-02
申请人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
发明人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2472 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： A nonvolatile memory device of the present invention comprises a substrate (1), first wires (3), first filling constituents (5) filled into first through-holes (4), respectively, second wires (11) which cross the first wires (3) perpendicularly to the first wires (3), respectively, each of the second wires (11) including a plurality of layers including a resistance variable layer (6) of each of first resistance variable elements, a conductive layer (7) and a resistance variable layer (8) of each of second resistance variable elements which are stacked together in this order, second filling constituents (14) filled into second through-holes (13), respectively, and third wires (15), and the conductive layer (7) of the second wires (11) serves as the electrodes of the first resistance variable elements (9) and the electrodes of the second resistance variable elements (10).
摘要翻译：本发明的非易失性存储装置包括基板（1），第一布线（3），分别填充到第一通孔（4）中的第一填充构件（5），分别穿过第一布线 3）分别垂直于第一导线（3），每个第二导线（11）包括多个层，包括第一电阻可变元件中的每一个的电阻变化层（6），导电层（7）和按顺序堆叠在一起的第二电阻可变元件的电阻变化层（8），分别填充到第二通孔（13）中的第二填充组分（14）和第三导线（15），以及导电层第二电线（11）的电极（7）用作第一电阻可变元件（9）的电极和第二电阻可变元件（10）的电极。

9. 发明授权

US08198618B2 Nonvolatile memory device and manufacturing method thereof 有权
标题翻译：非易失存储器件及其制造方法
公开(公告)号：US08198618B2
公开(公告)日：2012-06-12
申请号：US12747060
申请日：2008-12-02
申请人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
发明人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
IPC分类号： H01L29/02
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2472 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146
摘要： A nonvolatile memory device of the present invention comprises a substrate (1), first wires (3), first filling constituents (5) filled into first through-holes (4), respectively, second wires (11) which cross the first wires (3) perpendicularly to the first wires (3), respectively, each of the second wires (11) including a plurality of layers including a resistance variable layer (6) of each of first resistance variable elements, a conductive layer (7) and a resistance variable layer (8) of each of second resistance variable elements which are stacked together in this order, second filling constituents (14) filled into second through-holes (13), respectively, and third wires (15), and the conductive layer (7) of the second wires (11) serves as the electrodes of the first resistance variable elements (9) and the electrodes of the second resistance variable elements (10).
摘要翻译：本发明的非易失性存储装置包括基板（1），第一布线（3），分别填充到第一通孔（4）中的第一填充构件（5），分别穿过第一布线 3）分别垂直于第一导线（3），每个第二导线（11）包括多个层，包括第一电阻可变元件中的每一个的电阻变化层（6），导电层（7）和按顺序堆叠在一起的第二电阻可变元件的电阻变化层（8），分别填充到第二通孔（13）中的第二填充组分（14）和第三导线（15），以及导电层第二电线（11）的电极（7）用作第一电阻可变元件（9）的电极和第二电阻可变元件（10）的电极。

10. 发明申请

US20100258779A1 NONVOLATILE MEMORY DEVICE AND MANUFACTURING MEHTOD THEREOF 有权
标题翻译：非易失性存储器件及其制造方法
公开(公告)号：US20100258779A1
公开(公告)日：2010-10-14
申请号：US12745190
申请日：2008-11-06
申请人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
发明人： Takumi Mikawa , Kenji Tominaga , Kazuhiko Shimakawa , Ryotaro Azuma
IPC分类号： H01L45/00 , H01L21/02
CPC分类号： H01L27/2409 , G11C13/0002 , G11C2213/71 , G11C2213/72 , H01L27/101 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile memory device of the present invention includes a substrate (1), first wires (3), first resistance variable elements (5) and lower electrodes (6) of first diode elements which are filled in first through-holes (4), respectively, second wires (11) which cross the first wires 3 perpendicularly to the first wires 3, respectively, and each of which includes a semiconductor layer (7) of a first diode elements, a conductive layer (8) and a semiconductor layer (10) of a second diode elements which are stacked together in this order, second resistance variable elements (16) and upper electrodes (14) of second diode elements which are filled into second through holes (13), respectively, and third wires (17), and the conductive layer (8) of each second wires (11) also serves as the upper electrode of the first diode elements (9) and the lower electrode of the second diode elements (15).
摘要翻译：本发明的非易失性存储器件包括填充在第一通孔（4）中的基片（1），第一布线（3），第一电阻可变元件（5）和第一二极管元件的下电极（6）分别与第一布线3分别垂直于第一布线3交叉的第二布线（11），每条布线包括第一二极管元件的半导体层（7），导电层（8）和半导体层（ 10）分别被填充到第二通孔（13）中的第二电阻可变元件（16）和第二二极管元件的上电极（14）以及第三电线（17）），并且每个第二布线（11）的导电层（8）也用作第一二极管元件（9）的上电极和第二二极管元件（15）的下电极。

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