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    • 1. 发明申请
    • SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIASING DOMAINS
    • 包含多个体积偏移域的集成电路的系统和方法
    • US20110086478A1
    • 2011-04-14
    • US12968032
    • 2010-12-14
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • H01L21/8238
    • H03K19/0027H03K2217/0018
    • Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
    • 包括多个主体偏置域的集成电路的系统和方法。 根据第一实施例,半导体结构包括第一类型材料的衬底。 包括第二类型材料的壁的第一封闭结构从衬底的表面延伸到第一深度。 所述第二类型材料的下面并耦合到所述封闭结构的平面深井从所述第一深度延伸到第二深度。 所述第二类型材料的封闭结构和平面深孔形成第一类型材料的电隔离区域。 第二类型半导体器件设置成从第一类型材料的电隔离区域接收第一主体偏置电压。 形成在第一类型材料的电隔离区域内的第二类型材料的阱,并且设置第一类型半导体器件以从第二类型材料的阱接收第二主体偏置电压。
    • 2. 发明申请
    • SYSTEMS AND METHODS FOR INTEGRATED CIRCUITS COMPRISING MULTIPLE BODY BIASING DOMAINS
    • 包含多个体积偏移域的集成电路的系统和方法
    • US20100321098A1
    • 2010-12-23
    • US12873062
    • 2010-08-31
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • H03K3/01
    • H01L21/823892H01L21/743H01L21/761H01L21/823878H01L29/78
    • Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment of the present invention, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
    • 包括多个主体偏置域的集成电路的系统和方法。 根据本发明的第一实施例,半导体结构包括第一类型材料的衬底。 包括第二类型材料的壁的第一封闭结构从衬底的表面延伸到第一深度。 所述第二类型材料的下面并耦合到所述封闭结构的平面深井从所述第一深度延伸到第二深度。 所述第二类型材料的封闭结构和平面深孔形成第一类型材料的电隔离区域。 第二类型半导体器件设置成从第一类型材料的电隔离区域接收第一主体偏置电压。 形成在第一类型材料的电隔离区域内的第二类型材料的阱,并且设置第一类型半导体器件以从第二类型材料的阱接收第二主体偏置电压。
    • 6. 发明授权
    • Systems and methods for integrated circuits comprising multiple body biasing domains
    • 包括多个主体偏置域的集成电路的系统和方法
    • US08420472B2
    • 2013-04-16
    • US12873062
    • 2010-08-31
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • Kleanthes G. KoniarisRobert Paul MasleidJames B. Burr
    • H01L29/72
    • H01L21/823892H01L21/743H01L21/761H01L21/823878H01L29/78
    • Systems and methods for integrated circuits comprising multiple body biasing domains. In accordance with a first embodiment of the present invention, a semiconductor structure comprises a substrate of first type material. A first closed structure comprising walls of second type material extends from a surface of the substrate to a first depth. A planar deep well of said second type material underlying and coupled to the closed structure extends from the first depth to a second depth. The closed structure and the planar deep well of said second type material form an electrically isolated region of the first type material. A second-type semiconductor device is disposed to receive a first body biasing voltage from the electrically isolated region of the first type material. A well of the second-type material within the electrically isolated region of the first type material is formed and a first-type semiconductor device is disposed to receive a second body biasing voltage from the well of second-type material.
    • 包括多个主体偏置域的集成电路的系统和方法。 根据本发明的第一实施例,半导体结构包括第一类型材料的衬底。 包括第二类型材料的壁的第一封闭结构从衬底的表面延伸到第一深度。 所述第二类型材料的下面并耦合到所述封闭结构的平面深井从所述第一深度延伸到第二深度。 所述第二类型材料的封闭结构和平面深孔形成第一类型材料的电隔离区域。 第二类型半导体器件设置成从第一类型材料的电隔离区域接收第一主体偏置电压。 形成在第一类型材料的电绝缘区域内的第二类型材料的阱,并且设置第一类型半导体器件以从第二类型材料的阱接收第二主体偏置电压。