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1. 发明授权

US07800433B2 Power supply switching circuit 有权
标题翻译：电源开关电路
公开(公告)号：US07800433B2
公开(公告)日：2010-09-21
申请号：US12342232
申请日：2008-12-23
申请人： Kiyoshi Yoshikawa , Fumiyasu Utsunomiya , Toshiyuki Tsuzaki , Hiroyuki Masuko , Osamu Uehara , Hiroki Wake , Michiyasu Deguchi
发明人： Kiyoshi Yoshikawa , Fumiyasu Utsunomiya , Toshiyuki Tsuzaki , Hiroyuki Masuko , Osamu Uehara , Hiroki Wake , Michiyasu Deguchi
IPC分类号： H02M1/10
CPC分类号： H03K17/693 , H03K19/017545
摘要： Provided is a power supply switching circuit capable of efficiently supplying a desired voltage among a plurality of voltages to a load. In the case of a P-type semiconductor substrate, N-type MOS transistors are provided between a load and an AC adapter and between the load and a battery, and hence no parasitic diode exists between the load and the AC adapter or the battery, resulting in no current path due to the parasitic diode. Thus, when the AC adapter and the battery are connected to the power supply switching circuit, the N-type MOS transistor is turned off, whereby the current path between the battery and the load is cut off completely and the N-type MOS transistor is turned on. Accordingly, the battery cannot supply a voltage to the load while only the AC adapter can supply a voltage to the load.
摘要翻译：提供一种能够在多个电压中有效地向负载提供期望电压的电源开关电路。在P型半导体衬底的情况下，N型MOS晶体管设置在负载和AC适配器之间以及负载和电池之间，因此在负载和AC适配器或电池之间不存在寄生二极管，由于寄生二极管导致没有电流路径。因此，当AC适配器和电池连接到电源开关电路时，N型MOS晶体管截止，电池和负载之间的电流路径被完全切断，N型MOS晶体管是打开。因此，只有AC适配器可以向负载提供电压，电池不能向负载提供电压。

2. 发明申请

US20090167410A1 POWER SUPPLY SWITCHING CIRCUIT 有权
标题翻译：电源开关电路
公开(公告)号：US20090167410A1
公开(公告)日：2009-07-02
申请号：US12342232
申请日：2008-12-23
申请人： Kiyoshi Yoshikawa , Fumiyasu Utsunomiya , Toshiyuki Tsuzaki , Hiroyuki Masuko , Osamu Uehara , Hiroki Wake , Michiyasu Deguchi
发明人： Kiyoshi Yoshikawa , Fumiyasu Utsunomiya , Toshiyuki Tsuzaki , Hiroyuki Masuko , Osamu Uehara , Hiroki Wake , Michiyasu Deguchi
IPC分类号： H03K17/687
CPC分类号： H03K17/693 , H03K19/017545
摘要： Provided is a power supply switching circuit capable of efficiently supplying a desired voltage among a plurality of voltages to a load. In the case of a P-type semiconductor substrate, N-type MOS transistors are provided between a load and an AC adapter and between the load and a battery, and hence no parasitic diode exists between the load and the AC adapter or the battery, resulting in no current path due to the parasitic diode. Thus, when the AC adapter and the battery are connected to the power supply switching circuit, the N-type MOS transistor is turned off, whereby the current path between the battery and the load is cut off completely and the N-type MOS transistor is turned on. Accordingly, the battery cannot supply a voltage to the load while only the AC adapter can supply a voltage to the load.
摘要翻译：提供一种能够在多个电压中有效地向负载提供期望电压的电源开关电路。在P型半导体衬底的情况下，N型MOS晶体管设置在负载和AC适配器之间以及负载和电池之间，因此在负载和AC适配器或电池之间不存在寄生二极管，由于寄生二极管导致没有电流路径。因此，当AC适配器和电池连接到电源开关电路时，N型MOS晶体管截止，电池和负载之间的电流路径完全被切断，N型MOS晶体管是打开。因此，只有AC适配器可以向负载提供电压，电池不能向负载提供电压。

3. 发明申请

US20060255853A1 Electronic device including charge pump circuit 有权
标题翻译：电子设备包括电荷泵电路
公开(公告)号：US20060255853A1
公开(公告)日：2006-11-16
申请号：US11412379
申请日：2006-04-26
申请人： Hiroyuki Masuko , Fumiyasu Utsunomiya
发明人： Hiroyuki Masuko , Fumiyasu Utsunomiya
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/075
摘要： Provided is an electronic device including a charge pump circuit whose circuit structure is simple and boosting efficiency is high. The charge pump circuit uses MOSFETs as charge transfer elements and has a structure in which a voltage of a gate of a charge transfer MOSFET is controlled to a predetermined level based on a dividing voltage caused by a first resistor connected between a source and the gate thereof and a second resistor connected between a drain and the gate thereof and a clock pulse for on/off control of the charge transfer MOSFET is supplied to the gate through a capacitor.
摘要翻译：提供了一种电子装置，其包括电路结构简单并且增压效率高的电荷泵电路。电荷泵电路使用MOSFET作为电荷转移元件，并且具有这样的结构，其中电荷转移MOSFET的栅极的电压基于由连接在源极和栅极之间的第一电阻器引起的分压而被控制到预定水平并且连接在漏极和栅极之间的第二电阻器和用于电荷转移MOSFET的开/关控制的时钟脉冲通过电容器提供给栅极。

4. 发明授权

US07436239B2 Electronic device including charge pump circuit 有权
标题翻译：电子设备包括电荷泵电路
公开(公告)号：US07436239B2
公开(公告)日：2008-10-14
申请号：US11412379
申请日：2006-04-26
申请人： Hiroyuki Masuko , Fumiyasu Utsunomiya
发明人： Hiroyuki Masuko , Fumiyasu Utsunomiya
IPC分类号： G05F1/10
CPC分类号： H02M3/073 , H02M2003/075
摘要： Provided is an electronic device including a charge pump circuit whose circuit structure is simple and boosting efficiency is high. The charge pump circuit uses MOSFETs as charge transfer elements and has a structure in which a voltage of a gate of a charge transfer MOSFET is controlled to a predetermined level based on a dividing voltage caused by a first resistor connected between a source and the gate thereof and a second resistor connected between a drain and the gate thereof and a clock pulse for on/off control of the charge transfer MOSFET is supplied to the gate through a capacitor.
摘要翻译：提供了一种电子装置，其包括电路结构简单并且增压效率高的电荷泵电路。电荷泵电路使用MOSFET作为电荷转移元件，并且具有这样的结构，其中电荷转移MOSFET的栅极的电压基于由连接在源极和栅极之间的第一电阻器引起的分压而被控制到预定水平并且连接在漏极和栅极之间的第二电阻器和用于电荷转移MOSFET的开/关控制的时钟脉冲通过电容器提供给栅极。

5. 发明申请

US20080180079A1 Voltage regulator 审中-公开
标题翻译：电压调节器
公开(公告)号：US20080180079A1
公开(公告)日：2008-07-31
申请号：US11998386
申请日：2007-11-29
申请人： Tadashi Kurozo , Kiyoshi Yoshikawa , Fumiyasu Utsunomiya
发明人： Tadashi Kurozo , Kiyoshi Yoshikawa , Fumiyasu Utsunomiya
IPC分类号： G05F1/08 , G05F1/20 , G05F1/46
CPC分类号： G05F1/575
摘要： A voltage regulator according to the present invention is operated stably. Regardless of a condition of a load (25), a variation in drain voltage of a PMOS transistor (34) is made equal to a variation in output voltage (Vout) at an output terminal of the voltage regulator. Then, a variation in voltage which is equal to the variation in output voltage (Vout) at the output terminal which is caused by a change of the condition of the load (25) is fed back to an error amplifier (70), so a gain of a signal for phase compensation which is fed back to the error amplifier (70) is determined based on the output voltage (Vout). Therefore, even when the condition of the load (25) changes, the behavior of phase compensation is correct.
摘要翻译：根据本发明的电压调节器稳定地工作。不管负载条件（25）如何，使PMOS晶体管（34）的漏极电压的变化等于电压调节器的输出端的输出电压（Vout）的变化。然后，由负载（25）的状态的变化引起的等于输出端子的输出电压（Vout）的变化的电压变化被反馈到误差放大器（70），因此，基于输出电压（Vout）来确定反馈到误差放大器（70）的相位补偿信号的增益。因此，即使负载（25）的状态发生变化，相位补偿的动作也是正确的。

6. 发明授权

US08791686B2 Constant output reference voltage circuit 有权
标题翻译：恒定输出参考电压电路
公开(公告)号：US08791686B2
公开(公告)日：2014-07-29
申请号：US13609944
申请日：2012-09-11
申请人： Taro Yamasaki , Fumiyasu Utsunomiya
发明人： Taro Yamasaki , Fumiyasu Utsunomiya
IPC分类号： G05F1/10 , G05F3/02 , G05F3/16 , G05F3/20
CPC分类号： G05F3/262
摘要： The voltage reference circuit includes: a first MOS transistor; a second MOS transistor including a gate terminal connected to a gate terminal of the first MOS transistor and having an absolute value of a threshold value and a K value higher than an absolute value of a threshold value and a K value of the first MOS transistor; a current mirror circuit flowing a current based on a difference between the absolute values of the threshold values of the first MOS transistor and the second MOS transistor; a third MOS transistor flowing the current; and a fourth MOS transistor having an absolute value of a threshold value and a K value higher than an absolute value of a threshold value of the third MOS transistor and flowing the current.
摘要翻译：所述电压基准电路包括：第一MOS晶体管; 第二MOS晶体管，包括连接到第一MOS晶体管的栅极端子并具有阈值的绝对值和高于阈值的绝对值和第一MOS晶体管的K值的K值的栅极端子; 基于第一MOS晶体管和第二MOS晶体管的阈值的绝对值之间的差异流动电流的电流镜像电路; 流过电流的第三MOS晶体管; 以及第四MOS晶体管，其绝对值为阈值，K值高于第三MOS晶体管的阈值的绝对值并使电流流动。

7. 发明授权

US07961035B2 Boosting circuit 有权
标题翻译：升压电路
公开(公告)号：US07961035B2
公开(公告)日：2011-06-14
申请号：US12695464
申请日：2010-01-28
申请人： Makoto Mitani , Fumiyasu Utsunomiya
发明人： Makoto Mitani , Fumiyasu Utsunomiya
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： Provided is a boosting circuit having a small circuit scale. When a node (Vg) is reset by a reset transistor (M3) after a boosting operation has been finished, the reset transistor (M3) is controlled based on a power supply voltage to reset the node (Vg). Therefore, another boosted voltage is not required for the reset, and hence an additional boosting circuit required for the another boosted voltage is unnecessary as well. As a result, the circuit scale of the boosting circuit is reduced correspondingly to the additional boosting circuit.
摘要翻译：提供具有小电路规模的升压电路。当升压操作结束后，当一个节点（Vg）被复位晶体管（M3）复位时，基于电源电压来控制复位晶体管（M3）以复位节点（Vg）。因此，复位不需要另一升压电压，因此也不需要另外的升压电压所需的另外的升压电路。结果，升压电路的电路规模相应于附加的升压电路而减小。

8. 发明授权

US07907453B2 Nonvolatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US07907453B2
公开(公告)日：2011-03-15
申请号：US12389738
申请日：2009-02-20
申请人： Fumiyasu Utsunomiya
发明人： Fumiyasu Utsunomiya
IPC分类号： G11C16/06
CPC分类号： G11C7/12 , G11C7/067 , G11C16/26
摘要： Provided is a nonvolatile semiconductor memory device which reads out a memory cell at high speed. A minute current source (105) is connected to a clamp NMOS transistor (103) for clamping a drain voltage of a memory cell (101), and a minute current is caused to flow through the clamp NMOS transistor (103). When the current does not flow through the memory cell (101), by causing the minute current to flow through the clamp NMOS transistor (103), the drain voltage of the memory cell (101) is prevented from rising. A bias voltage (BIAS) to be input to the clamp NMOS transistor (103) can be set high and the drain voltage of the memory cell (101) can also be high, and hence a current value of the memory cell (101) becomes larger and speed of sensing a current of a sense amplifier circuit (104) is improved.
摘要翻译：提供了一种以高速读出存储单元的非易失性半导体存储器件。微电流源（105）连接到用于钳位存储单元（101）的漏极电压的钳位NMOS晶体管（103），使微小电流流过钳位NMOS晶体管（103）。当电流不流过存储单元（101）时，通过使微小电流流过钳位NMOS晶体管（103），可以防止存储单元（101）的漏极电压上升。可以将要输入到钳位NMOS晶体管（103）的偏置电压（BIAS）设置为高，并且存储单元（101）的漏极电压也可以高，因此存储单元（101）的当前值变为提高感测放大器电路（104）的电流的较大和速度。

9. 发明申请

US20100258706A1 PHOTODETECTOR CIRCUIT AND ELECTRONIC DEVICE 有权
标题翻译：光电设备电路和电子设备
公开(公告)号：US20100258706A1
公开(公告)日：2010-10-14
申请号：US12756441
申请日：2010-04-08
申请人： Fumiyasu Utsunomiya
发明人： Fumiyasu Utsunomiya
IPC分类号： G01J1/42 , H01L31/09
CPC分类号： G01J1/44
摘要： Provided is a photodetector circuit having significantly low current consumption. The photodetector circuit includes two opposing P-channel metal oxide semiconductor (MOS) transistors each including a gate connected to a drain of the opposing P-channel MOS transistor. The drain of one of the P-channel MOS transistors is discharged with an ON-state current of an N-channel MOS transistor which is turned ON with a voltage generated in a photoelectric element. The drain of the other of the P-channel MOS transistors is discharged with an ON-state current of a depletion type N-channel MOS transistor including a gate to which a voltage of a reference power supply terminal is input, and a source to which the voltage generated in the photoelectric element is input.
摘要翻译：提供了具有显着低的电流消耗的光电检测器电路。光电检测器电路包括两个相对的P沟道金属氧化物半导体（MOS）晶体管，每个晶体管包括连接到相对的P沟道MOS晶体管的漏极的栅极。一个P沟道MOS晶体管的漏极以通过在光电元件中产生的电压导通的N沟道MOS晶体管的导通状态电流放电。另一方的P沟道MOS晶体管的漏极以包括输入基准电源端子的电压的栅极的耗尽型N沟道MOS晶体管的导通状态电流被放电，源极输入光电元件中产生的电压。

10. 发明申请

US20100188137A1 BOOSTING CIRCUIT 有权
标题翻译：升压电路
公开(公告)号：US20100188137A1
公开(公告)日：2010-07-29
申请号：US12695464
申请日：2010-01-28
申请人： Makoto Mitani , Fumiyasu Utsunomiya
发明人： Makoto Mitani , Fumiyasu Utsunomiya
IPC分类号： G05F1/10
CPC分类号： H02M3/07
摘要： Provided is a boosting circuit having a small circuit scale. When a node (Vg) is reset by a reset transistor (M3) after a boosting operation has been finished, the reset transistor (M3) is controlled based on a power supply voltage to reset the node (Vg). Therefore, another boosted voltage is not required for the reset, and hence an additional boosting circuit required for the another boosted voltage is unnecessary as well. As a result, the circuit scale of the boosting circuit is reduced correspondingly to the additional boosting circuit.
摘要翻译：提供具有小电路规模的升压电路。当升压操作结束后，当一个节点（Vg）被复位晶体管（M3）复位时，基于电源电压来控制复位晶体管（M3）以复位节点（Vg）。因此，复位不需要另一升压电压，因此也不需要另外的升压电压所需的另外的升压电路。结果，升压电路的电路规模相应于附加的升压电路而减小。

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