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1. 发明授权

US5365276A Multiscreen display circuit for displaying video signal sources having different aspect ratios 失效
标题翻译：用于显示具有不同宽高比的视频信号源的多画面显示电路
公开(公告)号：US5365276A
公开(公告)日：1994-11-15
申请号：US894922
申请日：1992-06-08
申请人： Kiyoshi Imai , Yutaka Nio , Ken Sakamoto , Keiya Miyoshi , Mitsuji Okawa , Toyoaki Unemura
发明人： Kiyoshi Imai , Yutaka Nio , Ken Sakamoto , Keiya Miyoshi , Mitsuji Okawa , Toyoaki Unemura
IPC分类号： H04N5/45 , H04N5/46 , H04N5/262 , H04N5/445
CPC分类号： H04N7/0122
摘要： The present invention sequentially selects and outputs one of a plurality of video image sources 1 by an image signal source switching means 2, processes the video images by thinning circuit portions 3 and 4, writes in the video data into an image memory 5 and display the images on an image display device 6. Depending upon the detection output of an aspect ratio detecting circuit portion 12, which detects an aspect ratio of an image display of each of the video image source 1, thinning ratios of the thinning circuits 3 and 4 and a write in control circuit portion 9 for the image memory are switched in order to obtain a multiscreen display circuit which can display video signal sources having different aspect ratios.
摘要翻译：本发明通过图像信号源切换装置2顺序选择并输出多个视频图像源1中的一个，通过细化电路部分3和4处理视频图像，将视频数据写入图像存储器5并显示图像显示装置6上的图像。根据高宽比检测电路部分12的检测输出，其检测每个视频图像源1的图像显示的宽高比，稀疏电路3和4的稀疏比和切换用于图像存储器的写入控制电路部分9，以便获得可以显示具有不同纵横比的视频信号源的多画面显示电路。

2. 发明授权

US07394854B2 Signal transmission system 有权
标题翻译：信号传输系统
公开(公告)号：US07394854B2
公开(公告)日：2008-07-01
申请号：US10088468
申请日：2001-07-23
申请人： Toshiro Nishio , Yutaka Nio
发明人： Toshiro Nishio , Yutaka Nio
IPC分类号： H04N7/12 , H04N11/02 , H04N11/04 , H04B1/66
CPC分类号： H04N19/00533 , H04N11/042 , H04N19/44
摘要： A signal transmission system: that includes a signal transmission unit (101) that includes a MPEG decoder (102), which receives digital broadcasting and outputs a luminance signal Y and two color difference signals PB/PR, and a transmission path encoding circuit (103), which encodes the YPBPR outputted from the MPEG decoder (102) into signals in the forms suited to a transmission path and transmits the encoded signals; and a signal reception unit (104) that includes a transmission path decoding circuit (105), which receives the encoded YPBPR and decodes them, a Y processing circuit (106), which processes the decoded luminance signal Y, a chrominance processing circuit (107), which processes the respective decoded color difference signals PB/PR, a signal conversion circuit (108), which converts the YPBPR outputted from the Y processing circuit (106) and the chrominance processing circuit (107) into RGB signals, and a display device (108) which displays the RGB signals.
摘要翻译：一种信号传输系统，包括：信号传输单元（101），包括MPEG解码器（102），其接收数字广播并输出亮度信号Y和两个色差信号P SUB B / 和传送路径编码电路（103），其将从MPEG解码器（102）输出的YP SUB B R SUB编码为信号适合于传输路径并发送编码信号的形式; 以及信号接收单元（104），其包括传输路径解码电路（105），该传输路径解码电路（105）接收编码的YP＆lt; B＆gt; P＆lt; R＆gt;并对其进行解码，Y处理电路 106），其处理解码的亮度信号Y，处理各个解码的色差信号P SUB B / P SUB R的色度处理电路（107），信号转换电路（108）将从Y处理电路（106）和色度处理电路（107）输出的YP _{B R SUB转换成RGB信号，显示显示RGB信号的装置（108）。}

3. 发明授权

US06424383B1 Apparatus for correcting vertical contours 失效
标题翻译：用于校正垂直轮廓的装置
公开(公告)号：US06424383B1
公开(公告)日：2002-07-23
申请号：US09284876
申请日：1999-04-22
申请人： Katsumi Terai , Naoji Okumura , Yutaka Nio , Kazuhito Tanaka
发明人： Katsumi Terai , Naoji Okumura , Yutaka Nio , Kazuhito Tanaka
IPC分类号： H04N521
CPC分类号： H04N5/208
摘要： An object is to provide a vertical contour correcting device for a video signal which reduces noise without deteriorating effect of the entire contour correction. A vertical contour correcting device (VCP1) which corrects vertical contour components (S1v, S1v′) of a video signal (S1) with a given quantity of correction (K) to enhance the vertical contour (Ev) of the video signal (S1) comprises a vertical contour component extracting device (3) for detecting said vertical contour components (S1v, S1v′) from said video signal (S1), a vertical contour component correlation detector (3, 29, 8c, 8d, 4) for detecting correlation between horizontally adjacent vertical contour components (Sb, Sb′, Sb′′) from said detected vertical contour components (S1v, S1v′), and a controller (5) for determining said quantity of correction (K) on the basis of said detected correlation (Sj1), thereby varying the quantity of correction (K) in accordance with the correlation (Sj1).
摘要翻译：一种垂直轮廓校正装置（VCP1），用于校正视频信号的垂直轮廓分量（S1v，S1v'）（垂直轮廓校正装置） S1）具有用于增强视频信号（S1）的垂直轮廓（Ev）的给定量的校正（K）包括垂直轮廓分量提取装置（3），用于从所述垂直轮廓分量（S1v，S1v'）检测所述垂直轮廓分量视频信号（S1），用于检测来自所检测的垂直轮廓分量（S1v）的水平相邻垂直轮廓分量（Sb，Sb'，Sb“）之间的相关性的垂直轮廓分量相关检测器（3,29,8c，8d，4），S1v'），以及控制器（5），用于根据所述检测到的相关（Sj1）确定所述校正量（K），从而根据相关（Sj1）改变校正量（K）。

4. 发明授权

US06243141B1 Video signal processing device 失效
标题翻译：视频信号处理装置
公开(公告)号：US06243141B1
公开(公告)日：2001-06-05
申请号：US09070745
申请日：1998-05-01
申请人： Yutaka Nio , Kazuya Ueda , Naoki Kurita
发明人： Yutaka Nio , Kazuya Ueda , Naoki Kurita
IPC分类号： H04N327
CPC分类号： H04N5/46
摘要： A video signal processing device comprising an operating element array for processing video signals according to commands given from the outside, memories for temporarily storing the video signals according to commands given from the outside, and a network 3 for connecting the operating element array and the storage units according to commands given from the outside, thereby making it possible to switch ways of processing digitized video signals according to commands from the outside.
摘要翻译：一种视频信号处理装置，包括用于根据从外部给出的命令来处理视频信号的操作元件阵列，用于根据从外部给出的命令临时存储视频信号的存储器，以及用于连接操作元件阵列和存储器单元根据从外部给出的命令，从而可以根据来自外部的命令来切换处理数字化视频信号的方式。

5. 发明授权

US5982449A Television receiver that provides gradation correction using a CPU 失效
标题翻译：使用CPU提供灰度校正的电视接收机
公开(公告)号：US5982449A
公开(公告)日：1999-11-09
申请号：US780253
申请日：1997-01-08
申请人： Miho Nagai , Takashi Yamaguchi , Yutaka Nio , Hideto Nakahigashi , Hideyo Uwabata , Toshiaki Kitahara , Chikara Gotanda , Atsushi Ishizu
发明人： Miho Nagai , Takashi Yamaguchi , Yutaka Nio , Hideto Nakahigashi , Hideyo Uwabata , Toshiaki Kitahara , Chikara Gotanda , Atsushi Ishizu
IPC分类号： H04N3/27 , H04N3/32 , H04N5/20 , H04N5/202 , H04N5/44 , H04N5/445 , H04N5/46 , H04N5/14
CPC分类号： H04N5/20 , H04N3/27 , H04N3/32 , H04N5/44 , H04N5/202 , H04N5/445 , H04N5/46
摘要： A television receiver comprising an information extracting circuit for extracting information from a format or content of an input video signal, a video signal processing circuit for processing this video signal by a program or data, a memory for storing the program and data, a CPU for controlling, operating or driving these elements, and a display device for displaying an image. The video signal processing circuit can, under the control of the CPU, decode the signal, correct or set the picture quality such as gradation and sharpness, or adaptively process an on-screen display based on the input video signal. The television receiver is also able to adaptively extend the functions of the television receiver corresponding to various signal formats.
摘要翻译：一种电视接收机，包括：用于从输入视频信号的格式或内容中提取信息的信息提取电路，用于通过程序或数据处理该视频信号的视频信号处理电路，用于存储程序和数据的存储器，用于存储程序和数据的存储器控制，操作或驱动这些元件，以及用于显示图像的显示装置。视频信号处理电路可以在CPU的控制下对信号进行解码，校正或设置诸如灰度和清晰度的图像质量，或者基于输入视频信号自适应地处理屏幕显示。电视接收机还能够自适应地扩展对应于各种信号格式的电视接收机的功能。

6. 发明授权

US5715010A Video signal compression apparatus for horizontal compression of a video signal 失效
标题翻译：用于视频信号的水平压缩的视频信号压缩装置
公开(公告)号：US5715010A
公开(公告)日：1998-02-03
申请号：US725075
申请日：1996-10-02
申请人： Yosuke Izawa , Masahiro Tani , Naoji Okumura , Yutaka Nio , Toshichika Sato
发明人： Yosuke Izawa , Masahiro Tani , Naoji Okumura , Yutaka Nio , Toshichika Sato
IPC分类号： H04N5/14 , H04N5/44 , H04N7/01
CPC分类号： H04N7/0122 , H04N5/14 , Y10S348/913
摘要： A video signal compression apparatus extracts a specific value written in a read only memory at every system clock pulse. The specific value can be varied at every clock pulse. Therefore, for example, only the center part of a picture can be horizontally compressed. A FIFO memory may be used. It is possible to select a mode with a fixed compression ratio or a mode in which a compression ratio varies at every clock pulse. Further, the fixed compression ratio can be set from the outside. Display position of the picture can also be changed.
摘要翻译：视频信号压缩装置以每个系统时钟脉冲提取在只读存储器中写入的特定值。每个时钟脉冲可以改变具体值。因此，例如只能将图像的中央部分水平地压缩。可以使用FIFO存储器。可以选择具有固定压缩比的模式或压缩比在每个时钟脉冲下变化的模式。此外，可以从外部设定固定压缩比。图片的显示位置也可以更改。

7. 发明授权

US08115867B2 Image processing device 失效
标题翻译：图像处理装置
公开(公告)号：US08115867B2
公开(公告)日：2012-02-14
申请号：US11863673
申请日：2007-09-28
申请人： Shingo Miyauchi , Takao Hasegawa , Yutaka Nio
发明人： Shingo Miyauchi , Takao Hasegawa , Yutaka Nio
IPC分类号： H04N7/01 , H04N11/20 , H04N7/00 , H04N5/50 , H04N9/74 , H04N7/12 , H04N11/02 , H04N11/04 , H04N3/27 , H04N5/445 , H04N5/45
CPC分类号： H04N7/012 , H04N5/144 , H04N5/44504 , H04N21/44008 , H04N21/4402 , H04N21/4884
摘要： The present invention provides an image processing device that converts an interlace image signal into a progressive signal so as not to cause degradation of image quality in edge parts of letters or the like, when performing an IP conversion with respect to an image that is mixed with an OSD such as a caption and a telop. The image processing device includes: an OSD mix part that mixes an on-screen display with an input interlace image signal; a motion detecting part that detects a motion by comparing pixel data between different fields; and an interpolation pixel generating part that generates a new pixel between lines of the interlace image signal by interpolating calculation with an interpolation method that depends on an OSD mix ratio of the OSD mix part and a result of the motion detection by the motion detecting part.
摘要翻译：本发明提供了一种图像处理装置，其将隔行扫描图像信号转换为逐行信号，以便在对与图像混合的图像进行IP转换时不会导致字母边缘部分的图像质量劣化诸如标题和字幕的OSD。图像处理装置包括：OSD混合部分，其将屏幕显示与输入交错图像信号混合; 运动检测部，其通过比较不同场之间的像素数据来检测运动; 以及内插像素生成部，其通过使用依赖于OSD混合部的OSD混合比的内插法和运动检测部的运动检测结果进行内插计算来生成隔行扫描图像信号的行之间的新像素。

8. 发明授权

US07596188B2 Digital interface decode receiver apparatus 有权
标题翻译：数字接口解码接收机
公开(公告)号：US07596188B2
公开(公告)日：2009-09-29
申请号：US10548066
申请日：2004-05-27
申请人： Chikara Gotanda , Yutaka Nio , Kouichiro Nagata
发明人： Chikara Gotanda , Yutaka Nio , Kouichiro Nagata
IPC分类号： H03K9/00
CPC分类号： H04N7/52 , H04N5/08 , H04N5/4401 , H04N5/46 , H04N5/63 , H04N21/43632 , H04N21/4436
摘要： A power-down determination circuit calculates the horizontal frequency and vertical frequency, respectively, employing a clock signal obtained from a multiplier circuit and horizontal synchronization signal and vertical synchronization signal obtained from a TMDS decode circuit. The power-down determination circuit then determines whether an input digital signal does or does not have a decodable video format by comparing the calculated horizontal frequency and vertical frequency with horizontal frequencies and vertical frequencies stored beforehand, for output of a power-down control signal indicative of the determination. Thus, in the case where the input digital signal does not have a decodable format, the power-down control signal controls a video/audio processing circuit to enter a power-down mode.
摘要翻译：断电确定电路分别使用从乘法电路获得的时钟信号和从TMDS解码电路获得的水平同步信号和垂直同步信号来计算水平频率和垂直频率。断电确定电路然后通过将计算的水平频率和垂直频率与预先存储的水平频率和垂直频率进行比较来确定输入数字信号是否具有可解码的视频格式，用于输出指示的掉电控制信号的决心。因此，在输入数字信号不具有可解码格式的情况下，掉电控制信号控制视频/音频处理电路进入掉电模式。

9. 发明授权

US07339959B2 Signal transmitter and signal receiver 有权
标题翻译：信号发射机和信号接收机
公开(公告)号：US07339959B2
公开(公告)日：2008-03-04
申请号：US10149309
申请日：2001-10-12
申请人： Yutaka Nio , Hidekazu Suzuki , Toshiro Nishio
发明人： Yutaka Nio , Hidekazu Suzuki , Toshiro Nishio
IPC分类号： H04J3/04
CPC分类号： H04N21/235 , G09G5/006 , H04J3/1688 , H04N7/083 , H04N21/23614 , H04N21/2368 , H04N21/242 , H04N21/4307 , H04N21/4341 , H04N21/4348 , H04N21/435 , H04N21/8458
摘要： A signal transmitter and a signal receiver comprises a time base compression part (101) for compressing an audio signal on a time base to output the compressed signal as a time base compressed audio signal and a multiplexing part (102) for multiplexing a video signal, a control signal, and the time base compressed audio signal to output the multiplexed signal to the external as a video/audio control multiplexed signal. The thus constituted signal transmitter and the signal receiver realize a signal transmission system for multiplexing and transmitting the video signal, audio signal, and control signal, for consequently transmitting high-quality diverse digital audio signals without conversion into an analog signal, and for transmission at high speed with minimal error.
摘要翻译：信号发送器和信号接收器包括：时基压缩部件（101），用于按时间压缩音频信号，以输出压缩信号作为时基压缩音频信号;以及复用部分（102），用于复用视频信号，控制信号和时基压缩音频信号，以将多路复用信号作为视频/音频控制复用信号输出到外部。由此构成的信号发送器和信号接收器实现用于复用和发送视频信号，音频信号和控制信号的信号传输系统，从而在不转换成模拟信号的情况下传输高质量的多种数字音频信号，并用于传输高速度，最小误差。

10. 发明申请

US20060095623A1 Digital interface receiver apparatus 有权
标题翻译：数字接口接收装置
公开(公告)号：US20060095623A1
公开(公告)日：2006-05-04
申请号：US10548065
申请日：2004-05-27
申请人： Yutaka Nio , Kouichiro Nagata , Koichi Tanaka
发明人： Yutaka Nio , Kouichiro Nagata , Koichi Tanaka
IPC分类号： G06F13/24
CPC分类号： H04N17/004 , G09G5/006 , G09G2370/045 , G09G2370/12 , H04N5/445 , H04N5/60 , H04N11/042 , H04N21/43635 , H04N21/4396 , H04N21/44231 , H04N21/4882
摘要： An audio controlling device generates an audio mute signal based on the level of a power-supply voltage supplied from the source equipment, whether a clock signal has been input or not, whether a digital signal has been input or not, whether a multiplier circuit is being locked or not, an error rate, whether an audio clock detection circuit is being locked or not, the presence or absence of a change in a control signal, and whether a synchronization detection circuit is stable or not. The audio controlling device applies the audio mute signal to an audio mute circuit, while applying an OSD control signal to an OSD processing circuit. The audio mute circuit is placed in a mute state or unmute state based on the audio mute signal. The OSD processing circuit provides the on-screen display of a message based on the OSD control signal.
摘要翻译：音频控制装置基于从源设备提供的电源电压的电平，是否输入了时钟信号，是否输入了数字信号，生成音频静音信号，乘法电路是否为是否被锁定，音频时钟检测电路是否被锁定的错误率，控制信号中是否存在变化，以及同步检测电路是否稳定。音频控制装置将音频静音信号施加到音频静音电路，同时将OSD控制信号应用于OSD处理电路。音频静音电路基于音频静音信号置于静音状态或取消静音状态。 OSD处理电路基于OSD控制信号提供消息的屏幕显示。

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