会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明授权
    • Kernel-aware debugging system, medium, and method
    • 内核感知调试系统,介质和方法
    • US08239838B2
    • 2012-08-07
    • US11797759
    • 2007-05-07
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • G06F9/44
    • G06F11/3644G06F11/3656
    • A kernel-aware debugging system, medium, and method. The kernel-aware debugging system may include a kernel-aware debugging interface including a conditional breakpoint setting unit which sets a kernel-aware conditional breakpoint by checking a currently operating object inside a kernel of a target system when a central processing unit (CPU) of the target system stops operating at a particular position where the breakpoint is set and making the CPU proceed to operate when it is determined that it is not intended that the currently operating object be debugged. Moreover, the kernel-aware debugging interface may include a unit which stores control flow information for detecting faults due to asynchronous events, a profiling unit which collects profile information and allows back-tracing when faults occur, and a unit which debugs a synchronization problem between multitasks.
    • 内核感知调试系统,介质和方法。 内核感知调试系统可以包括内核感知调试接口,其包括条件断点设置单元,其通过在目标系统的内核中检查当前操作的对象来设置内核感知条件断点,当中央处理单元(CPU) 目标系统停止在设置断点的特定位置进行操作,并且当确定不希望当前操作对象被调试时使得CPU继续操作。 此外,内核感知调试接口可以包括存储用于检测由于异步事件引起的故障的控制流信息的单元,收集简档信息并在发生故障时允许回溯的简档单元,以及调试在故障发生之间的同步问题的单元 多任务
    • 2. 发明申请
    • Kernel-aware debugging system, medium, and method
    • 内核感知调试系统,介质和方法
    • US20070266376A1
    • 2007-11-15
    • US11797759
    • 2007-05-07
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • G06F9/44
    • G06F11/3644G06F11/3656
    • A kernel-aware debugging system, medium, and method. The kernel-aware debugging system may include a kernel-aware debugging interface including a conditional breakpoint setting unit which sets a kernel-aware conditional breakpoint by checking a currently operating object inside a kernel of a target system when a central processing unit (CPU) of the target system stops operating at a particular position where the breakpoint is set and making the CPU proceed to operate when it is determined that it is not intended that the currently operating object be debugged. Moreover, the kernel-aware debugging interface may include a unit which stores control flow information for detecting faults due to asynchronous events, a profiling unit which collects profile information and allows back-tracing when faults occur, and a unit which debugs a synchronization problem between multitasks.
    • 内核感知调试系统,介质和方法。 内核感知调试系统可以包括内核感知调试接口,其包括条件断点设置单元,其通过在目标系统的内核中检查当前操作的对象来设置内核感知条件断点,当中央处理单元(CPU) 目标系统停止在设置断点的特定位置进行操作,并且当确定不希望当前操作对象被调试时使得CPU继续操作。 此外,内核感知调试接口可以包括存储用于检测由于异步事件引起的故障的控制流信息的单元,收集简档信息并在发生故障时允许回溯的简档单元,以及调试在故障发生之间的同步问题的单元 多任务
    • 4. 发明申请
    • Method for reducing code size of program in code memory
    • 减少代码存储器中程序代码大小的方法
    • US20070074003A1
    • 2007-03-29
    • US11510730
    • 2006-08-28
    • Keun-soo YimJae-don LeeJeong-joon YooKyoung-ho KangJung-keun ParkChae-seok ImWoon-gee KimChang-woo Baek
    • Keun-soo YimJae-don LeeJeong-joon YooKyoung-ho KangJung-keun ParkChae-seok ImWoon-gee KimChang-woo Baek
    • G06F15/00G06F15/76
    • G06F9/445G06F9/30058G06F9/30065G06F9/30178G06F9/325G06F9/328G06F9/44557
    • A method of reducing a code size of a program by controlling a control flow of the program using software in a computer system is disclosed. The method includes the steps of storing a first program count of a first instruction in a first buffer when an error occurs while the first instruction having an Operand including Offset and Length is being executed among a plurality of instructions loaded in the code memory, changing a current program count of the code memory to a second program count which is obtained by adding the Offset to the first program count, storing a second instruction, which is located at a position shifted from the second program count by a value of the Length, in a second buffer, replacing the second instruction with a third instruction, which is not recognized by a microprocessor, replacing the third instruction with the second instruction stored in the second buffer when an error occurs while the third instruction is being executed, and changing the current program count of the code memory to a predetermined program count next to the first program count stored in the first buffer.
    • 公开了一种通过使用计算机系统中的软件控制程序的控制流来减少程序的代码大小的方法。 该方法包括以下步骤:当在包含偏移和长度的操作数的第一指令在被加载到代码存储器中的多个指令之间执行时,在发生错误时将第一指令的第一程序计数存储在第一缓冲器中, 将代码存储器的当前程序计数转换为通过将偏移量加到第一程序计数而获得的第二程序计数,将位于从第二程序计数移位的位置的长度的位置的第二指令存储在 第二缓冲器,用第三指令代替第二指令,微处理器无法识别第二指令,当在执行第三指令时发生错误,用存储在第二缓冲器中的第二指令替换第三指令,并且改变当前 代码存储器的程序计数到存储在第一缓冲器中的第一程序计数旁边的预定程序计数。
    • 9. 发明申请
    • Context switching method, medium, and system for reconfigurable processors
    • 可重构处理器的上下文切换方法,介质和系统
    • US20080133899A1
    • 2008-06-05
    • US11987662
    • 2007-12-03
    • Jung-keun ParkGyu-sang ChoiChae-seok ImChang-woo Baek
    • Jung-keun ParkGyu-sang ChoiChae-seok ImChang-woo Baek
    • G06F9/318
    • G06F15/7867
    • A context switching method, medium, and system with a reconfigurable processor. The context switching system include a reconfigurable processor reconfiguring a program according to reconfiguration information and executing the reconfigured program, a central processing unit outputting a load command for sequentially loading reconfiguration information required for a plurality of tasks, in order to control the plurality of tasks, a reconfiguration information selecting unit selecting reconfiguration information for context switching, a reconfiguration information loading unit receiving the load command from the central processing unit, and loading reconfiguration information corresponding to the load command from a memory, and a plurality of reconfiguration information storage units storing the reconfiguration information loaded by the reconfiguration information loading unit. Accordingly, by pre-loading reconfiguration information which is required many times while context switching is performed, it is possible to quickly perform context switching and perform multitasking with a small overhead.
    • 具有可重构处理器的上下文切换方法,介质和系统。 所述上下文切换系统包括可重构处理器,根据重新配置信息重新配置程序并执行重新配置的程序;中央处理单元,输出用于顺序加载多个任务所需的重新配置信息的加载命令,以便控制多个任务, 重新配置信息选择单元,选择用于上下文切换的重新配置信息,重新配置信息加载单元,从中央处理单元接收加载命令,以及从存储器加载与加载命令对应的重配置信息;以及多个重配置信息存储单元, 由重新配置信息加载单元加载的重新配置信息。 因此,通过在执行上下文切换时预先加载需要多次的重新配置信息,可以快速执行上下文切换并以小的开销执行多任务。
    • 10. 发明授权
    • Load balancing method and apparatus in symmetric multi-processor system
    • 对称多处理器系统中的负载平衡方法和装置
    • US08875151B2
    • 2014-10-28
    • US11976759
    • 2007-10-26
    • Gyu-sang ChoiChae-seok ImSi-hwa Lee
    • Gyu-sang ChoiChae-seok ImSi-hwa Lee
    • G06F9/46G06F9/50
    • G06F9/5088
    • Provided are a load balancing method and a load balancing apparatus in a symmetric multi-processor system. The load balancing method includes selecting at least two processors based on a load between a plurality of processors, from among the plurality of processors, migrating a predetermined task stored in a run queue of a first processor to a migration queue of a second processor, and migrating the predetermined task stored in the migration queue of the second processor to a run queue of the second processor. Accordingly, a run queue of a processor is not blocked while migrating a task, an immediate response of the run queue is possible, and a waiting time of a scheduler is reduced. Consequently, the scheduler can speedily perform context switching, and thus performance of the entire operating system is improved.
    • 提供了一种对称多处理器系统中的负载平衡方法和负载平衡装置。 所述负载平衡方法包括基于所述多个处理器之间的负载选择至少两个处理器,所述多个处理器之中将存储在第一处理器的运行队列中的预定任务迁移到第二处理器的迁移队列,以及 将存储在第二处理器的迁移队列中的预定任务迁移到第二处理器的运行队列。 因此,处理器的运行队列在迁移任务时不被阻塞,所以运行队列的即时响应是可能的,并且减少了调度器的等待时间。 因此,调度器可以快速执行上下文切换,从而提高整个操作系统的性能。