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    • 4. 发明申请
    • Method for reducing code size of program in code memory
    • 减少代码存储器中程序代码大小的方法
    • US20070074003A1
    • 2007-03-29
    • US11510730
    • 2006-08-28
    • Keun-soo YimJae-don LeeJeong-joon YooKyoung-ho KangJung-keun ParkChae-seok ImWoon-gee KimChang-woo Baek
    • Keun-soo YimJae-don LeeJeong-joon YooKyoung-ho KangJung-keun ParkChae-seok ImWoon-gee KimChang-woo Baek
    • G06F15/00G06F15/76
    • G06F9/445G06F9/30058G06F9/30065G06F9/30178G06F9/325G06F9/328G06F9/44557
    • A method of reducing a code size of a program by controlling a control flow of the program using software in a computer system is disclosed. The method includes the steps of storing a first program count of a first instruction in a first buffer when an error occurs while the first instruction having an Operand including Offset and Length is being executed among a plurality of instructions loaded in the code memory, changing a current program count of the code memory to a second program count which is obtained by adding the Offset to the first program count, storing a second instruction, which is located at a position shifted from the second program count by a value of the Length, in a second buffer, replacing the second instruction with a third instruction, which is not recognized by a microprocessor, replacing the third instruction with the second instruction stored in the second buffer when an error occurs while the third instruction is being executed, and changing the current program count of the code memory to a predetermined program count next to the first program count stored in the first buffer.
    • 公开了一种通过使用计算机系统中的软件控制程序的控制流来减少程序的代码大小的方法。 该方法包括以下步骤:当在包含偏移和长度的操作数的第一指令在被加载到代码存储器中的多个指令之间执行时,在发生错误时将第一指令的第一程序计数存储在第一缓冲器中, 将代码存储器的当前程序计数转换为通过将偏移量加到第一程序计数而获得的第二程序计数,将位于从第二程序计数移位的位置的长度的位置的第二指令存储在 第二缓冲器,用第三指令代替第二指令,微处理器无法识别第二指令,当在执行第三指令时发生错误,用存储在第二缓冲器中的第二指令替换第三指令,并且改变当前 代码存储器的程序计数到存储在第一缓冲器中的第一程序计数旁边的预定程序计数。
    • 5. 发明申请
    • Kernel-aware debugging system, medium, and method
    • 内核感知调试系统,介质和方法
    • US20070266376A1
    • 2007-11-15
    • US11797759
    • 2007-05-07
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • G06F9/44
    • G06F11/3644G06F11/3656
    • A kernel-aware debugging system, medium, and method. The kernel-aware debugging system may include a kernel-aware debugging interface including a conditional breakpoint setting unit which sets a kernel-aware conditional breakpoint by checking a currently operating object inside a kernel of a target system when a central processing unit (CPU) of the target system stops operating at a particular position where the breakpoint is set and making the CPU proceed to operate when it is determined that it is not intended that the currently operating object be debugged. Moreover, the kernel-aware debugging interface may include a unit which stores control flow information for detecting faults due to asynchronous events, a profiling unit which collects profile information and allows back-tracing when faults occur, and a unit which debugs a synchronization problem between multitasks.
    • 内核感知调试系统,介质和方法。 内核感知调试系统可以包括内核感知调试接口,其包括条件断点设置单元,其通过在目标系统的内核中检查当前操作的对象来设置内核感知条件断点,当中央处理单元(CPU) 目标系统停止在设置断点的特定位置进行操作,并且当确定不希望当前操作对象被调试时使得CPU继续操作。 此外,内核感知调试接口可以包括存储用于检测由于异步事件引起的故障的控制流信息的单元,收集简档信息并在发生故障时允许回溯的简档单元,以及调试在故障发生之间的同步问题的单元 多任务
    • 6. 发明授权
    • Kernel-aware debugging system, medium, and method
    • 内核感知调试系统,介质和方法
    • US08239838B2
    • 2012-08-07
    • US11797759
    • 2007-05-07
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • Keun-soo YimJung-keun ParkJeong-joon YooJae-don LeeChae-seok ImYoung-sam Shin
    • G06F9/44
    • G06F11/3644G06F11/3656
    • A kernel-aware debugging system, medium, and method. The kernel-aware debugging system may include a kernel-aware debugging interface including a conditional breakpoint setting unit which sets a kernel-aware conditional breakpoint by checking a currently operating object inside a kernel of a target system when a central processing unit (CPU) of the target system stops operating at a particular position where the breakpoint is set and making the CPU proceed to operate when it is determined that it is not intended that the currently operating object be debugged. Moreover, the kernel-aware debugging interface may include a unit which stores control flow information for detecting faults due to asynchronous events, a profiling unit which collects profile information and allows back-tracing when faults occur, and a unit which debugs a synchronization problem between multitasks.
    • 内核感知调试系统,介质和方法。 内核感知调试系统可以包括内核感知调试接口,其包括条件断点设置单元,其通过在目标系统的内核中检查当前操作的对象来设置内核感知条件断点,当中央处理单元(CPU) 目标系统停止在设置断点的特定位置进行操作,并且当确定不希望当前操作对象被调试时使得CPU继续操作。 此外,内核感知调试接口可以包括存储用于检测由于异步事件引起的故障的控制流信息的单元,收集简档信息并在发生故障时允许回溯的简档单元,以及调试在故障发生之间的同步问题的单元 多任务
    • 7. 发明申请
    • Multitasking method and apparatus for reconfigurable array
    • 用于可重构阵列的多任务方法和装置
    • US20070288930A1
    • 2007-12-13
    • US11808750
    • 2007-06-12
    • Keun-soo YimJeong-joon YooJeong-wook KimSoo-jung RyuJung-keun ParkJae-don LeeYoung-sam Shin
    • Keun-soo YimJeong-joon YooJeong-wook KimSoo-jung RyuJung-keun ParkJae-don LeeYoung-sam Shin
    • G06F9/46
    • G06F9/485
    • Provided are a multitasking method and apparatus. By continuously maintaining the intrinsic information of each peripheral processing unit of when a process-centered task is stopped, when a reconfigurable array stops executing the process-centered task and executes a different process-centered task, by stopping executing a control-centered task and executing a reconfiguration task, only when the reconfigurable array receives an execution request of the reconfiguration task while the reconfigurable array is performing the control-centered task, or by causing a predetermined number of processing units to execute each of a plurality of reconfiguration tasks that are to be simultaneously executed by the reconfigurable array, wherein the predetermined number of processing units is set in consideration of an expected data processing amount required for the reconfiguration task, the reconfigurable array can more quickly complete execution of multitasking.
    • 提供了多任务方法和装置。 通过持续维护每个外围处理单元在停止进程中心任务时的固有信息,当可重配置阵列停止执行以过程为中心的任务并执行不同的以过程为中心的任务时,通过停止执行以控制为中心的任务和 执行重新配置任务,只有当可重构阵列接收到重新配置任务的执行请求,同时可重构阵列正在执行以控制为中心的任务时,或者通过使预定数量的处理单元执行多个重新配置任务中的每一个, 由可重配置阵列同时执行,其中考虑到重新配置任务所需的预期数据处理量来设置预定数量的处理单元,可重构阵列可以更快速地完成多任务的执行。
    • 8. 发明授权
    • Multitasking method and apparatus for reconfigurable array
    • 用于可重构阵列的多任务方法和装置
    • US08645955B2
    • 2014-02-04
    • US11808750
    • 2007-06-12
    • Keun-soo YimJeong-joon YooJeong-wook KimSoo-jung RyuJung-keun ParkJae-don LeeYoung-sam Shin
    • Keun-soo YimJeong-joon YooJeong-wook KimSoo-jung RyuJung-keun ParkJae-don LeeYoung-sam Shin
    • G06F9/46
    • G06F9/485
    • Provided are a multitasking method and apparatus. By continuously maintaining the intrinsic information of each peripheral processing unit of when a process-centered task is stopped, when a reconfigurable array stops executing the process-centered task and executes a different process-centered task, by stopping executing a control-centered task and executing a reconfiguration task, only when the reconfigurable array receives an execution request of the reconfiguration task while the reconfigurable array is performing the control-centered task, or by causing a predetermined number of processing units to execute each of a plurality of reconfiguration tasks that are to be simultaneously executed by the reconfigurable array, wherein the predetermined number of processing units is set in consideration of an expected data processing amount required for the reconfiguration task, the reconfigurable array can more quickly complete execution of multitasking.
    • 提供了多任务方法和装置。 通过持续维护每个外围处理单元在停止进程中心任务时的固有信息,当可重配置阵列停止执行以过程为中心的任务并执行不同的以过程为中心的任务时,通过停止执行以控制为中心的任务和 执行重新配置任务,只有当可重构阵列接收到重新配置任务的执行请求,同时可重构阵列正在执行以控制为中心的任务时,或者通过使预定数量的处理单元执行多个重新配置任务中的每一个, 由可重配置阵列同时执行,其中考虑到重新配置任务所需的预期数据处理量来设置预定数量的处理单元,可重构阵列可以更快速地完成多任务的执行。