专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08319529B2 Drive circuit for a voltage control transistor 有权
标题翻译：用于电压控制晶体管的驱动电路
公开(公告)号：US08319529B2
公开(公告)日：2012-11-27
申请号：US12881842
申请日：2010-09-14
申请人： Kentaro Ikeda
发明人： Kentaro Ikeda
IPC分类号： H03B1/00 , H03K3/00
CPC分类号： H03K17/04123 , H03K2217/009
摘要： A resonant gate drive circuits for a voltage controlled transistor according to the embodiments are characterized by connecting a resonant inductor and a resistor to a gate of the voltage controlled transistor or a gate of the normally-on voltage controlled transistor or a voltage control terminal of a pseudo normally-off element, in series, and providing the drive circuit with two complementary switching elements connected in series.
摘要翻译：根据实施例的用于电压控制晶体管的谐振栅极驱动电路的特征在于将谐振电感器和电阻器连接到电压控制晶体管的栅极或常导通电压控制晶体管的栅极或者电压控制晶体管的电压控制端子伪常关断元件，并且为驱动电路提供串联连接的两个互补开关元件。

2. 发明申请

US20120228632A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20120228632A1
公开(公告)日：2012-09-13
申请号：US13227014
申请日：2011-09-07
申请人： Yoshiharu Takada , Kentaro Ikeda
发明人： Yoshiharu Takada , Kentaro Ikeda
IPC分类号： H01L29/16 , H01L29/20 , H01L27/06
CPC分类号： H01L27/0629 , H01L21/8213 , H01L21/8252 , H01L27/0605 , H01L29/2003 , H01L29/41758 , H01L29/7787 , H01L29/861 , H01L29/872
摘要： A semiconductor device of an embodiment includes: a semiconductor substrate; a field-effect transistor formed on the semiconductor substrate; and a diode forming area which is adjacent to a forming area of the field-effect transistor, wherein the diode forming area is insulated from the forming area of the transistor on the semiconductor substrate, and includes a first diode electrode in which a gate electrode of the field-effect transistor is placed in Schottky barrier junction and/or ohmic contact with the semiconductor substrate through a bus wiring or a pad; and a second diode electrode in which a source electrode of the field-effect transistor is placed in ohmic contact and/or Schottky barrier junction with the semiconductor substrate through a bus interconnection or a pad to form a diode between the gate electrode and the source electrode.
摘要翻译：实施例的半导体器件包括：半导体衬底; 形成在半导体衬底上的场效应晶体管; 以及与场效应晶体管的形成区域相邻的二极管形成区域，其中二极管形成区域与半导体衬底上的晶体管的形成区域绝缘，并且包括第一二极管电极，其中栅电极场效应晶体管通过总线布线或焊盘置于肖特基势垒结和/或与半导体衬底的欧姆接触; 以及第二二极管电极，其中场效应晶体管的源电极通过总线互连或焊盘与半导体衬底形成欧姆接触和/或肖特基势垒结，以在栅电极和源电极之间形成二极管。

3. 发明授权

US08604870B2 Constant-voltage circuit and semiconductor device thereof 有权
标题翻译：恒压电路及其半导体器件
公开(公告)号：US08604870B2
公开(公告)日：2013-12-10
申请号：US13215608
申请日：2011-08-23
申请人： Kentaro Ikeda
发明人： Kentaro Ikeda
IPC分类号： G05F1/10
CPC分类号： G05F3/242
摘要： A reference-voltage generating circuit of an embodiment includes a first FET; a second FET; a first resistor in which one end is connected to a power supply while the other end is connected to a drain of the first FET; and a second resistor that is connected between the drain and a gate of the first FET, wherein a gate and a source of the second FET are connected, a drain of the second FET is connected to the gate of the first FET, the drain of the first FET outputs a reference voltage, and the source of the first FET and the source of the second FET are connected to a ground or another circuit.
摘要翻译：实施例的参考电压产生电路包括第一FET; 第二FET; 第一电阻器，其一端连接到电源，而另一端连接到第一FET的漏极; 以及连接在第一FET的漏极和栅极之间的第二电阻器，其中连接第二FET的栅极和源极，第二FET的漏极连接到第一FET的栅极，漏极第一FET输出参考电压，第一FET的源极和第二FET的源极连接到地或另一个电路。

4. 发明授权

US08368084B2 Semiconductor device with capacitor disposed on gate electrode 有权
标题翻译：具有电容器的半导体器件设置在栅电极上
公开(公告)号：US08368084B2
公开(公告)日：2013-02-05
申请号：US12876598
申请日：2010-09-07
申请人： Kentaro Ikeda , Masahiko Kuraguchi
发明人： Kentaro Ikeda , Masahiko Kuraguchi
IPC分类号： H01L29/772
CPC分类号： H01L27/0605 , H01L27/0629 , H01L29/1608 , H01L29/2003 , H01L29/7786
摘要： In an embodiment, provided is a semiconductor device in which a normally-on type FET; a capacitor having one electrode electrically connected to a gate of the FET and the other electrode electrically connected to an input terminal; and a diode having an anode electrode electrically connected to the gate of the FET and a cathode electrode electrically connected to a source of the FET are formed on the same chip on which the FET is formed. Also, the capacitor may have a structure in which an insulation film such as a dielectric substance is formed on a gate drawn electrode of the FET, and a metallic layer is formed on the insulation layer.
摘要翻译：在一个实施例中，提供了一种半导体器件，其中常导型FET; 电容器，其一个电极与FET的栅极电连接，另一个电极与输入端电连接; 并且在与FET的栅极电连接的阳极电极和与FET的源极电连接的阴极电极的二极管形成在形成有FET的同一芯片上。此外，电容器可以具有其中在FET的栅极拉制电极上形成诸如电介质的绝缘膜的结构，并且在绝缘层上形成金属层。

5. 发明授权

US08624261B2 Nitride semiconductor device 有权
标题翻译：氮化物半导体器件
公开(公告)号：US08624261B2
公开(公告)日：2014-01-07
申请号：US13220005
申请日：2011-08-29
申请人： Kentaro Ikeda
发明人： Kentaro Ikeda
IPC分类号： H01L31/0256
CPC分类号： H01L29/7786 , H01L27/0605 , H01L27/0629 , H01L27/088 , H01L28/20 , H01L29/2003 , H01L29/205 , H01L29/41758 , H01L29/861 , H01L29/94 , H03K17/0406 , H03K17/0412 , H03K17/567
摘要： According to one embodiment, a nitride semiconductor device includes a first, a second, a third and a fourth transistor of n-type channel and a resistor. The first transistor has a first gate, a first source, and a first drain. The second transistor has a second gate, a second source electrically connected to the first gate, and a second drain. The third transistor has a third gate, a third source electrically connected to the first source, and a third drain electrically connected to the first gate and the second source. The fourth transistor has a fourth gate electrically connected to the third gate, a fourth source electrically connected to the first source and the third source, and a fourth drain electrically connected to the second gate. The resistor has one end electrically connected to the second drain and one other end electrically connected to the second gate and the fourth drain.
摘要翻译：根据一个实施例，氮化物半导体器件包括n型沟道的第一，第二，第三和第四晶体管和电阻器。第一晶体管具有第一栅极，第一源极和第一漏极。第二晶体管具有第二栅极，电连接到第一栅极的第二源极和第二漏极。第三晶体管具有第三栅极，电连接到第一源极的第三源极和与第一栅极和第二源极电连接的第三漏极。第四晶体管具有电连接到第三栅极的第四栅极，与第一源极和第三源极电连接的第四源极和与第二栅极电连接的第四漏极。电阻器的一端电连接到第二漏极，另一端电连接到第二栅极和第四漏极。

6. 发明授权

US08970872B2 Image formation control apparatus, image formation apparatus, image formation system, computer readable medium, and tandem printing system 有权
标题翻译：图像形成控制装置，图像形成装置，图像形成系统，计算机可读介质和串联打印系统
公开(公告)号：US08970872B2
公开(公告)日：2015-03-03
申请号：US12878294
申请日：2010-09-09
申请人： Kentaro Ikeda
发明人： Kentaro Ikeda
IPC分类号： G06F3/12 , G03G15/23 , G03G15/01
CPC分类号： G03G15/238 , G03G15/0178 , G03G15/0194 , G03G2215/00021
摘要： An image formation control apparatus includes a management unit, a communication unit, and a control unit. The management unit manages first image formation processing on a first face of a planar recording medium. The first image formation processing is performed by a first image formation apparatus. The communication unit communicates with a second image forming apparatus configured to perform image formation on a second face of the planar recording medium. The control unit performs control of transportation of the planar recording medium from the first image formation apparatus to the second image formation apparatus or from the second image formation apparatus. A first amount of time to start image formation from receiving an image formation instruction in the first image formation apparatus is smaller that a second amount of time to start image formation from receiving an image formation instruction in the second image formation apparatus.
摘要翻译：图像形成控制装置包括管理单元，通信单元和控制单元。管理单元在平面记录介质的第一面上管理第一图像形成处理。第一图像形成处理由第一图像形成装置执行。通信单元与被配置为在平面记录介质的第二面上进行图像形成的第二图像形成装置进行通信。控制单元执行平面记录介质从第一图像形成装置到第二图像形成装置或第二图像形成装置的传送的控制。在第一图像形成装置中从接收图像形成指令开始图像形成的第一时间量小于在第二图像形成装置中从接收图像形成指令开始图像形成的第二时间量。

7. 发明授权

US08754420B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08754420B2
公开(公告)日：2014-06-17
申请号：US13397887
申请日：2012-02-16
申请人： Kentaro Ikeda , Mayumi Morizuka
发明人： Kentaro Ikeda , Mayumi Morizuka
IPC分类号： H01L29/76
CPC分类号： H01L29/2003 , H01L29/205 , H01L29/861
摘要： A semiconductor device of an embodiment includes: a first semiconductor layer made of AlXGa1-XN (0
摘要翻译：实施例的半导体器件包括：由Al x Ga 1-x N（0

8. 发明授权

US08723234B2 Semiconductor device having a diode forming area formed between a field-effect transistor forming area and a source electrode bus wiring or pad 有权
标题翻译：具有在场效应晶体管形成区域和源电极总线布线或焊盘之间形成的二极管形成区域的半导体器件
公开(公告)号：US08723234B2
公开(公告)日：2014-05-13
申请号：US13227014
申请日：2011-09-07
申请人： Yoshiharu Takada , Kentaro Ikeda
发明人： Yoshiharu Takada , Kentaro Ikeda
IPC分类号： H01L21/02 , H01L29/66
CPC分类号： H01L27/0629 , H01L21/8213 , H01L21/8252 , H01L27/0605 , H01L29/2003 , H01L29/41758 , H01L29/7787 , H01L29/861 , H01L29/872
摘要： A semiconductor device of an embodiment includes: a semiconductor substrate; a field-effect transistor formed on the semiconductor substrate; and a diode forming area which is adjacent to a forming area of the field-effect transistor, wherein the diode forming area is insulated from the forming area of the transistor on the semiconductor substrate, and includes a first diode electrode in which a gate electrode of the field-effect transistor is placed in Schottky barrier junction and/or ohmic contact with the semiconductor substrate through a bus wiring or a pad; and a second diode electrode in which a source electrode of the field-effect transistor is placed in ohmic contact and/or Schottky barrier junction with the semiconductor substrate through a bus interconnection or a pad to form a diode between the gate electrode and the source electrode.
摘要翻译：实施例的半导体器件包括：半导体衬底; 形成在半导体衬底上的场效应晶体管; 以及与场效应晶体管的形成区域相邻的二极管形成区域，其中二极管形成区域与半导体衬底上的晶体管的形成区域绝缘，并且包括第一二极管电极，其中栅电极场效应晶体管通过总线布线或焊盘置于肖特基势垒结和/或与半导体衬底的欧姆接触; 以及第二二极管电极，其中场效应晶体管的源电极通过总线互连或焊盘与半导体衬底形成欧姆接触和/或肖特基势垒结，以在栅电极和源电极之间形成二极管。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式