专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

US20100054001A1 AC/DC Converter with Power Factor Correction 审中-公开
标题翻译：具有功率因数校正的AC / DC转换器
公开(公告)号：US20100054001A1
公开(公告)日：2010-03-04
申请号：US12198802
申请日：2008-08-26
申请人： Kenneth Dyer , Sajol Ghoshal , Philip John Crawley , John Camagna
发明人： Kenneth Dyer , Sajol Ghoshal , Philip John Crawley , John Camagna
IPC分类号： H02M3/335
CPC分类号： H02M3/33507 , H02M1/4225 , Y02B70/126
摘要： A power converter is configured for usage in a power factor correction system. The power converter comprises a transformer with a primary winding and a secondary winding which isolates a primary side from a secondary side. A primary side switch is coupled to the primary winding. An isolator coupled to the primary side switch isolates the primary side from the secondary side and comprises a signal pathway passing a digital signal from the primary side to the secondary side. Power factor correction circuitry is coupled to the primary side switch and adjusts electric load characteristics to improve power factor toward unity.
摘要翻译：功率转换器被配置为用于功率因数校正系统。功率转换器包括具有初级绕组的变压器和将初级侧与次级侧隔离的次级绕组。初级侧开关耦合到初级绕组。耦合到初级侧开关的隔离器将初级侧与次级侧隔离，并且包括将数字信号从初级侧传递到次级侧的信号路径。功率因数校正电路耦合到初级侧开关，并调整电负载特性以提高功率因数。

2. 发明申请

US20050074055A1 System, method and apparatus for crosstalk cancellation 有权
标题翻译：用于串扰消除的系统，方法和装置
公开(公告)号：US20050074055A1
公开(公告)日：2005-04-07
申请号：US10959622
申请日：2004-10-05
申请人： Hiroshi Takatori , Kenneth Dyer , Mark Callicotte
发明人： Hiroshi Takatori , Kenneth Dyer , Mark Callicotte
IPC分类号： H04B1/58 , H04B3/32 , H04B1/38
CPC分类号： H04B3/32 , H04B1/58
摘要： The present invention effectively cancels echo, near-end crosstalk and far-end crosstalk. A FEXT canceller is placed at the transmitter rather than at the receiver according to an aspect of the invention. In some embodiment, a FEXT canceller can be placed at the receiver only or the combination of both ends. The FEXT canceller is continuously adapted with information sent back from a remote receiver and with data from a neighbor transmitter that causes the crosstalk at the remote receiver. This allows the FEXT canceller to quickly adapt to a change in crosstalk function or conditions with the surrounding environment, for example, aging, temperature, humidity, physical pressure, etc. In some embodiments, an adaptation control signal is sent back from the receiver to the transmitter by using an overhead bit in the frame format. In some embodiments, part of the FEXT canceller is built-in at the remote receiver.
摘要翻译：本发明有效地消除了回波，近端串扰和远端串扰。根据本发明的一个方面，FEXT消除器被放置在发射器而不是接收器处。在一些实施例中，FEXT消除器可以仅放置在接收器处或两端的组合。 FEXT消除器连续地适应从远程接收器发回的信息和来自邻近发射机的数据，这些数据导致远端接收机的串扰。这允许FEXT消除器快速适应与周围环境（例如老化，温度，湿度，物理压力等）的串扰功能或条件的变化。在一些实施例中，自适应控制信号从接收器发送回发送器通过使用帧格式的开销位。在一些实施例中，FEXT消除器的一部分内置在远程接收器中。

3. 发明申请

US20050099216A1 Adaptive per-pair skew compensation method for extended reach differential transmission 失效
标题翻译：用于扩展差分传输的自适应每对偏移补偿方法
公开(公告)号：US20050099216A1
公开(公告)日：2005-05-12
申请号：US10938139
申请日：2004-09-10
申请人： Kenneth Dyer , Hiroshi Takatori
发明人： Kenneth Dyer , Hiroshi Takatori
IPC分类号： H03K5/01 , H03K5/135 , H04B20060101 , H04L7/00 , H04L25/02 , H04L25/08
CPC分类号： H03K5/135 , H04L25/0272 , H04L25/0292 , H04L25/08
摘要： High speed data transmission schemes often use differential lines to reduce the effect of noise on the data signal. Unfortunately, the signal propagation on the positive and negative lines may be different, which leads to a signal skew problem. This document describes a novel way of compensating for differential line skew in data transmission lines.
摘要翻译：高速数据传输方案通常使用差分线路来减少噪声对数据信号的影响。不幸的是，正负线上的信号传播可能不同，这导致信号偏斜问题。本文介绍了一种补偿数据传输线路中的差分线偏移的新方法。

4. 发明申请

US20050046459A1 Biasing technique using thin and thick oxide transistors 失效
公开(公告)号：US20050046459A1
公开(公告)日：2005-03-03
申请号：US10649098
申请日：2003-08-26
申请人： Perry Heedley , Kenneth Dyer
发明人： Perry Heedley , Kenneth Dyer
IPC分类号： H03F3/00 , H03F3/45 , H03L5/00
CPC分类号： H03F3/45188 , H03F3/005 , H03F3/4565 , H03F2203/45288 , H03F2203/45424
摘要： A biasing technique between a first circuit stage and a second circuit stage is described. Specifically, the technique comprises using a combination of thin and thick oxide transistors.

5. 发明申请

US20050134381A1 Common mode feedback circuit for fully differential two-stage operational amplifiers 失效
公开(公告)号：US20050134381A1
公开(公告)日：2005-06-23
申请号：US11045935
申请日：2005-01-27
申请人： Kenneth Dyer , Perry Heedley
发明人： Kenneth Dyer , Perry Heedley
IPC分类号： H03F3/00 , H03F3/45
CPC分类号： H03F3/4565 , H03F3/005 , H03F3/45188 , H03F2203/45288 , H03F2203/45424
摘要： An operational amplifier circuit that provides negative feedback and high gain is described. Specifically, the circuit comprises a first gain stage, a second gain stage, a feedback circuit, and a biasing circuit.

6. 发明申请

US20050069394A1 Method, device and system for output impedance calibration that invariably maximizes hybrid performance 失效
标题翻译：用于输出阻抗校准的方法，设备和系统总是使混合性能最大化
公开(公告)号：US20050069394A1
公开(公告)日：2005-03-31
申请号：US10923321
申请日：2004-08-20
申请人： Kenneth Dyer , Hiroshi Takatori
发明人： Kenneth Dyer , Hiroshi Takatori
IPC分类号： H03H7/40 , H03M1/06 , H03M1/10 , H03M1/66 , H04L5/14 , B64C1/22
CPC分类号： H03M1/1009 , H03H7/40 , H03M1/0678 , H03M1/66 , H04L5/1423 , H04L25/0278
摘要： A hybrid system with adjustable on-chip components and a method calibrating the same invariably maximizes hybrid performance despite of on- and off-chip component mismatches and imperfections. The hybrid system has a main DAC, a replica DAC, and three or four resistors. Both DACs are directly connected to digital data. An adjustable resistor is connected to the main DAC and is calibrated such that output impedance is automatically adjusted to match an off-chip load impedance Z. A replica DAC current K is calibrated for optimum DC matching in presence of Z. An adjustable capacitor C2 is calibrated for slope-matching (bandwidth matching). If Z changes, the calibration procedure should be repeated for optimal performance. These three calibration mechanisms can be utilized individually or in combination. The present invention is compatible with both analog and digital echo-cancellers.
摘要翻译：具有可调节片上组件的混合系统和校准该方法的方法总是使混合性能最大化，尽管片外组件不匹配和缺陷。混合系统具有主DAC，复制DAC和三个或四个电阻器。两个DAC都直接连接到数字数据。可调电阻器连接到主DAC并被校准，使得输出阻抗被自动调整以匹配片外负载阻抗Z.复制DAC电流K被校准用于存在Z时的最佳DC匹配。可调电容器C2是校准为斜率匹配（带宽匹配）。如果Z改变，则应重复校准程序以获得最佳性能。这三种校准机构可以单独使用或组合使用。本发明与模拟和数字回波消除器兼容。

7. 发明申请

US20050046480A1 Common mode feedback circuit for fully differential two-stage operational amplifiers 失效
公开(公告)号：US20050046480A1
公开(公告)日：2005-03-03
申请号：US10649402
申请日：2003-08-26
申请人： Kenneth Dyer , Perry Heedley
发明人： Kenneth Dyer , Perry Heedley
IPC分类号： H03F3/00 , H03F3/45
CPC分类号： H03F3/4565 , H03F3/005 , H03F3/45188 , H03F2203/45288 , H03F2203/45424
摘要： An operational amplifier circuit that provides negative feedback and high gain is described. Specifically, the circuit comprises a first gain stage, a second gain stage, a feedback circuit, and a biasing circuit.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式