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    • 4. 发明授权
    • Light radiation device, light source device, light radiation unit, and light connection mechanism
    • 光辐射装置,光源装置,光辐射装置和灯光连接机构
    • US06832849B2
    • 2004-12-21
    • US10308177
    • 2002-12-03
    • Kenji YonedaJun KonishiShigeki Masumura
    • Kenji YonedaJun KonishiShigeki Masumura
    • F21V704
    • G01B11/00G01N21/8806G02B6/0006G02B6/04G02B6/4298Y10S362/80
    • On the light radiation device X6A side, a box structure is provided in which a lens is held one by one proximate to or close to the light emission end of each optical fiber. On the light source device side, a common casing houses a first light source lens that generally collimates the radiation light beams radiated from an LED and a second light source lens that condenses the light beams from the first light source lens and introduces the condensed light beams to the light introduction end of the optical fiber bundle. Thus, the current demands of tests on a piece of work can be fully satisfied in view of the light condensing area and the light condensing efficiency while making the best of the characteristics of the illumination system in which the light radiation device and the light source device are separated with an intervention of the optical fibers.
    • 在光辐射装置X6A侧,设置有盒结构,其中透镜在每个光纤的发光端附近或靠近一个接一个地保持。 在光源装置侧,公共壳体容纳通常准直从LED辐射的辐射光的第一光源透镜和从第一光源透镜聚光光束的第二光源透镜,并将聚光光束 到光纤束的光引入端。 因此,考虑到聚光区域和聚光效率,可以充分满足当前对一件作业的测试要求,同时充分发挥照明系统的特征,其中光辐射装置和光源装置 被光纤干涉分离。
    • 9. 发明授权
    • Microprocessor and method for setting up its peripheral functions
    • 微处理器和设置其外设功能的方法
    • US5307464A
    • 1994-04-26
    • US621641
    • 1990-12-03
    • Yasushi AkaoShiro BabaYoshiyuki MiwaTerumi SawaseYuji SatoShigeki Masumura
    • Yasushi AkaoShiro BabaYoshiyuki MiwaTerumi SawaseYuji SatoShigeki Masumura
    • G06F13/12G06F15/78G06F13/00
    • G06F13/124G06F15/7814
    • A single chip microprocessor 1 includes a CPU 2 and a sub-processor 5 for software implementation of peripheral functions of the microprocessor 1. Sub-processor 5 includes electrically writable internal storage devices microprogram memory unit 13 and sequence control memory unit 62 for storing the software. Peripheral functions are defined and/or modified by writing software into the memory units 13 and 62. Accordingly, the time it takes to define and/or modify the peripheral functions is the time it takes to program the memory units 13 and 62. The sub-processor 5 also includes an execution unit 16 for executing a plurality of tasks and an address control circuit 14 for providing addresses to the microprogram memory unit 13. Additionally, the microprogram memory unit 13 provides microinstructions to the execution unit 16. The sequence control memory unit 62 is part of the address control circuit 14 which also includes a plurality of address registers MAR0 to MAR11. The sequence control memory unit 62 is used for storing information regarding the order of selection of the multiple address registers MAR0 to MAR11. One of the address registers MAR0 to MAR11 is selected each time the sequence control memory unit 62 is read. A microaddress stored in the selected address register is then supplied to the microprogram memory unit 13.
    • 单片微处理器1包括用于软件实现微处理器1的外围功能的CPU 2和子处理器5.子处理器5包括电可写内部存储设备微程序存储单元13和用于存储软件的顺控控制存储单元62 。 通过将软件写入存储器单元13和62来定义和/或修改外围功能。因此,定义和/或修改外围功能所花费的时间是编程存储器单元13和62所花费的时间。子 处理器5还包括用于执行多个任务的执行单元16和用于向微程序存储单元13提供地址的地址控制电路14.另外,微程序存储单元13向执行单元16提供微指令。顺序控制存储器 单元62是还包括多个地址寄存器MAR0至MAR11的地址控制电路14的一部分。 顺序控制存储器单元62用于存储关于多个地址寄存器MAR0至MAR11的选择顺序的信息。 每次读序列控制存储器单元62选择地址寄存器MAR0至MAR11中的一个。 存储在选择的地址寄存器中的微地址然后被提供给微程序存储单元13。