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1. 发明申请

US20120263003A1 DEVICE PERFORMING REFRESH OPERATIONS OF MEMORY AREAS 有权
标题翻译：执行存储区刷新操作的设备
公开(公告)号：US20120263003A1
公开(公告)日：2012-10-18
申请号：US13444032
申请日：2012-04-11
申请人： Kenichi SAKAKIBARA , Toru Ishikawa
发明人： Kenichi SAKAKIBARA , Toru Ishikawa
IPC分类号： G11C7/00
CPC分类号： G11C11/40615 , G11C11/40618
摘要： Disclosed herein is a device that includes a plurality of memory circuits and a refresh control circuit configured to generate a plurality of refresh initiation signals such that one of the refresh initiation signals takes an active level. Each of the memory circuits comprises a memory cell array including a plurality of memory cells, at least one data terminal, a data read/write circuit performing a data read operation to read out read-data from a selected one of the memory cells and supply the read-data to the data terminal and a data write operation to receive write-data from the data terminal and write the write-data into a selected one of the memory cells, and a refresh circuit performing a data refresh operation on selected one or ones of the memory cells of the memory cell array in response to an associated one of the refresh initiation signals taking the active level.
摘要翻译：本文公开了一种包括多个存储器电路和刷新控制电路的装置，该刷新控制电路被配置为产生多个刷新启动信号，使得刷新启动信号中的一个获得有效电平。每个存储器电路包括存储单元阵列，该存储单元阵列包括多个存储单元，至少一个数据端，数据读/写电路，执行数据读操作，以从所选存储单元中读出读数据并提供读取数据到数据终端，以及数据写入操作，以从数据终端接收写入数据，并将写入数据写入所选择的一个存储器单元;以及刷新电路，对选择的一个或所述存储器单元阵列的存储单元中的一个响应于所述刷新启动信号中的相关联的一个采用有效电平。

2. 发明授权

US08958259B2 Device performing refresh operations of memory areas 有权
标题翻译：设备执行内存区域的刷新操作
公开(公告)号：US08958259B2
公开(公告)日：2015-02-17
申请号：US13444032
申请日：2012-04-11
申请人： Kenichi Sakakibara , Toru Ishikawa
发明人： Kenichi Sakakibara , Toru Ishikawa
IPC分类号： G11C11/40 , G11C11/406
CPC分类号： G11C11/40615 , G11C11/40618
摘要： Disclosed herein is a device that includes a plurality of memory circuits and a refresh control circuit configured to generate a plurality of refresh initiation signals such that one of the refresh initiation signals takes an active level. Each of the memory circuits comprises a memory cell array including a plurality of memory cells, at least one data terminal, a data read/write circuit performing a data read operation to read out read-data from a selected one of the memory cells and supply the read-data to the data terminal and a data write operation to receive write-data from the data terminal and write the write-data into a selected one of the memory cells, and a refresh circuit performing a data refresh operation on selected one or ones of the memory cells of the memory cell array in response to an associated one of the refresh initiation signals taking the active level.
摘要翻译：本文公开了一种包括多个存储器电路和刷新控制电路的装置，该刷新控制电路被配置为产生多个刷新启动信号，使得刷新启动信号中的一个获得有效电平。每个存储器电路包括存储单元阵列，该存储单元阵列包括多个存储单元，至少一个数据端，数据读/写电路，执行数据读操作，以从所选存储单元中读出读数据并提供读取数据到数据终端，以及数据写入操作，以从数据终端接收写入数据，并将写入数据写入所选择的一个存储器单元;以及刷新电路，对选择的一个或所述存储器单元阵列的存储单元中的一个响应于所述刷新启动信号中的相关联的一个采用有效电平。

3. 发明授权

US08953409B2 Semiconductor device capable of minimizing mutual effects between two different operations therein 有权
标题翻译：能够最小化其中两种不同操作之间的相互影响的半导体器件
公开(公告)号：US08953409B2
公开(公告)日：2015-02-10
申请号：US12929965
申请日：2011-02-28
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G11C8/18 , G11C7/00
CPC分类号： G11C11/406 , G11C7/00
摘要： A device includes a control circuit that triggers a first operation every time a specific signal is supplied thereto, and that triggers a second operation in place of the first operation in response to the first specific signal supplied after the number of the first operation performed has reached a predetermined number.
摘要翻译：一种设备包括控制电路，每当向其提供特定信号时触发第一操作，并且响应于在执行的第一操作的数量已经达到之后提供的第一特定信号，触发第二操作代替第一操作预定数量。

4. 发明授权

US08654557B2 Semiconductor memory device, information processing system including the same, and controller 有权
标题翻译：半导体存储器件，包括其的信息处理系统和控制器
公开(公告)号：US08654557B2
公开(公告)日：2014-02-18
申请号：US13593046
申请日：2012-08-23
申请人： Yasushi Takahashi , Toru Ishikawa
发明人： Yasushi Takahashi , Toru Ishikawa
IPC分类号： G11C5/06
CPC分类号： G11C11/4096 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4093
摘要： A system including a controller and a memory chip. The controller includes first and second selection signal terminals supplying first and second selection signals, respectively, multiple first data terminals and multiple second data terminals. The memory chip includes a semiconductor substrate, third and fourth selection signal terminals provided on the semiconductor substrate and electrically coupled to the first and second selection signal terminals of the controller, respectively. Multiple third data terminals are provided on the semiconductor substrate and electrically coupled to the first data terminals of the controller, respectively. Multiple fourth data terminals are provided on the semiconductor substrate and electrically coupled to the second data terminals of the controller, respectively. The first and third data terminals communicate first data in response to the first selection signal. The second and fourth data terminals communicate second data in response to the second selection signal.
摘要翻译：一种包括控制器和存储器芯片的系统。控制器包括分别提供第一和第二选择信号的第一和第二选择信号端，多个第一数据终端和多个第二数据终端。存储器芯片包括半导体衬底，设置在半导体衬底上并分别电耦合到控制器的第一和第二选择信号端子的第三和第四选择信号端子。多个第三数据端子分别设置在半导体衬底上并电连接到控制器的第一数据端。多个第四数据端子分别设置在半导体衬底上并电连接到控制器的第二数据端。第一和第三数据终端响应于第一选择信号来传送第一数据。第二和第四数据终端响应于第二选择信号传送第二数据。

5. 发明申请

US20140017574A1 ADDITIVE FOR SODIUM ION SECONDARY BATTERY AND SODIUM ION SECONDARY BATTERY 有权
标题翻译：用于钠离子二次电池和钠离子二次电池的添加剂
公开(公告)号：US20140017574A1
公开(公告)日：2014-01-16
申请号：US14007250
申请日：2012-03-08
申请人： Atsushi Ito , Yasuhiko Ohsawa , Shinichi Komaba , Naoaki Yabuuchi , Wataru Murata , Toru Ishikawa , Yuta Matsuura
发明人： Atsushi Ito , Yasuhiko Ohsawa , Shinichi Komaba , Naoaki Yabuuchi , Wataru Murata , Toru Ishikawa , Yuta Matsuura
IPC分类号： H01M10/0567 , H01M10/054
CPC分类号： H01M10/0567 , H01M4/366 , H01M4/587 , H01M10/054 , H01M2300/0025
摘要： An additive for a sodium ion secondary battery of the present invention includes a compound of at least one of a saturated cyclic carbonate having a fluoro group and a chain carbonate having a fluoro group. A sodium ion secondary battery (1) of the present invention includes: a non-aqueous electrolytic solution including the additive for a sodium ion secondary battery and a non-aqueous solvent containing a saturated cyclic carbonate or a non-aqueous solvent containing a saturated cyclic carbonate and a chain carbonate; a positive electrode (11); and a negative electrode (12) that includes a coating formed in a surface of the negative electrode, the coating containing a composite material having carbon, oxygen, fluorine and sodium in the surface and includes a negative-electrode active material containing a hard carbon.
摘要翻译：本发明的钠离子二次电池用添加剂包括具有氟基的饱和环状碳酸酯和具有氟基的链状碳酸酯中的至少一种的化合物。本发明的钠离子二次电池（1）包括：含有钠离子二次电池用添加剂和含有饱和环状碳酸酯或含有饱和环状碳酸酯的非水溶剂的非水溶剂的非水电解液碳酸酯和链状碳酸酯; 正极（11）; 和包含在负极表面形成的涂层的负极（12），所述涂层含有表面上具有碳，氧，氟和钠的复合材料，并且包括含有硬碳的负极活性物质。

6. 发明授权

US08274844B2 Semiconductor memory device, information processing system including the same, and controller 有权
标题翻译：半导体存储器件，包括其的信息处理系统和控制器
公开(公告)号：US08274844B2
公开(公告)日：2012-09-25
申请号：US12784147
申请日：2010-05-20
申请人： Yasushi Takahashi , Toru Ishikawa
发明人： Yasushi Takahashi , Toru Ishikawa
IPC分类号： G11C7/00
CPC分类号： G11C11/4096 , G11C7/10 , G11C7/22 , G11C11/4076 , G11C11/4093
摘要： To include first and second data input/output terminals allocated to first and second memory circuit units, respectively, and an address terminal allocated in common to these memory circuit units. When a first chip selection signal is activated, the first memory circuit unit performs a read operation or a write operation via the first data input/output terminal based on an address signal regardless of an operation of the second memory circuit unit. When a second chip selection signal is activated, the second memory circuit unit performs a read operation or a write operation via the second data input/output terminal based on the address signal regardless of an operation of the first memory circuit unit. With this configuration, a wasteful data transfer can be prevented, and the effective data transfer rate can be increased.
摘要翻译：分别包括分配给第一和第二存储器电路单元的第一和第二数据输入/输出端子以及共同分配给这些存储器电路单元的地址端子。当第一芯片选择信号被激活时，与第二存储器电路单元的操作无关地，第一存储器电路单元基于地址信号经由第一数据输入/输出端执行读操作或写操作。当第二芯片选择信号被激活时，第二存储器电路单元基于地址信号执行经由第二数据输入/输出端子的读取操作或写入操作，而与第一存储器电路单元的操作无关。利用这种配置，可以防止浪费的数据传送，并且可以提高有效的数据传送速率。

7. 发明申请

US20110216612A1 Device 有权
标题翻译：设备
公开(公告)号：US20110216612A1
公开(公告)日：2011-09-08
申请号：US12929965
申请日：2011-02-28
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C7/00
摘要： A device includes a control circuit that triggers a first operation every time a specific signal is supplied thereto, and that triggers a second operation in place of the first operation in response to the first specific signal supplied after the number of the first operation performed has reached a predetermined number.
摘要翻译：一种设备包括控制电路，每当向其提供特定信号时触发第一操作，并且响应于在执行的第一操作的数量已经达到之后提供的第一特定信号，触发第二操作代替第一操作预定数量。

8. 发明授权

US07816949B2 Signal transmission circuit and signal transmission system using the same 有权
标题翻译：信号传输电路和信号传输系统使用相同
公开(公告)号：US07816949B2
公开(公告)日：2010-10-19
申请号：US12379289
申请日：2009-02-18
申请人： Toru Ishikawa
发明人： Toru Ishikawa
IPC分类号： H03K19/094
CPC分类号： H04L25/0264 , H01L2224/48137 , H04L25/0278
摘要： A signal transmission circuit includes first and second power source wirings, and a plurality of differential circuits connected in series between the first and second power source wirings. A signal transmission system includes a plurality of pairs of signal wirings, an output circuit supplying a differential signal to each of the pairs of signal wirings, and an input circuit receiving the differential signals via the pairs of signal wirings, wherein the output circuit includes first and second power source wirings, and a plurality of differential output circuits connected in series between the first and second power source wirings, and the input circuit includes a plurality of differential input circuits respectively corresponding to the differential output circuits.
摘要翻译：信号传输电路包括第一和第二电源布线，以及串联连接在第一和第二电源布线之间的多个差分电路。信号传输系统包括多对信号布线，输出电路向每对信号布线提供差分信号，以及输入电路经由信号配线对接收差分信号，其中输出电路包括第一和第二电源布线，以及串联连接在第一和第二电源布线之间的多个差分输出电路，并且输入电路包括分别对应于差分输出电路的多个差分输入电路。

9. 发明申请

US20100065021A1 Fuel Injection Valve 有权
标题翻译：燃油喷射阀
公开(公告)号：US20100065021A1
公开(公告)日：2010-03-18
申请号：US12438668
申请日：2006-09-25
申请人： Masahiko Hayatani , Motoyuki Abe , Toru Ishikawa , Eiichi Kubota , Takehiko Kowatari
发明人： Masahiko Hayatani , Motoyuki Abe , Toru Ishikawa , Eiichi Kubota , Takehiko Kowatari
IPC分类号： F02M51/00
CPC分类号： F02M51/0671 , F02M51/0685 , F02M2200/07 , F02M2200/304
摘要： In a fuel injection valve used for an internal combustion engine, a valve closing lag time due to fluid resistance in a fuel path is shortened to decrease a minimum injection limit. More specifically, in the fuel injection valve in which an anchor is attracted to an end face part of a stationary core having a fuel path formed at a center part thereof by means of electromagnetic force, and in which a fuel injection hole is opened and closed by controlling a valve disc driven in conjunction with the anchor, there are provided a fuel reservoir part at a center part of an upper end face part of the anchor, a through hole extending axially in a fashion that an end part thereof is open to the fuel reservoir part, and a fuel path extending radially outward from the fuel reservoir part so that fuel is fed to a magnetic attraction gap between an upper end face part of the anchor and a lower end face part of the stationary core. Further, an opening part of a through hole that is open to an upper end face part of the anchor is at least partially opposed to a fuel introduction bore formed in the stationary core, and on the opening part of the through hole, a fuel introduction part is provided for capturing fuel running radially outward from a center side part of the anchor and for guiding the fuel thus captured to the through hole.
摘要翻译：在用于内燃机的燃料喷射阀中，由于燃料路径中的流体阻力引起的关闭滞后时间被缩短以减小最小喷射极限。更具体地说，在燃料喷射阀中，锚具被吸引到具有通过电磁力形成在其中心部分处的燃料路径的固定铁芯的端面部分，并且其中燃料喷射孔被打开和关闭通过控制与锚固件一起驱动的阀盘，在锚固件的上端面部分的中心部分设置有一个燃料储存部分，一个轴向延伸的通孔，该通孔的端部向燃料储存部分和从燃料储存部分径向向外延伸的燃料路径，使得燃料被供给到锚固件的上端面部分和固定铁芯的下端面部分之间的磁吸引间隙。此外，通向孔的上端面部分开口的通孔的开口部分至少部分地与形成在固定铁芯中的燃料导入孔相对，并且在通孔的开口部分上具有燃料引入设置有用于捕获从锚的中心侧径向向外延伸的燃料并且将如此捕获的燃料引导到通孔。

10. 发明申请

US20100012754A1 FUEL INJECTION VALVE 有权
标题翻译：燃油喷射阀
公开(公告)号：US20100012754A1
公开(公告)日：2010-01-21
申请号：US12439102
申请日：2006-09-25
申请人： Masahiko Hayatani , Motoyuki Abe , Toru Ishikawa , Eiichi Kubota , Takehiko Kowatari
发明人： Masahiko Hayatani , Motoyuki Abe , Toru Ishikawa , Eiichi Kubota , Takehiko Kowatari
IPC分类号： F02M51/00
CPC分类号： F02M51/0685 , F02M51/0671 , F02M2200/07
摘要： In relation to injectors used for internal-combustion engines, it is important to decrease valve closing delay time and also the minimum injection quantity, while these are affected by remanent magnetism in the fixed core, surface tension of the fuel, etc. With reference to a fuel injection valve with a pipe-shaped member to enclose a fixed core and a movable part and further with coils and yokes to cover up the above pipe-shaped member, the anchor to drive the movable member has a plurality of through holes for fuel passage extending in the axial direction, while these through holes are arranged at a certain intervals in the circumferential direction, and projections formed to constitute a contacting surface to touch the fixed core arranged randomly in between the through holes.
摘要翻译：关于用于内燃机的喷射器，重要的是减小闭阀延迟时间以及最小喷射量，同时它们受到固定铁芯中的剩余磁性，燃料表面张力等的影响。参考具有管状部件的燃料喷射阀，其包围固定铁芯和可动部，并且还具有用于覆盖上述管状部件的线圈和轭，驱动可动部件的锚具具有多个用于燃料的通孔通孔沿轴向方向延伸，而这些通孔在圆周方向上以一定的间隔布置，并且突起形成为构成接触表面以接触随机布置在通孔之间的固定芯。

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