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1. 发明授权

US5891234A Spin on glass material and method for forming a semiconductor device by using improved spin on glass material 失效
标题翻译：通过使用玻璃材料上的旋转来旋转玻璃材料和形成半导体器件的方法
公开(公告)号：US5891234A
公开(公告)日：1999-04-06
申请号：US619086
申请日：1996-03-21
申请人： Kenichi Koyanagi , Koji Kishimoto , Tetsuya Homma
发明人： Kenichi Koyanagi , Koji Kishimoto , Tetsuya Homma
IPC分类号： H01L21/768 , C03C1/00 , H01L21/316 , C09D183/04
CPC分类号： C03C1/008
摘要： A spin on glass composition which includes in a solvent as a main component alkoxysilane represented by H.sub.n Si(OR).sub.4-n, where n is 1, 2, or 3 and R is an alkyl group. Water or alcohol is available as a solvent. It is preferable to add the above alkoxysilane with at least any one of a phosphorus compound, boron compound and a germanium compound. It is also preferable to add the above alkoxysilane not only with tetraalkoxysilane Si(OR).sub.4, where R is an alkyl group, but also with at least any one of phosphorus compound, boron compound and germanium compound.
摘要翻译：在由H n Si（OR）4-n表示的主要成分的烷氧基硅烷的溶剂中包括n为1,2或3，R为烷基的旋涂玻璃组合物。水或醇可作为溶剂使用。优选使用磷化合物，硼化合物和锗化合物中的至少一种添加上述烷氧基硅烷。另外，优选不仅与四烷氧基硅烷Si（OR）4（其中R为烷基），而且还与磷化合物，硼化合物和锗化合物中的至少一种相加。

2. 发明授权

US06346302B2 High density plasma enhanced chemical vapor deposition method 失效
标题翻译：高密度等离子体增强化学气相沉积法
公开(公告)号：US06346302B2
公开(公告)日：2002-02-12
申请号：US09196558
申请日：1998-11-20
申请人： Koji Kishimoto , Kenichi Koyanagi
发明人： Koji Kishimoto , Kenichi Koyanagi
IPC分类号： H05H124
CPC分类号： H01J37/32165 , C23C16/505 , H01L21/02131 , H01L21/0214 , H01L21/02164 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/02337 , H01L21/31612 , H01L21/31629
摘要： A high density plasma enhanced chemical vapor deposition method for depositing an insulating film such as a silicon oxide film on a silicon substrate includes at least both a first deposition period during which a first power having a first frequency is applied to the silicon substrate and a second deposition period during which a second power having a second frequency which is lower than the first frequency is applied to the silicon substrate to keep an underlying Si/SiO2 interface free from an interface state, where said underlying Si/SiO2 interface has already been formed under said insulating film.
摘要翻译：用于在硅衬底上沉积诸如氧化硅膜的绝缘膜的高密度等离子体增强化学气相沉积方法至少包括将具有第一频率的第一功率施加到硅衬底的第一沉积周期和第二沉积周期，沉积周期，其中具有低于第一频率的第二频率的第二功率被施加到硅衬底以保持下面的Si / SiO 2界面没有界面状态，其中已经形成下面的Si / SiO 2界面所述绝缘膜。

3. 发明授权

US6005291A Semiconductor device and process for production thereof 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US6005291A
公开(公告)日：1999-12-21
申请号：US138011
申请日：1998-08-21
申请人： Kenichi Koyanagi , Kunihiro Fujii , Tatsuya Usami , Koji Kishimoto
发明人： Kenichi Koyanagi , Kunihiro Fujii , Tatsuya Usami , Koji Kishimoto
IPC分类号： H01L21/28 , H01L21/312 , H01L21/314 , H01L21/768 , H01L23/522 , H01L23/532 , H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53223 , H01L23/5226 , H01L23/5329 , H01L2924/0002
摘要： A semiconductor device comprising an insulating film at least partially containing a fluorine-containing film, formed above a semiconductor substrate, and a titanium nitride film formed on the insulating film. The above titanium film functions as a barrier metal film for barriering the diffusion of fluorine (F) atoms.
摘要翻译：一种半导体器件，包括至少部分含有形成在半导体衬底上的含氟膜的绝缘膜和形成在绝缘膜上的氮化钛膜的半导体器件。上述钛膜用作阻挡氟（F）原子扩散的阻挡金属膜。

4. 发明授权

US06033990A Method for manufacturing a multilevel interconnection structure 失效
标题翻译：制造多层互连结构的方法
公开(公告)号：US06033990A
公开(公告)日：2000-03-07
申请号：US34776
申请日：1998-03-04
申请人： Koji Kishimoto , Kenichi Koyanagi
发明人： Koji Kishimoto , Kenichi Koyanagi
IPC分类号： H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/311 , H01L21/768 , H01L21/00
CPC分类号： H01L21/02063 , H01L21/31116 , H01L21/76802 , H01L21/76814
摘要： A method for fabricating a semiconductor device on a silicon substrate comprises the step of high-frequency plasma-treatment for through-hole before filling the through-hole with a metallic layer for connection. The plasma contains argon, oxygen and hydrogen atoms wherein the ratio of oxygen atoms to the total of the oxygen and hydrogen atoms in number is between 1/3 and 1/100. The silicon substrate is applied with a high-frequency bias voltage during the plasma treatment for acceleration of argon ion.
摘要翻译：一种用于在硅衬底上制造半导体器件的方法包括在用连接金属层填充通孔之前对通孔进行高频等离子体处理的步骤。等离子体含有氩，氧和氢原子，其中氧原子与氧和氢原子的总数之比在1/3至1/100之间。在用于加速氩离子的等离子体处理期间，硅衬底被施加高频偏置电压。

5. 发明授权

US08880217B2 Picking system 有权
标题翻译：采摘系统
公开(公告)号：US08880217B2
公开(公告)日：2014-11-04
申请号：US13337818
申请日：2011-12-27
申请人： Tetsuro Izumi , Kenichi Koyanagi , Kenji Matsukuma , Yukio Hashiguchi
发明人： Tetsuro Izumi , Kenichi Koyanagi , Kenji Matsukuma , Yukio Hashiguchi
IPC分类号： G06F7/00 , G06K9/34
CPC分类号： G06K9/34
摘要： A picking system includes a conveyer, a robot, a main camera, and a control device. The conveyer conveys workpieces. The robot performs a holding operation and a moving operation on the workpieces. The main camera captures the transport path of the conveyer. The control device detects the workpiece on the basis of the image captured by the main camera and instructs the robot to perform the holding operation on the detected workpiece. Moreover, the control device instructs the robot to perform the holding operation on the overlapped workpieces when the overlapping of the workpieces is detected.
摘要翻译：拾取系统包括输送机，机器人，主摄像机和控制装置。输送机输送工件。机器人对工件执行保持操作和移动操作。主相机捕获输送机的输送路径。控制装置基于由主摄像机拍摄的图像来检测工件，并指示机器人对检测到的工件执行保持操作。此外，当检测到工件的重叠时，控制装置指示机器人对重叠的工件执行保持操作。

6. 发明授权

US07303973B2 ALD process for capacitor dielectric 有权
标题翻译：电容电介质的ALD工艺
公开(公告)号：US07303973B2
公开(公告)日：2007-12-04
申请号：US10630444
申请日：2003-07-29
申请人： Kenichi Koyanagi , Hiroshi Sakuma
发明人： Kenichi Koyanagi , Hiroshi Sakuma
IPC分类号： H01L21/20
CPC分类号： H01L21/0228 , H01L21/02175 , H01L21/31604 , H01L21/31683 , H01L27/10808 , H01L27/10852 , H01L28/91
摘要： Provided is a method for manufacturing a semiconductor device, including a dual-stage deposition step including: a first stage for introducing tantalum penta-ethoxide containing tantalum as a material gas into a reaction chamber in which a semiconductor substrate on a surface of which a lower electrode is made of ruthenium is placed to thus form a tantalum oxide film by a vapor-phase growth method such as a chemical vapor deposition method and the following second stage for removing from the reaction chamber the material gas introduced into the reaction chamber at the first stage and a byproduct produced at the first stage by introducing a nitrogen gas, and wherein the tantalum oxide film is formed on the semiconductor substrate, by repeating the dual-stage deposition step two or more times.
摘要翻译：本发明提供一种半导体装置的制造方法，其特征在于，包括：第一阶段，将含有钽的钽五乙酸盐作为原料气体引入反应室，其中表面上的半导体衬底的下层电极由钌制成，由此通过气相生长法如化学气相沉积法形成氧化钽膜，以及随后的第二阶段，用于从反应室除去在第一个反应室中引入反应室的原料气体通过引入氮气在第一阶段产生副产物，并且其中通过重复两级沉积步骤两次或更多次在半导体衬底上形成氧化钽膜。

7. 发明申请

US20070148896A1 MEMORY WITH MEMORY CELLS THAT INCLUDE A MIM TYPE CAPACITOR WITH A LOWER ELECTRODE MADE FOR REDUCED RESISTANCE AT AN INTERFACE WITH A METAL FILM 审中-公开
标题翻译：具有存储器电池的存储器，其包括具有用于在具有金属膜的接口下具有降低电阻的较低电极的MIM型电容器
公开(公告)号：US20070148896A1
公开(公告)日：2007-06-28
申请号：US11563442
申请日：2006-11-27
申请人： Yoshitaka Nakamura , Hidekazu Goto , Isamu Asano , Mitsuhiro Horikawa , Keiji Kuroki , Hiroshi Sakuma , Kenichi Koyanagi , Tsuyoshi Kawagoe
发明人： Yoshitaka Nakamura , Hidekazu Goto , Isamu Asano , Mitsuhiro Horikawa , Keiji Kuroki , Hiroshi Sakuma , Kenichi Koyanagi , Tsuyoshi Kawagoe
IPC分类号： H01L21/20
CPC分类号： H01L28/65 , H01L21/7687 , H01L27/10814 , H01L27/10852
摘要： A semiconductor device includes memory cells each having an MISFET for memory selection formed on one major surface of a semiconductor substrate and a capacitive element comprised of a lower electrode electrically connected at a bottom portion to one of a source and drain of the MISFET for memory selection via a first metal layer and an upper electrode formed on the lower electrode via a capacitive insulating film. The lower electrode has a thickness of 30 nm or greater at the bottom portion thereof. Sputtering with a high ionization ratio and high directivity, such as PCM, is adapted to the formation of the lower electrode to make only the bottom portion of a capacitor thicker.
摘要翻译：一种半导体器件包括各自具有形成在半导体衬底的一个主表面上的用于存储器选择的MISFET的存储单元，以及由用于存储器选择的MISFET的源极和漏极的底部电连接到下部电极的电容元件经由电容绝缘膜经由形成在下电极上的第一金属层和上电极。下部电极的底部的厚度为30nm以上。具有高电离比和高方向性的溅射（例如PCM）适于形成下电极，以使电容器的底部仅较厚。

8. 发明申请

US20070051310A1 Semiconductor manufacturing apparatus 有权
标题翻译：半导体制造装置
公开(公告)号：US20070051310A1
公开(公告)日：2007-03-08
申请号：US11511507
申请日：2006-08-29
申请人： Kenichi Koyanagi
发明人： Kenichi Koyanagi
IPC分类号： C23C16/00
CPC分类号： C23C16/45546 , C23C16/4412 , C23C16/45527 , C23C16/45578
摘要： A semiconductor manufacturing apparatus has a nozzle with a plurality of tiny holes. The nozzle Is connected to a vacuum pump through a valve without closing its end so as to be evacuated and purged independently of the reaction chamber.
摘要翻译：半导体制造装置具有具有多个微小孔的喷嘴。喷嘴通过阀门连接到真空泵，而不关闭其端部，以便独立于反应室进行抽真空和净化。

9. 发明授权

US07763500B2 Method for manufacturing semiconductor storage device comprising a slow cooling step 失效
标题翻译：一种制造半导体存储装置的方法，包括缓慢冷却步骤
公开(公告)号：US07763500B2
公开(公告)日：2010-07-27
申请号：US11498129
申请日：2006-08-03
申请人： Takashi Arao , Kenichi Koyanagi , Kenji Komeda , Naruhiko Nakanishi , Hideki Gomi
发明人： Takashi Arao , Kenichi Koyanagi , Kenji Komeda , Naruhiko Nakanishi , Hideki Gomi
IPC分类号： H01L21/335 , H01L21/8232
CPC分类号： H01L28/40 , H01L27/10852 , H01L28/84
摘要： First, a base structure provided with the main parts of a memory cell is prepared, and a lower electrode comprising a polycrystalline silicon film is thereafter formed on the base structure. Next, the surface of the lower electrode is thermally nitrided at a predetermined temperature to form a silicon nitride film. In the thermal nitridation of the lower electrode, the temperature is increased to a predetermined nitriding temperature, after which the temperature is reduced at a rate that is more gradual than usual. Aluminum oxide (Al2O3) or another metal oxide dielectric film is thereafter formed as the capacitive insulating film on the lower electrode, and an upper electrode is formed on the capacitive insulating film.
摘要翻译：首先，准备设置有存储单元的主要部分的基底结构，然后在基底结构上形成包括多晶硅膜的下部电极。接下来，将下电极的表面在预定温度下热氮化，以形成氮化硅膜。在下电极的热氮化中，将温度升高到预定的氮化温度，之后以比通常更渐进的速度降低温度。此后，在下电极上形成作为电容绝缘膜的氧化铝（Al2O3）或其他金属氧化物电介质膜，在电容绝缘膜上形成上电极。

10. 发明授权

US07741173B2 Method for forming a metal oxide film 失效
标题翻译：金属氧化物膜的形成方法
公开(公告)号：US07741173B2
公开(公告)日：2010-06-22
申请号：US11746185
申请日：2007-05-09
申请人： Kenichi Koyanagi , Hiroshi Sakuma
发明人： Kenichi Koyanagi , Hiroshi Sakuma
IPC分类号： H01L21/8242
CPC分类号： H01L21/02271 , C23C16/405 , C23C16/45525 , H01L21/02175 , H01L21/02181 , H01L21/02183 , H01L21/02186 , H01L21/3141 , H01L21/31637 , H01L27/10852 , H01L28/84 , H01L28/90
摘要： A method for forming a capacitor insulation film includes the step of depositing a monoatomic film made of a metal by supplying a metal source including the metal and no oxygen, and depositing a metal oxide film including the metal by using a CVD technique. The method provides the metal oxide film having higher film properties with a higher throughput.
摘要翻译：一种形成电容器绝缘膜的方法包括通过提供包括金属和不含氧的金属源沉积由金属制成的单原子膜并通过CVD技术沉积包括金属的金属氧化物膜的步骤。该方法提供具有较高膜特性并具有较高生产量的金属氧化物膜。

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