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    • 1. 发明授权
    • Double gate semiconductor device and control device thereof
    • 半导体功率器件
    • US5459339A
    • 1995-10-17
    • US53650
    • 1993-04-29
    • Ken'ya SakuraiMasahito OtsukiNoriho TerasawaTadashi MiyasakaAkira NishiuraMasaharu Nishiura
    • Ken'ya SakuraiMasahito OtsukiNoriho TerasawaTadashi MiyasakaAkira NishiuraMasaharu Nishiura
    • H01L29/739H01L29/745H01L29/749H03K17/0812H03K17/082H03K17/567H01L29/74H01L31/111
    • H01L29/7395H01L29/7455H01L29/749H03K17/08128H03K17/0828H03K17/567
    • A semiconductor device thyristor structure includes a first conductive type collector region, second conductive type and first conductive type base regions, and a second conductive type emitter region. First conductive type regions and second conductive type regions have respective first and second type majority carriers. A first MOSFET injects the second type majority carriers into the second conductive type base region. A second MOSFET is opened and closed independent of the first MOSFET and extracts the first type majority carriers from the first conductive type base region. A third MOSFET has a first gate electrode which is also a gate electrode of the first MOSFET, for extracting the first type majority carriers from the first conductive type base region. First conductive type and second conductive type emitter regions are formed within the first conductive type base region and an emitter voltage can be simultaneously applied to these emitter regions. The first conductive type emitter region is formed within the second conductive type emitter region. A second gate electrode of the second MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region and the first conductive type base region through a gate insulating film. The first gate electrode of the first and third MOSFET is formed on the surface of the first conductive type emitter region, the second conductive type emitter region, the first conductive type base region and the second conductive type base region through a gate insulating film.
    • 半导体器件晶闸管结构包括第一导电型集电极区域,第二导电型和第一导电型基极区域以及第二导电型发射极区域。 第一导电类型区域和第二导电类型区域具有相应的第一和第二多数载流子。 第一MOSFET将第二类型多数载流子注入第二导电型基极区域。 独立于第一MOSFET的第二个MOSFET被打开和关闭,并从第一导电类型的基极区域提取出第一类型多数载流子。 第三MOSFET具有第一栅极电极,其也是第一MOSFET的栅电极,用于从第一导电类型基极区域提取第一多数载流子。 第一导电类型和第二导电型发射极区域形成在第一导电类型基极区域内,并且发射极电压可以同时施加到这些发射极区域。 第一导电型发射极区域形成在第二导电型发射极区域内。 通过栅极绝缘膜,在第一导电型发射极区域,第二导电型发射极区域和第一导电型基极区域的表面上形成第二MOSFET的第二栅电极。 第一和第三MOSFET的第一栅极通过栅极绝缘膜形成在第一导电型发射极区域,第二导电型发射极区域,第一导电型基极区域和第二导电型基极区域的表面上。
    • 7. 发明授权
    • Semiconductor device
    • 半导体器件
    • US5500619A
    • 1996-03-19
    • US121470
    • 1993-09-16
    • Tadashi Miyasaka
    • Tadashi Miyasaka
    • H03K17/0812H03K17/082H03K17/16H03K17/687
    • H03K17/0822H03K17/08128H03K17/0828H03K17/163H03K17/168
    • A semiconductor device includes a main insulated gate type switching element having a gate electrode and controllable by a gate voltage applied to the gate electrode, a current detecting insulated gate type switching element connected in parallel to the main insulated gate type switching element, a detecting resistor for detecting a current flowing in the current detecting insulated gate type switching element, a gate controlling element capable of controlling the gate voltage by a drop voltage in the detecting resistor, and a gate control relieving element for relieving a varying speed of the gate voltage varied based on an operation of the gate controlling element.
    • 一种半导体器件包括:具有栅电极且可由施加到栅电极的栅极电压控制的主绝缘栅型开关元件,与主绝缘栅型开关元件并联连接的电流检测绝缘栅型开关元件,检测电阻器 用于检测在电流检测绝缘栅型开关元件中流动的电流,能够通过检测电阻器中的下降电压来控制栅极电压的栅极控制元件和用于缓和栅极电压变化速度的栅极控制释放元件 基于门控制元件的操作。