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1. 发明授权

US06735422B1 Calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture 有权
标题翻译：用于零中频架构配置的无线通信设备的校准直流补偿系统
公开(公告)号：US06735422B1
公开(公告)日：2004-05-11
申请号：US09677975
申请日：2000-10-02
申请人： Keith R. Baldwin , Patrick J. Landy , Mark A. Webster , R. Douglas Schultz , John S. Prentice
发明人： Keith R. Baldwin , Patrick J. Landy , Mark A. Webster , R. Douglas Schultz , John S. Prentice
IPC分类号： H04B106
CPC分类号： H04B1/30 , H03D3/008 , H03D3/009 , H03L7/0812 , H03L7/085 , H04L27/0014 , H04L2027/0016
摘要： A calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency (ZIF) architecture. The device includes a ZIF transceiver and a baseband processor, which further includes a calibrator that periodically performs a calibration procedure. The baseband processor includes gain control logic, DC control logic, a gain converter and the calibrator. The gain converter converts gain between the gain control logic and the DC control logic. The calibrator programs the gain converter with values determined during the calibration procedure. The gain converter may be a lookup table that stores gain conversion values based on measured gain of a baseband gain amplifier of the ZIF transceiver. The gain control logic may further include a gain adjust limiter that limits change of a gain adjust signal during operation based on a maximum limit or on one or more gain change limits. A second lookup table stores a plurality of DC adjust values, which are added during operation to further reduce DC offset. The calibration procedure includes sampling an output signal for each gain step of the baseband amplifier at two predetermined range values and corresponding DC offsets using successive approximation. The data is used to calculate gain, DC offset and DC differential values, which are used to determine the conversion values programmed into the lookup tables or the gain adjust limiter.
摘要翻译：一种用于以零中频（ZIF）架构配置的无线通信设备的校准DC补偿系统。该设备包括ZIF收发器和基带处理器，其还包括定期执行校准过程的校准器。基带处理器包括增益控制逻辑，直流控制逻辑，增益转换器和校准器。增益转换器在增益控制逻辑和直流控制逻辑之间转换增益。校准器使用在校准过程中确定的值来对增益转换器进行编程。增益转换器可以是基于ZIF收发器的基带增益放大器的测量增益来存储增益转换值的查找表。增益控制逻辑还可以包括增益调节限制器，其限制在运行期间增益调整信号的变化，其基于最大限制或一个或多个增益变化限制。第二查找表存储多个DC调整值，其在操作期间被添加以进一步减少DC偏移。校准过程包括使用逐次近似在两个预定范围值和相应的DC偏移下对基带放大器的每个增益步长的输出信号进行采样。该数据用于计算增益，直流偏移和直流差分值，用于确定编入查找表或增益调节限制器的转换值。

2. 发明授权

US06560448B1 DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture 有权
标题翻译：用于在零中频架构中配置的无线通信设备的DC补偿系统
公开(公告)号：US06560448B1
公开(公告)日：2003-05-06
申请号：US09678901
申请日：2000-10-02
申请人： Keith R. Baldwin , Patrick J. Landy , Mark A. Webster , R. Douglas Schultz , John S. Prentice
发明人： Keith R. Baldwin , Patrick J. Landy , Mark A. Webster , R. Douglas Schultz , John S. Prentice
IPC分类号： H04B106
CPC分类号： H04B1/30 , H03D3/008
摘要： A wireless communication device including a radio frequency (RF) circuit, a ZIF transceiver and a baseband processor. The ZIF transceiver includes an RF mixer circuit that converts the RF signal to a baseband input signal, a summing junction that subtracts a DC offset from the baseband input signal to provide an adjusted baseband input signal, and a baseband amplifier that receives the adjusted baseband input signal and that asserts an amplified input signal based on a gain adjust signal. The baseband processor includes gain control logic, DC control logic and a gain interface. The gain control logic receives the amplified input signal, estimates input signal power and asserts the gain adjust signal in an attempt to keep the input signal power at a target power level. The DC control logic estimates an amount of DC in the amplified input signal and provides the DC offset in an attempt to reduce DC in the amplified input signal. The gain interface converts gain levels between the gain control logic and the DC control logic. The RF signal may include in-phase (I) and quadrature (Q) portions, where the RF mixer circuit splits I and Q baseband input signals from the RF signal. Operation is substantially identical for both I and Q channels. The DC control logic operates to remove or otherwise eliminate DC from the received signal that is provided to decoders in the baseband processor.
摘要翻译：一种包括射频（RF）电路，ZIF收发器和基带处理器的无线通信设备。 ZIF收发器包括将RF信号转换为基带输入信号的RF混频器电路，从基带输入信号减去DC偏移以提供经调整的基带输入信号的加法结以及接收经调整的基带输入的基带放大器信号，并且基于增益调整信号确定放大的输入信号。基带处理器包括增益控制逻辑，直流控制逻辑和增益接口。增益控制逻辑接收放大的输入信号，估计输入信号功率并且确定增益调整信号以试图将输入信号功率保持在目标功率电平。 DC控制逻辑估计放大输入信号中的DC量，并提供DC偏移以试图减小放大的输入信号中的DC。增益接口转换增益控制逻辑和直流控制逻辑之间的增益电平。 RF信号可以包括同相（I）和正交（Q）部分，其中RF混频器电路从RF信号分离I和Q基带输入信号。 I和Q通道的操作基本相同。 DC控制逻辑操作以从提供给基带处理器中的解码器的接收信号中去除或以其他方式消除DC。

3. 发明授权

US06763228B2 Precision automatic gain control circuit 有权
标题翻译：精密自动增益控制电路
公开(公告)号：US06763228B2
公开(公告)日：2004-07-13
申请号：US10027386
申请日：2001-12-21
申请人： John S. Prentice , Patrick J. Landy
发明人： John S. Prentice , Patrick J. Landy
IPC分类号： H04B104
CPC分类号： H03F3/45085 , H03G3/3052 , H03G7/06
摘要： An automatic gain control (AGC) amplifier including a high gain transimpedance amplifier, a resistive feedback network and multiple transconductance stages coupled in the feedback path of the AGC amplifier. The feedback network receives an input signal and is coupled to the output of the high gain amplifier and has multiple intermediate nodes. Each transconductance stage has an input coupled to an intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. Each transconductance stage is independently controllable to position a virtual ground within the feedback network to control closed loop gain. Each transconductance stage may have a bias current input coupled to a bias current control circuit. The control circuit controls each bias current to vary the gain of the AGC amplifier. The bias currents may be linearly controlled employing a ramp function to achieve a linear in dB gain response.
摘要翻译：包括耦合在AGC放大器的反馈路径中的高增益跨阻抗放大器，电阻反馈网络和多个跨导级的自动增益控制（AGC）放大器。反馈网络接收输入信号并耦合到高增益放大器的输出并具有多个中间节点。每个跨导级具有耦合到反馈网络的中间节点的输入和耦合到高增益放大器的输入的输出。每个跨导级可独立控制，以便在反馈网络内定位虚拟地，以控制闭环增益。每个跨导级可以具有耦合到偏置电流控制电路的偏置电流输入。控制电路控制每个偏置电流以改变AGC放大器的增益。偏置电流可以采用斜坡函数进行线性控制，以实现dB增益响应的线性。

4. 发明授权

US06538507B2 Automatic gain control circuit with high linearity and monotonically correlated offset voltage 失效
公开(公告)号：US06538507B2
公开(公告)日：2003-03-25
申请号：US10079983
申请日：2002-02-21
申请人： John S. Prentice , Patrick J. Landy
发明人： John S. Prentice , Patrick J. Landy
IPC分类号： H03F136
CPC分类号： H03F1/3211 , H03F3/45085 , H03F3/456 , H03F3/45973 , H03F2203/45574 , H03G3/3042
摘要： An automatic gain control (AGC) circuit including a high gain amplifier, a feedback network and two transconductance amplifiers. The feedback network has a first end that receives an input signal of the AGC circuit, a second end coupled to the output of the high gain amplifier and two intermediate nodes. Each transconductance amplifier has an input coupled to a respective intermediate node of the feedback network and an output coupled to the input of the high gain amplifier. The transconductance amplifiers collectively control a position of a virtual ground within the feedback network to control gain of the AGC circuit. The transconductance amplifiers each include an attenuator and a transconductance stage coupled between the feedback network and the high gain amplifier and are configured to operate linearly across a relatively wide input voltage range. The input offset voltage of the AGC circuit varies monotonically with gain of the AGC circuit.

5. 发明授权

US08888004B2 Finger sensing device including differential measurement circuitry and related methods 有权
标题翻译：手指感测装置包括差分测量电路和相关方法
公开(公告)号：US08888004B2
公开(公告)日：2014-11-18
申请号：US13269316
申请日：2011-10-07
申请人： Dale R. Setlak , Patrick J. Landy , Albert M. Straub , Roger Lee Schenk
发明人： Dale R. Setlak , Patrick J. Landy , Albert M. Straub , Roger Lee Schenk
IPC分类号： G06K7/08 , G06K9/60 , G06K9/00
CPC分类号： G06K9/0002 , G06K9/605
摘要： A finger sensing device may include an array of finger sensing pixels to receive a user's finger adjacent thereto. Each finger sensing pixel may include a finger sensing electrode. The finger sensing device may include a finger drive electrode configured to couple a drive signal through the user's finger to the array of finger sensing pixels. The finger sensing device may also include differential pixel measurement circuitry coupled to the array of finger sensing pixels and configured to generate a plurality of interpixel difference measurements for adjacent pairs of the finger sensing pixels.
摘要翻译：手指感测装置可以包括用于接收与其相邻的用户手指的手指感测像素的阵列。每个手指感测像素可以包括手指感测电极。手指感测装置可以包括手指驱动电极，其被配置为将驱动信号通过用户的手指耦合到手指感测像素的阵列。手指感测装置还可以包括耦合到手指感测像素阵列的差分像素测量电路，并且被配置为针对手指感测像素的相邻对产生多个像素间差分测量。

6. 发明申请

US20120085822A1 FINGER SENSING DEVICE INCLUDING DIFFERENTIAL MEASUREMENT CIRCUITRY AND RELATED METHODS 有权
标题翻译：手指感测装置，包括差分测量电路及相关方法
公开(公告)号：US20120085822A1
公开(公告)日：2012-04-12
申请号：US13269316
申请日：2011-10-07
申请人： Dale R. Setlak , Patrick J. Landy , Albert M. Straub , Roger Lee Schenk
发明人： Dale R. Setlak , Patrick J. Landy , Albert M. Straub , Roger Lee Schenk
IPC分类号： G06K7/01
CPC分类号： G06K9/0002 , G06K9/605
摘要： A finger sensing device may include an array of finger sensing pixels to receive a user's finger adjacent thereto. Each finger sensing pixel may include a finger sensing electrode. The finger sensing device may include a finger drive electrode configured to couple a drive signal through the user's finger to the array of finger sensing pixels. The finger sensing device may also include differential pixel measurement circuitry coupled to the array of finger sensing pixels and configured to generate a plurality of interpixel difference measurements for adjacent pairs of the finger sensing pixels.
摘要翻译：手指感测装置可以包括用于接收与其相邻的用户手指的手指感测像素的阵列。每个手指感测像素可以包括手指感测电极。手指感测装置可以包括手指驱动电极，其被配置为将驱动信号通过用户的手指耦合到手指感测像素的阵列。手指感测装置还可以包括耦合到手指感测像素阵列的差分像素测量电路，并且被配置为针对手指感测像素的相邻对产生多个像素间差分测量。

7. 发明授权

US06580591B2 Switched electrostatic discharge ring for integrated circuits with multiple power inputs 有权
公开(公告)号：US06580591B2
公开(公告)日：2003-06-17
申请号：US09746736
申请日：2000-12-21
申请人： Patrick J. Landy
发明人： Patrick J. Landy
IPC分类号： H02H900
CPC分类号： H01L27/0251 , H01L2924/0002 , H01L2924/00
摘要： An electrostatic discharge (ESD) switch circuit for an integrated circuit (IC) with multiple power inputs for improving pin-to-power isolation of the IC. The IC includes a plurality of positive power pins and a corresponding plurality of negative power pins. The IC also includes an ESD ring network with a high ESD bus and a low ESD bus. The IC further includes a control circuit indicating one of several operational modes. The ESD switch circuit includes a first switch circuit that couples the high ESD bus to a first positive power pin in a first operational mode and that couples the high ESD bus to a second positive power pin in a second operational mode. The ESD switch circuit further includes a second switch circuit that couples the low ESD bus to a first negative power pin in the first operational mode and that couples the low ESD bus to a second negative power pin in the second operational mode. When power is removed or when the IC is disconnected from other circuitry, the switch circuit disconnects the power inputs from the ESD buses so that ESD conduction operates as normal.

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