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1. 发明授权

US5422965A Air bag operation device 失效
标题翻译：气囊操作装置
公开(公告)号：US5422965A
公开(公告)日：1995-06-06
申请号：US17389
申请日：1993-02-12
申请人： Keisuke Bekki , Hiroshi Sato , Korefumi Tashiro , Seiko Suzuki , Masayoshi Suzuki
发明人： Keisuke Bekki , Hiroshi Sato , Korefumi Tashiro , Seiko Suzuki , Masayoshi Suzuki
IPC分类号： B60R21/16 , B60R21/01 , G01D3/08 , G01P21/00 , B60R21/32
CPC分类号： B60R21/0173 , B60R21/0132 , G01D3/08 , G01P21/00
摘要： An air bag operation device which employs only one CPU module to guarantee sufficient fail-safety in the operation of the air bag without increasing the scale of the hardware. A plurality of crash-discriminating programs of different versions and a plurality of self-diagnosing programs of different versions are executed by a single CPU module, a signal is fed to an air bag igniting device based upon a comparison of the discriminated results by the plurality of crash-discriminating programs, and a signal is fed to an abnormality alarm device based upon comparison of the discriminated results of the plurality of self-diagnosing programs.
摘要翻译：一种安全气囊操作装置，其仅使用一个CPU模块来保证气囊操作中的足够的故障安全性，而不增加硬件的规模。不同版本的多个碰撞鉴别程序和多个不同版本的自诊断程序由单个CPU模块执行，基于多个识别结果的比较将信号馈送到气囊点火装置基于多个自诊断程序的辨别结果的比较，将信号馈送到异常报警装置。

2. 发明授权

US06513131B1 Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it 失效
标题翻译：具有错误检测功能的逻辑电路，冗余资源管理方法和使用它的容错系统
公开(公告)号：US06513131B1
公开(公告)日：2003-01-28
申请号：US09376008
申请日：1999-08-19
申请人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
发明人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
IPC分类号： G06F702
CPC分类号： G06F11/0763 , G05B9/03 , G06F11/008 , G06F11/0796 , G06F11/085 , G06F11/1695 , G06F11/18 , G06F11/188 , G06F11/2023 , G06F11/2035 , G06F11/2215
摘要： A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
摘要翻译：对于高度可靠的系统配置有用的自检电路包括具有错误检测功能的逻辑电路。对于用于输出至少双工的多个信号的功能块，逻辑电路比较功能块的输出信号，并且基于比较的结果来检测错误。逻辑电路包括合成装置，用于将预先分配的固有波形与功能块的各个输出信号叠加到一个功能块的输出信号上。固有波形是由正交波形发生器电路产生的正交波形。逻辑电路还包括比较装置，用于将合成装置的信号输出与另一功能块的信号输出进行比较，以检测误差。包括功能块的整个电路仅在存在两个输出信号固有的波形时才被判断为正常。

3. 发明授权

US6092217A Logic circuit having error detection function, redundant resource management method and fault tolerant system using it 失效
标题翻译：具有错误检测功能的逻辑电路，冗余资源管理方法和使用它的容错系统
公开(公告)号：US6092217A
公开(公告)日：2000-07-18
申请号：US962879
申请日：1997-11-03
申请人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
发明人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
IPC分类号： G05B9/03 , G06F11/00 , G06F11/08 , G06F11/16 , G06F11/18 , G06F11/20 , G06F11/267 , G06F7/02 , H04L1/00
CPC分类号： G06F11/0763 , G05B9/03 , G06F11/085 , G06F11/1695 , G06F11/188 , G06F11/2023 , G06F11/2035 , G06F11/2215 , G06F11/008 , G06F11/0796 , G06F11/18
摘要： A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
摘要翻译：对于高度可靠的系统配置有用的自检电路包括具有错误检测功能的逻辑电路。对于用于输出至少双工的多个信号的功能块，逻辑电路比较功能块的输出信号，并且基于比较的结果来检测错误。逻辑电路包括合成装置，用于将预先分配的固有波形与功能块的各个输出信号叠加到一个功能块的输出信号上。固有波形是由正交波形发生器电路产生的正交波形。逻辑电路还包括比较装置，用于将合成装置的信号输出与另一功能块的信号输出进行比较，以检测误差。包括功能块的整个电路仅在存在两个输出信号固有的波形时才被判定为正常。

4. 发明授权

US5802266A Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it 失效
标题翻译：具有错误检测功能的逻辑电路，冗余资源管理方法和使用它的容错系统
公开(公告)号：US5802266A
公开(公告)日：1998-09-01
申请号：US323094
申请日：1994-10-14
申请人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
发明人： Nobuyasu Kanekawa , Shoji Suzuki , Yoshimichi Sato , Korefumi Tashiro , Keisuke Bekki , Hiroshi Sato , Makoto Nohmi , Shinya Ohtsuji
IPC分类号： G05B9/03 , G05B13/02 , G06F11/00 , G06F11/08 , G06F11/16 , G06F11/18 , G06F11/20 , G06F11/267 , G06F17/50 , H03K19/007 , G06F7/02 , H04L1/00
CPC分类号： G05B9/03 , G06F11/0763 , G06F11/085 , G06F11/1608 , G06F11/1695 , G06F11/188 , G06F11/2215 , G06F11/0796
摘要： A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing circuitry provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also compares the output signals having the superimposed inherent waveforms with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.
摘要翻译：对于高度可靠的系统配置有用的自检电路包括具有错误检测功能的逻辑电路。对于用于输出至少双工的多个信号的功能块，逻辑电路比较功能块的输出信号，并且基于比较的结果来检测错误。逻辑电路包括合成电路，用于将预先分配的固有波形叠加到功能块的各个输出信号到功能块之一的输出信号上。固有波形是由正交波形发生器电路产生的正交波形。逻辑电路还将具有叠加的固有波形的输出信号与另一功能块的信号输出进行比较，以检测错误。包括功能块的整个电路仅在存在两个输出信号固有的波形时才被判定为正常。

5. 发明授权

US5805797A Controller having a fail safe function, automatic train controller and system using the same 失效
标题翻译：具有故障安全功能的控制器，自动列车控制器和使用它的系统
公开(公告)号：US5805797A
公开(公告)日：1998-09-08
申请号：US580336
申请日：1995-12-28
申请人： Hiroshi Sato , Nobuyasu Kanekawa , Makoto Nohmi , Korefumi Tashiro
发明人： Hiroshi Sato , Nobuyasu Kanekawa , Makoto Nohmi , Korefumi Tashiro
IPC分类号： B60L3/08 , B61L3/00 , B61L3/22 , B61L15/00 , G05B9/02 , G05B9/03 , G06F11/00 , G06F11/10 , G06F11/16 , G08C25/00
CPC分类号： B61L15/0063 , B61L25/021 , B61L3/008 , B61L3/22 , G06F11/0796 , G06F11/1641 , G06F11/165 , G06F11/1004
摘要： An ATP device generates control data for two systems from an ATP command speed signal, provides duplicate logic units in the ATP device so as to process the respective control data, provides at least two CRC data for checking the control data for each system, and changes the CRC data of the opposite logic unit or selects one of the two according to the content of a failure detection signal from each of the duplicated logic units. It is possible to check the control data and the operation of each logic circuit in such a way that only when all the data, circuits, and elements operate normally will an output signal for controlling the object to be controlled be outputted, and when a failure is detected in a part, an output signal to that effect is outputted. Therefore, when a failure occurs, a fail safe function for performing control on the safe side is made possible.
摘要翻译： ATP设备从ATP命令速度信号生成两个系统的控制数据，在ATP设备中提供重复的逻辑单元，以处理相应的控制数据，提供至少两个用于检查每个系统的控制数据的CRC数据，并且改变相对逻辑单元的CRC数据或者根据来自每个复制逻辑单元的故障检测信号的内容来选择两者之一。可以以这样的方式检查每个逻辑电路的控制数据和操作，使得只有当所有的数据，电路和元件正常运行时才能输出用于控制待控制对象的输出信号，并且当故障在一部分中被检测到，输出这样的输出信号。因此，当发生故障时，可以进行用于对安全侧执行控制的故障保护功能。

6. 发明授权

US4651317A Time division multiplex data transmission system 失效
标题翻译：时分复用数据传输系统
公开(公告)号：US4651317A
公开(公告)日：1987-03-17
申请号：US555214
申请日：1983-11-23
申请人： Korefumi Tashiro , Kunio Saito , Hiroshi Sato , Takamasa Hori
发明人： Korefumi Tashiro , Kunio Saito , Hiroshi Sato , Takamasa Hori
IPC分类号： H04L5/22 , B60L3/08 , B60L15/42 , B60R16/02 , B60R16/03 , G08C15/12 , H04J3/00 , H04Q9/00 , B61L15/00
CPC分类号： G08C15/12 , B60R16/0315
摘要： A time division multiplex data transmission system. A particular time slot among those for data transmission is placed with alternation of different data modes such as "1" and "0" in a commanding station destined for issuing commands. The alternation of data modes is supplied to receiver stations together with other data. When alternation of data modes is detected at the particular time slot in the receiver station, the reception of one command signal from the commanding station is confirmed, while detection of disappearance of the alternation of data modes indicates other command. Since a fault in the data transmission system results in generation of a fixed data mode or level such as "1" or alternatively "0", the alternation of data modes and disappearance thereof can define the commands discriminatively from the state brought about by the fault. Fail-safe feature can thus be realized.
摘要翻译：时分复用数据传输系统。在用于发送命令的命令台中，用于数据传输的特定时隙被放置为具有不同数据模式的诸如“1”和“0”的交替。数据模式的交替与其他数据一起提供给接收站。当在接收站中的特定时隙检测到数据模式的交替时，确认来自命令站的一个命令信号的接收，同时检测到数据模式的交替消失指示其他命令。由于数据传输系统中的故障导致固定数据模式或诸如“1”或“0”的电平的产生，数据模式的交替和消失可以区分出故障引起的状态的命令。故障安全功能可以实现。

7. 发明授权

US06604031B2 Train detection system and a train detection method 失效
公开(公告)号：US06604031B2
公开(公告)日：2003-08-05
申请号：US10219269
申请日：2002-08-16
申请人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
发明人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
IPC分类号： B61L118
CPC分类号： B61L1/188 , B61L23/168
摘要： A train detection system, having a transmitter which transmits a train detecting signal, a receiver, and a wayside controller connected to the transmitter and the receiver. The transmitter adds a first unique code assigned to the transmitter to the train detecting signal received from the wayside controller and transmits the thus processed train detecting signal and the receiver adds data of a second unique code to the train detecting signal and transmits the thus processed train detecting signal. The wayside controller includes a unique code checker for checking whether or not the first unique code and the second unique code agree with the contents of a predetermined code.

8. 发明授权

US06470244B2 Train detection system 有权
标题翻译：列车检测系统
公开(公告)号：US06470244B2
公开(公告)日：2002-10-22
申请号：US09986089
申请日：2001-11-07
申请人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
发明人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
IPC分类号： B61L118
CPC分类号： B61L1/188 , B61L23/168
摘要： A train detection system, having a transmitter which transmits a train detecting signal, a receiver and a wayside controller connected to the transmitter and the receiver through a data transmission path. The transmitter adds a first unique code assigned to the transmitter to the train detecting signal received from the wayside controller and transmits the thus processed train detecting signal and the receiver adds data of a second unique code to the train detecting signal and transmits the thus processed train detecting signal. The wayside controller includes a unique code checker for checking whether or not the first unique code data and the second unique code data agree with the contents of predetermined data.
摘要翻译：一种列车检测系统，具有通过数据传输路径发送火车检测信号的发射机，接收机和连接到发射机和接收机的路边控制器。发射机将分配给发射机的第一唯一码添加到从路边控制器接收到的列车检测信号，并发送这样处理的列车检测信号，并且接收机将第二唯一码的数据添加到列车检测信号，并将这样处理的列车检测信号。路边控制器包括唯一的代码检查器，用于检查第一唯一代码数据和第二唯一代码数据是否与预定数据的内容一致。

9. 发明授权

US06230086B1 Railway information transmission method and system 有权
标题翻译：铁路信息传输方式与制度
公开(公告)号：US06230086B1
公开(公告)日：2001-05-08
申请号：US09254181
申请日：1999-03-02
申请人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
发明人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
IPC分类号： G06F700
CPC分类号： H04L1/0061 , B61L3/24 , H04L1/1642 , H04L1/1664 , H04L1/242
摘要： In a railway information transmission method and system wherein information is transmitted by a consecutive transmission mode between on-vehicle control equipment and ground control equipment, a redundant code which is updated in accordance with a predetermined procedure every transmission processing is affixed to information to-be-communicated, the information being then transmitted, and on a reception side, the redundant code which is contained in the received information is correlated with a redundant code which is created on this side and which is updated in a predetermined procedure. Thus, the trouble of a transmission path can be simply found, and further, the safety of train service based on an automatic train control or the like can be enhanced.
摘要翻译：在车载控制设备和地面控制设备之间通过连续发送模式发送信息的铁路信息传输方法和系统中，每个发送处理按照预定的过程更新的冗余码被附加到要被通信，然后发送信息，并且在接收侧，包含在接收信息中的冗余码与在该侧创建并以预定过程更新的冗余码相关联。因此，可以简单地发现传输路径的麻烦，并且还可以提高基于自动列车控制等的列车服务的安全性。

10. 发明授权

US07027901B2 Transmitter and receiver device for train detection 失效
标题翻译：用于列车检测的发射机和接收机设备
公开(公告)号：US07027901B2
公开(公告)日：2006-04-11
申请号：US10998753
申请日：2004-11-30
申请人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
发明人： Kenji Oguma , Atsushi Kawabata , Korefumi Tashiro , Michio Fujiwara , Shinya Tanifuji
IPC分类号： B61L1/18
CPC分类号： B61L1/188 , B61L23/168
摘要： A transmitter and receiver device used together with a control device provided on ground, which performs detection of a train, performs transmission and reception of a train detecting signal, and collates data added to a received train detection signal with predetermined data. A transmitter, to be connected to a track circuit, transmits a train detecting signal, to the track circuit, and a receiver, to be connected to the track circuit, receives the train detecting signal from the track circuit. The transmitter adds a first unique code to the train detecting signal transmitted from the control device provided on the ground and transmits the same to the track circuit. The receiver adds a second unique code to the train detecting signal which was the first unique code added thereto and received from the track circuit and transmits the same to the control device provided on the ground.
摘要翻译：与地面上设置的执行列车检测的控制装置一起使用的发射机和接收机装置执行列车检测信号的发送和接收，并将与接收到的列车检测信号相加的数据与预定数据进行比较。要连接到轨道电路的发射机将要连接到轨道电路的列车检测信号发送到轨道电路和接收机，从轨道电路接收列车检测信号。发射机将第一唯一码添加到从设在地面上的控制装置发送的列车检测信号，并将其发送到轨道电路。接收机为列车检测信号添加第二唯一码，该信号是从轨道电路接收的第一唯一码，并将其发送到设在地面上的控制装置。

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