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1. 发明授权

US08253398B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08253398B2
公开(公告)日：2012-08-28
申请号：US12500015
申请日：2009-07-09
申请人： Kazutoshi Nakamura , Norio Yasuhara
发明人： Kazutoshi Nakamura , Norio Yasuhara
IPC分类号： G05F1/40 , G05F1/613
CPC分类号： H02M3/1588 , H02M1/32 , H02M3/158 , Y02B70/1466
摘要： A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.
摘要翻译：一种半导体器件包括：高侧开关元件，其具有连接在输入电压线和感性负载之间的第一开关元件; 以及具有第二开关元件和第三开关元件的低侧开关元件，其并联连接在感性负载和参考电压线之间。当浪涌被施加到连接到低侧开关元件中的感性负载的端子时，浪涌电流通过第三开关元件放电到参考电压线。

2. 发明授权

US07579669B2 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
标题翻译：包括功率MOS场效应晶体管和其驱动电路驱动的半导体器件
公开(公告)号：US07579669B2
公开(公告)日：2009-08-25
申请号：US11549297
申请日：2006-10-16
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L27/00
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.
摘要翻译：半导体器件包括高侧开关元件，驱动电路和低侧开关元件。高侧开关元件形成在第一半导体基板上，其一端具有输入电压的电流通路，电流路径的另一端与电感连接。驱动电路形成在形成有高侧开关元件的第一半导体基板上，驱动高侧开关元件。低侧开关元件形成在与第一半导体衬底分离的第二半导体衬底上，并且具有连接到电感的漏极和被提供参考电位的源极。

3. 发明授权

US07138698B2 Semiconductor device including power MOS field-effect transistor and driver circuit driving thereof 失效
公开(公告)号：US07138698B2
公开(公告)日：2006-11-21
申请号：US11007254
申请日：2004-12-09
申请人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
发明人： Kazutoshi Nakamura , Norio Yasuhara , Tomoko Matsudai , Kenichi Matsushita , Akio Nakagawa
IPC分类号： H01L23/58
CPC分类号： H02M3/158 , H01L27/0922 , H01L29/41758 , H01L29/41775 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/7813 , H01L29/7835 , H01L2924/0002 , H02M1/08 , H02M7/003 , H01L2924/00
摘要： A semiconductor device comprises a high side switching element, a driver circuit, and a low side switching element. The high side switching element is formed on a first semiconductor substrate, has a current path to one end of which an input voltage is supplied, and the other end of the current path is connected to an inductance. The driver circuit is formed on the first semiconductor substrate, on which the high side switching element is formed, and drives the high side switching element. The low side switching element is formed on a second semiconductor substrate separate from the first semiconductor substrate, and has a drain connected to the inductance and a source supplied with a reference potential.

4. 发明申请

US20110133818A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20110133818A1
公开(公告)日：2011-06-09
申请号：US13022611
申请日：2011-02-07
申请人： Tomoko MATSUDAI , Norio Yasuhara , Kazutoshi Nakamura
发明人： Tomoko MATSUDAI , Norio Yasuhara , Kazutoshi Nakamura
IPC分类号： H03K3/01 , H01L29/78
CPC分类号： H01L29/7835 , H01L21/266 , H01L29/0847 , H01L29/1045 , H01L29/1083 , H01L29/1087 , H01L29/66659
摘要： A semiconductor device includes a semiconductor layer of a first conductivity type; a deep well of a second conductivity type formed in a portion of an upper layer portion of the semiconductor layer; a well of the first conductivity type formed in a portion of an upper layer portion of the deep well; a source layer of the second conductivity type formed in the well; a drain layer of the second conductivity type formed in the well apart from the source layer; and a contact layer of the second conductivity type formed outside the well in an upper layer portion of the deep well and connected to the drain layer. The drain layer is electrically connected to the deep well via the well by applying a driving voltage between the source layer and the drain layer.
摘要翻译：半导体器件包括第一导电类型的半导体层; 形成在半导体层的上层部分的一部分中的第二导电类型的深阱; 形成在深井的上层部分的一部分中的第一导电类型的阱; 在井中形成的第二导电类型的源极层; 第二导电类型的漏极层形成在远离源极的阱中; 以及在阱的上层部分中形成在阱外部并连接到漏极层的第二导电类型的接触层。通过在源极层和漏极层之间施加驱动电压，漏极层通过阱与深阱电连接。

5. 发明申请

US20080251838A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20080251838A1
公开(公告)日：2008-10-16
申请号：US12118159
申请日：2008-05-09
申请人： Syotaro Ono , Yoshihiro Yamaguchi , Yusuke Kawaguchi , Kazutoshi Nakamura , Norio Yasuhara , Kenichi Matsushita , Shinichi Hodama , Akio Nakagawa
发明人： Syotaro Ono , Yoshihiro Yamaguchi , Yusuke Kawaguchi , Kazutoshi Nakamura , Norio Yasuhara , Kenichi Matsushita , Shinichi Hodama , Akio Nakagawa
IPC分类号： H01L29/78
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/66712 , H01L29/7809
摘要： A semiconductor device includes: a semiconductor substrate, at least a surface portion thereof serving as a low-resistance drain layer of a first conductivity type; a first main electrode connected to the low-resistance drain layer; a high-resistance epitaxial layer of a second-conductivity type formed on the low-resistance drain layer; a second-conductivity type base layer selectively formed on the high-resistance epitaxial layer; a first-conductivity type source layer selectively formed in a surface portion of the second-conductivity type base layer; a trench formed in a region sandwiched by the second-conductivity type base layers with a depth extending from the surface of the high-resistance epitaxial layer to the semiconductor substrate; a jfet layer of the first conductivity type formed on side walls of the trench; an insulating layer formed in the trench; an LDD layer of the first-conductivity type formed in a surface portion of the second-conductivity type base layer so as to be connected to the first-conductivity type jfet layer around a top face of the trench; a control electrode formed above the semiconductor substrate so as to be divided into a plurality of parts, and formed on a gate insulating film formed on a part of the surface of the LDD layer, on surfaces of end parts of the first-conductivity type source layer facing each other across the trench, and on a region of the surface of the second-conductivity type base layer sandwiched by the LDD layer and the first-conductivity type source layer; and a second main electrode in ohmic contact with the first-conductivity type source layer and the second-conductivity type base layer so as to sandwich the control electrode.
摘要翻译：半导体器件包括：半导体衬底，至少其表面部分用作第一导电类型的低电阻漏极层; 连接到所述低电阻漏极层的第一主电极; 形成在低电阻漏极层上的第二导电类型的高电阻外延层; 选择性地形成在高电阻外延层上的第二导电型基极层; 选择性地形成在所述第二导电型基底层的表面部分中的第一导电型源极层; 在由所述第二导电型基底层夹持的区域中形成的沟槽，其深度从所述高电阻外延层的表面延伸到所述半导体衬底; 形成在沟槽的侧壁上的第一导电类型的jfet层; 形成在沟槽中的绝缘层; 形成在第二导电型基底层的表面部分中的第一导电类型的LDD层，以便围绕沟槽的顶面连接到第一导电型jfet层; 控制电极，其形成在所述半导体衬底上，以被分成多个部分，并形成在形成在所述LDD层的一部分表面上的栅极绝缘膜上，所述第一导电型源的端部并且在由LDD层和第一导电型源极层夹在第二导电型基底层的表面的区域上，以及与所述第一导电型源极层和所述第二导电型基极欧姆接触以便夹持所述控制电极的第二主电极。

6. 发明授权

US07067876B2 Semiconductor device 失效
公开(公告)号：US07067876B2
公开(公告)日：2006-06-27
申请号：US10139324
申请日：2002-05-07
申请人： Norio Yasuhara , Kazutoshi Nakamura , Yusuke Kawaguchi
发明人： Norio Yasuhara , Kazutoshi Nakamura , Yusuke Kawaguchi
IPC分类号： H01L29/76
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/0696 , H01L29/1045 , H01L29/1087 , H01L29/4175 , H01L29/41766 , H01L29/4238
摘要： A semiconductor device comprises a semiconductor substrate; a semiconductor layer having a higher resistance than that of said semiconductor substrate and provided on a top surface of said semiconductor substrate; a gate electrode provided on a gate insulating film on the top surface of said semiconductor layer; a drain layer of a first conductivity type selectively provided in a location in said semiconductor layer in one side of said gate electrode; a drain electrode connected to said drain layer; a source layer of the first conductivity type selectively provided in a location in said semiconductor layer in the other side of said gate electrode; an element-side connecting portion selectively provided on said semiconductor layer, which does not reach a channel portion between said source layer and said drain layer of said semiconductor layer and also does not reach to said semiconductor substrate, and which is in contact with said source layer and has lower resistance than that of said semiconductor layer; a contact-side connecting portion selectively provided on said semiconductor layer, having lower resistance than said semiconductor layer and extending deeper toward said semiconductor substrate than said element-side connecting portion; a first source electrode connecting said source layer, said element-side connect portion and said contact-side connect portion; and a bottom electrode provided on the bottom surface of said semiconductor substrate in connection therewith.

7. 发明授权

US07026214B2 Offset-gate-type semiconductor device 失效
公开(公告)号：US07026214B2
公开(公告)日：2006-04-11
申请号：US10957692
申请日：2004-10-05
申请人： Norio Yasuhara , Syotaro Ono , Kazutoshi Nakamura , Yusuke Kawaguchi , Shinichi Hodama , Akio Nakagawa
发明人： Norio Yasuhara , Syotaro Ono , Kazutoshi Nakamura , Yusuke Kawaguchi , Shinichi Hodama , Akio Nakagawa
IPC分类号： H01L21/00
CPC分类号： H01L29/402 , H01L21/26586 , H01L29/1045 , H01L29/1079 , H01L29/1083 , H01L29/41725 , H01L29/4175 , H01L29/41758 , H01L29/41766 , H01L29/41775 , H01L29/456 , H01L29/66636 , H01L29/66659 , H01L29/78 , H01L29/7835
摘要： A semiconductor device includes a first semiconductor region having a first conductivity type, a second semiconductor region formed on the first semiconductor region and having the first conductivity type, a third semiconductor region formed in a surface of the second semiconductor region and having a second conductivity type, a fourth semiconductor region formed in the surface of the second semiconductor region and having the second conductivity type, and a gate structure formed on the second and fourth semiconductor region. The semiconductor device further includes a conductive member arranged in the trench extending from a surface of the fourth semiconductor region to the first semiconductor region, the trench having one sidewall surface flush with a sidewall surface of the gate structure.

8. 发明申请

US20120212198A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20120212198A1
公开(公告)日：2012-08-23
申请号：US13461918
申请日：2012-05-02
申请人： Kazutoshi Nakamura , Norio Yasuhara
发明人： Kazutoshi Nakamura , Norio Yasuhara
IPC分类号： G05F1/10
CPC分类号： H02M3/1588 , H02M1/32 , H02M3/158 , Y02B70/1466
摘要： A semiconductor device includes: a high-side switching element having a first switching element connected between an input voltage line and an inductive load; and a low-side switching element having a second switching element and a third switching element that are connected in parallel between the inductive load and a reference voltage line. A surge current is discharged through the third switching element to the reference voltage line when a surge is applied to a terminal connected to the inductive load in the low-side switching element.
摘要翻译：一种半导体器件包括：高侧开关元件，其具有连接在输入电压线和感性负载之间的第一开关元件; 以及具有第二开关元件和第三开关元件的低侧开关元件，其并联连接在感性负载和参考电压线之间。当浪涌被施加到连接到低侧开关元件中的感性负载的端子时，浪涌电流通过第三开关元件放电到参考电压线。

9. 发明申请

US20110108915A1 SEMICONDUCTOR DEVICE 失效
标题翻译：半导体器件
公开(公告)号：US20110108915A1
公开(公告)日：2011-05-12
申请号：US12886461
申请日：2010-09-20
申请人： Kazutoshi NAKAMURA , Norio Yasuhara
发明人： Kazutoshi NAKAMURA , Norio Yasuhara
IPC分类号： H01L27/088
CPC分类号： H01L21/823857 , H01L21/823878 , H01L29/0619 , H01L29/1087 , H01L29/66659 , H01L29/7835
摘要： According to one embodiment, a semiconductor device includes a semiconductor substrate of a first conductivity type, an element isolation insulator, a source layer of a second conductivity type, a drain layer of the second conductivity type, a contact layer of the first conductivity type and a gate electrode. The element isolation insulator is formed on the semiconductor substrate. The source layer is formed on the semiconductor substrate and is in contact with a side surface of the element isolation insulator. The drain layer is formed on the semiconductor substrate, is in contact with the side surface, and is spaced from the source layer. The contact layer is formed between the source layer and the drain layer. The gate electrode is provided on the element isolation insulator along the side surface.
摘要翻译：根据一个实施例，半导体器件包括第一导电类型的半导体衬底，元件隔离绝缘体，第二导电类型的源极层，第二导电类型的漏极层，第一导电类型的接触层和栅电极。元件隔离绝缘体形成在半导体衬底上。源极层形成在半导体衬底上并与元件隔离绝缘体的侧表面接触。漏极层形成在半导体基板上，与侧面接触，与源极层隔开。接触层形成在源极层和漏极层之间。栅电极沿着侧面设置在元件隔离绝缘体上。

10. 发明授权

US07663186B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07663186B2
公开(公告)日：2010-02-16
申请号：US12118159
申请日：2008-05-09
申请人： Syotaro Ono , Yoshihiro Yamaguchi , Yusuke Kawaguchi , Kazutoshi Nakamura , Norio Yasuhara , Kenichi Matsushita , Shinichi Hodama , Akio Nakagawa
发明人： Syotaro Ono , Yoshihiro Yamaguchi , Yusuke Kawaguchi , Kazutoshi Nakamura , Norio Yasuhara , Kenichi Matsushita , Shinichi Hodama , Akio Nakagawa
IPC分类号： H01L29/76 , H01L29/94
CPC分类号： H01L29/7802 , H01L21/26586 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/0878 , H01L29/1095 , H01L29/402 , H01L29/407 , H01L29/42368 , H01L29/42376 , H01L29/4238 , H01L29/66712 , H01L29/7809
摘要： A semiconductor device includes: a substrate, a surface portion thereof serving as a drain layer; a first main electrode connected to the drain layer; an epitaxial layer formed on the drain layer; a base layer formed on the epitaxial layer; a source layer formed in a base layer surface portion; an insulated trench sandwiched by base layers; a JFET layer formed on trench side walls; an LDD layer formed in a base layer surface portion and connected to the JFET layer around a top face of the trench; a control electrode formed on a gate insulating film formed on an LDD layer surface part, on surfaces of source layer end parts facing each other across the trench, and on a base layer region sandwiched by the LDD and source layers; and a second main electrode connected to the source and base layers sandwiching the control electrode.
摘要翻译：半导体器件包括：衬底，用作漏极层的表面部分; 连接到漏极层的第一主电极; 形成在漏极层上的外延层; 形成在外延层上的基底层; 形成在基层表面部分中的源极层; 由基层夹住的绝缘沟槽; 形成在沟槽侧壁上的JFET层; LDD层，其形成在基底表面部分中并且围绕所述沟槽的顶面连接到所述JFET层; 形成在形成在LDD层表面部分上的栅极绝缘膜上的控制电极，在沟槽之间彼此面对的源极层部分的表面上以及由LDD和源极层夹持的基极层区域; 以及连接到夹持控制电极的源极和基极层的第二主电极。

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