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1. 发明授权

US5754355A Disk drive apparatus and read error recovery method in a disk drive apparatus 失效
标题翻译：磁盘驱动装置中的磁盘驱动装置和读取错误恢复方法
公开(公告)号：US5754355A
公开(公告)日：1998-05-19
申请号：US633596
申请日：1996-04-17
申请人： Takashi Nakamura , Isao Yoneda , Yuji Yokoe , Kazushi Tsuwako , Fujio Harako , Katsumi Suda , Michio Nakajima , Kenji Ogasawara
发明人： Takashi Nakamura , Isao Yoneda , Yuji Yokoe , Kazushi Tsuwako , Fujio Harako , Katsumi Suda , Michio Nakajima , Kenji Ogasawara
IPC分类号： G11B5/00 , G11B5/60 , G11B19/04 , G11B19/20 , G11B23/50 , G11B15/46
CPC分类号： G11B5/6005 , G11B19/04 , G11B19/20 , G11B23/505 , G11B2005/0016
摘要： A disk drive apparatus and read error recovery method in a disk drive apparatus removes thermal asperities on disk surfaces. A projection, such as a thermal asperity, on the recording surfaces of disks is detected when a signal transducer head contacts the projection. The flying height of the signal transducer head is lowered, e.g., by changing the disk rotation speed from the normal rotation speed in read/write operations or by heating a suspension having a bimetal element, while the signal transducer head is positioned over the detected projection on the track. The signal transducer head strikes the projection to break the projection. This avoids a subsequent error from being caused by the thermal asperity.
摘要翻译：磁盘驱动装置中的磁盘驱动装置和读取错误恢复方法去除磁盘表面上的热凹凸。当信号传感器头接触投影时，检测到盘的记录表面上的诸如热不均匀性的投影。信号传感器头的飞行高度例如通过在读/写操作中通过将盘旋转速度从正常旋转速度改变或通过加热具有双金属元件的悬架而降低，同时信号传感器头位于检测到的投影上方在轨道上。信号传感器头撞击突起以断开突起。这避免了由于热不平坦造成的后续错误。

2. 发明授权

US5696643A Disk drive apparatus and read error recovery method in a disk drive apparatus 失效
标题翻译：磁盘驱动装置中的磁盘驱动装置和读取错误恢复方法
公开(公告)号：US5696643A
公开(公告)日：1997-12-09
申请号：US632787
申请日：1996-04-17
申请人： Kazushi Tsuwako , Fujio Harako , Katsumi Suda , Michio Nakajima , Isao Yoneda , Kenji Ogasawara
发明人： Kazushi Tsuwako , Fujio Harako , Katsumi Suda , Michio Nakajima , Isao Yoneda , Kenji Ogasawara
IPC分类号： G11B5/60 , G11B19/04 , G11B19/20 , G11B23/50 , G11B15/46
CPC分类号： G11B5/6005 , G11B19/04 , G11B19/20 , G11B23/505
摘要： A disk drive apparatus and read error recovery method in a disk drive apparatus removes thermal asperities on disk surfaces. A projection, such as a thermal asperity, on the recording surfaces of disks is detected when a signal transducer contacts the projection. The flying height of the signal transducer is lowered, e.g., by reducing the disk rotation speed from the normal rotation speed in read/write operations, while the signal transducer is positioned over the detected projection on the track. The signal transducer strikes the projection to break the projection. This avoids a subsequent error from being caused by the thermal asperity.
摘要翻译：磁盘驱动装置中的磁盘驱动装置和读取错误恢复方法去除磁盘表面上的热凹凸。当信号传感器接触投影时，检测在盘的记录表面上的诸如热不均匀性的投影。信号传感器的飞行高度例如通过在读/写操作中将盘旋转速度从正常旋转速度减小而信号换能器位于轨道上检测到的投影上方。信号传感器撞击投影以断开投影。这避免了由热不均匀引起的后续错误。

3. 发明授权

US6127694A Semiconductor wafer and method of manufacturing the same, and semiconductor device and test board of the same 失效
标题翻译：半导体晶片及其制造方法，以及半导体器件及其测试板
公开(公告)号：US6127694A
公开(公告)日：2000-10-03
申请号：US77926
申请日：1993-06-18
申请人： Michio Nakajima
发明人： Michio Nakajima
IPC分类号： G01R31/26 , G01R31/28 , H01L21/326 , H01L21/66 , H01L21/822 , H01L27/04 , H01L23/58 , H01L29/00
CPC分类号： G01R31/2856 , G01R31/2884
摘要： Regarding a semiconductor device, a burn-in board can be standardized in each package. An IC (100) includes a VCC terminal (2), a GND terminal (3), input terminals (4a, 4b), and output terminals (5), and it also includes a burn-in board setting terminal (14). Input signals applied to the input terminals (4a, 4b) are transmitted to gates 16a and 16b of switching circuit (15) and processed in a function block (7). Regardless of the signals applied to the input terminals (4a, 4b), simply applying a test signal to the burn-in board setting terminal (14), a specified logic is applied to the function block (7). Only if a pin arrangement of the VCC terminal (2), the GND terminal (3), and the burn-in board setting terminal (14) is standardized and determined, burn-in can be performed indifferent of another pin arrangement of the input terminals (4a, 4b).
摘要翻译：关于半导体器件，可以在每个封装中标准化老化板。 IC（100）包括VCC端子（2），GND端子（3），输入端子（4a，4b）和输出端子（5），并且还包括老化板设置端子（14）。施加到输入端子（4a，4b）的输入信号被传送到开关电路（15）的门16a和16b，并在功能块（7）中进行处理。无论施加到输入端子（4a，4b）的信号如何，只需将测试信号施加到老化板设置端子（14），就将功能块（7）施加指定的逻辑。只有当VCC端子（2），GND端子（3）和老化板设置端子（14）的引脚布置被标准化和确定时，可以对输入的另一引脚布置无任何老化端子（4a，4b）。

4. 发明授权

US5973953A Semiconductor memory device having improved bit line structure 失效
标题翻译：具有改进的位线结构的半导体存储器件
公开(公告)号：US5973953A
公开(公告)日：1999-10-26
申请号：US38278
申请日：1998-03-11
申请人： Takekazu Yamashita , Kiyoyuki Shiroshima , Michio Nakajima , Makoto Hatakenaka , Hideki Toki , Tuyoshi Saitoh
发明人： Takekazu Yamashita , Kiyoyuki Shiroshima , Michio Nakajima , Makoto Hatakenaka , Hideki Toki , Tuyoshi Saitoh
IPC分类号： H01L21/3205 , G11C5/06 , H01L21/8242 , H01L23/52 , H01L27/108
CPC分类号： G11C5/063
摘要： A semiconductor memory device is constituted such that, when a first wiring layer provides a bit line of a first common complementary data line pair and a third wiring layer provides a bit line of a second common complementary data line pair, a second wiring layer makes an overlapped area between the bit line and the bit bar line of the second common complementary dada line pair equal to the bit line of the first common complementary data line pair and also an overlapped area between the bit line and the bit bar line of the first common complementary data line pair equal to the bit line of the second common complementary data line pair.
摘要翻译：半导体存储器件被构造成使得当第一布线层提供第一公共互补数据线对的位线并且第三布线层提供第二公共互补数据线对的位线时，第二布线层使得第二公共互补数据线对的位线和位线之间的重叠区域等于第一公共互补数据线对的位线，以及第一公共补充数据线对的位线和位线之间的重叠区域互补数据线对等于第二公共互补数据线对的位线。

5. 发明授权

US5926429A Semiconductor memory device and method of refreshing semiconductor memory device 失效
标题翻译：半导体存储器件和刷新半导体存储器件的方法
公开(公告)号：US5926429A
公开(公告)日：1999-07-20
申请号：US199050
申请日：1998-11-24
申请人： Tsuyoshi Saitoh , Kiyoyuki Shiroshima , Michio Nakajima , Masaaki Matsuo , Nobuyuki Fujii , Akira Kitaguchi
发明人： Tsuyoshi Saitoh , Kiyoyuki Shiroshima , Michio Nakajima , Masaaki Matsuo , Nobuyuki Fujii , Akira Kitaguchi
IPC分类号： G11C11/406 , G11C7/00
CPC分类号： G11C11/406
摘要： A semiconductor memory device includes memory elements, each maintaining memory contents within a period of time during which a refresh operation is repeated, and a refresh request circuit for making a refresh request. The semiconductor memory device includes refreshing circuits each of which, in response to a refresh request from the refresh request circuit, performs a refresh operation on a different number of memory elements at the same time, and a selecting circuit for selecting one refreshing circuit from among the refreshing circuits according to the number of memory elements included in the semiconductor memory device. The refresh request circuit can change the interval at which it makes a refresh request.
摘要翻译：半导体存储器件包括存储器元件，每个存储器元件在重复刷新操作的时间段内保持存储器内容，以及刷新请求电路。半导体存储器件包括刷新电路，每个刷新电路响应于来自刷新请求电路的刷新请求同时对不同数量的存储器元件执行刷新操作，以及选择电路，用于从其中选择一个刷新电路根据包括在半导体存储器件中的存储元件的数量的刷新电路。刷新请求电路可以改变刷新请求的间隔。

6. 发明授权

US5353253A Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US5353253A
公开(公告)日：1994-10-04
申请号：US126636
申请日：1993-09-27
申请人： Michio Nakajima
发明人： Michio Nakajima
IPC分类号： G11C29/00 , G11C29/04 , G11C7/00 , G11C11/40
CPC分类号： G11C29/76
摘要： A smaller, high-speed, semiconductor memory device having redundancy is disclosed which attains an improved mass productivity. Where a main memory (20) includes a defective memory cell, a defective address designating circuit (21) stores the address of the defective memory cell. Defective address detecting circuits (22a to 22r) detect whether an address signal received at an address signal input terminal (4) coincides with an address signal from the defective address designating circuit (21). If a signal indicative of the coincidence is given to a redundancy memory circuit (23) from the defective address detecting circuits (22a to 22r), data is written in or read from defective address remedy latch circuit groups (23a to 23r) of the redundancy memory circuit (23) which correspond to the defective address detecting circuits (22a to 22r). A data selector (24) selectively outputs data received from the defective address remedy latch circuit groups (23a to 23r) or data received from the main memory (20). Thus, the redundancy memory circuit (23), which requires less space, quickly replaces the defective memory cell of the main memory (20).
摘要翻译：公开了具有冗余的较小的高速半导体存储器件，其具有提高的批量生产率。在主存储器（20）包括缺陷存储单元的情况下，缺陷地址指定电路（21）存储有缺陷存储单元的地址。检测地址检测电路（22a〜22r）是否检测到在地址信号输入端子（4）接收到的地址信号是否与来自缺陷地址指定电路（21）的地址信号一致。如果从缺陷地址检测电路（22a〜22r）向冗余存储电路（23）发出了表示一致的信号，则将数据写入冗余存储电路（23）至缺陷地址补救锁存电路组（23a〜23r）存储电路（23），其对应于缺陷地址检测电路（22a〜22r）。数据选择器（24）选择性地输出从缺陷地址补救锁存电路组（23a至23r）接收的数据或从主存储器（20）接收的数据。因此，需要较少空间的冗余存储器电路（23）快速地替换主存储器（20）的有缺陷的存储单元。

7. 发明授权

US07661187B2 Manufacturing method for magnetic disk drive 失效
标题翻译：磁盘驱动器的制造方法
公开(公告)号：US07661187B2
公开(公告)日：2010-02-16
申请号：US11295206
申请日：2005-12-05
申请人： Masato Taniguchi , Michio Nakajima , Kaoru Umemura
发明人： Masato Taniguchi , Michio Nakajima , Kaoru Umemura
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： G11B27/36 , G11B20/10009 , G11B20/182 , G11B2005/001 , G11B2220/2516 , Y10T29/49025 , Y10T29/49027 , Y10T29/4903 , Y10T29/49032
摘要： The present invention relates to providing the manufacturing method for a magnetic disk drive that includes the process steps of detecting and processing in a simplified way the defective sectors causing a reading error at low operating environmental temperatures. In one example, defective sectors are detected by read/write testing at high operating environmental temperatures from, for example, 40° C. to 65° C. Reading the data written on the defective sectors makes it obvious that the gain in a high-frequency band is reduced. After test data has been written onto each sector, the filtering coefficient of an FIR element that is set for a data-reading system is changed from the optimum value. The frequency gain is thus reduced. Next, the test data is read and the sectors that have caused a reading error are registered as defectives.
摘要翻译：本发明涉及提供一种用于磁盘驱动器的制造方法，其包括以简单的方式检测和处理在低操作环境温度下引起读取误差的缺陷扇区的处理步骤。在一个示例中，通过在例如40℃至65℃的高工作环境温度下的读/写测试来检测缺陷扇区。读取在缺陷扇区上写入的数据使得显而易见的是，频带减少。在将测试数据写入每个扇区之后，将为数据读取系统设置的FIR元件的滤波系数从最佳值改变。频率增益因此降低。接下来，读取测试数据，并将引起读取错误的扇区注册为缺陷。

8. 发明授权

US06345005B2 Integrated circuit with efficient testing arrangement 失效
标题翻译：具有高效测试布置的集成电路
公开(公告)号：US06345005B2
公开(公告)日：2002-02-05
申请号：US09734925
申请日：2000-12-13
申请人： Aki Urakami , Michio Nakajima
发明人： Aki Urakami , Michio Nakajima
IPC分类号： G11C700
CPC分类号： G11C29/38
摘要： A read and write control circuit receives (m×n))-bit data output m-bit parallel from a D flip flop, and a q-bit data selection signal such that the output data from the D flip flop is written to memory circuits in units of integral multiples of (x+1) bits in a total of 2q operations, in accordance with a binary value indicated by the data selection signal, where m, n, x and q indicates positive integers (x+1)>m and n>2q, where m, n, x and 1 indicate positive integers and (x+1)>m and n>2q. The data written to the memory circuits is read out in units of integral multiples of (x+1) bits in a total of 2q operations.
摘要翻译：读/写控制电路接收（mxn）） - 从D触发器并行输出m位的位数据和q位数据选择信号，使得来自D触发器的输出数据以单位写入存储器电路根据由数据选择信号表示的二进制值，在总共2q个运算中的（x + 1）位的整数倍的整数倍，其中m，n，x和q表示正整数（x + 1）> m和n > 2q，其中m，n，x和1表示正整数，（x + 1）> m且n> 2q。写入存储器电路的数据以总共2q个操作的（x + 1）位的整数倍为单位读出。

9. 发明授权

US6114866A Semiconductor device test board and method for evaluating semiconductor devices 失效
标题翻译：半导体器件测试板和半导体器件评估方法
公开(公告)号：US6114866A
公开(公告)日：2000-09-05
申请号：US18445
申请日：1998-02-04
申请人： Masaaki Matsuo , Tsuyoshi Saitoh , Takekazu Yamashita , Michio Nakajima , Akira Kitaguchi , Hideki Toki
发明人： Masaaki Matsuo , Tsuyoshi Saitoh , Takekazu Yamashita , Michio Nakajima , Akira Kitaguchi , Hideki Toki
IPC分类号： G01R31/26 , G01R31/28 , H01L21/66 , G01R35/00 , G01R31/02
CPC分类号： G01R31/2863 , H01L2924/0002
摘要： A semiconductor device test board solves a problem with conventional test boards in that test results obtained through a burn-in procedure could be identified only before the test board is taken out of a burn-in oven. Hence, conventional test boards required additional steps for checking the test results after removing the test boards from the burn-in oven. This extra step prevents the efficiency of the test from being improved. One embodiment of the present test board has indicator arms, each rotatably mounted on a pivot on the test board, for indicating, in response to a signal on a signal line, the test result of the semiconductor device associated with it. Each of the indicator arms maintains its rest position when no failure has occurred in the semiconductor device associated with it during the test. Each indicator arm changes its position if a failure has occurred in the semiconductor device during the test, and retains one of the two positions until after the test board is taken out of the burn-in oven. Thus, the test result can be determined after taking out the test board from the burn-in oven.
摘要翻译：半导体器件测试板解决了常规测试板的问题，因为只有在将测试板从老化炉中取出之前，才能识别通过烧录程序获得的测试结果。因此，常规测试板需要额外的步骤，以便在从老化炉中取出测试板后检查测试结果。这个额外的步骤可以防止测试的效率得到改善。本测试板的一个实施例具有指示臂，每个指示臂可旋转地安装在测试板上的枢轴上，用于响应于信号线上的信号，指示与其相关联的半导体器件的测试结果。当在测试期间与其相关联的半导体器件中没有发生故障时，每个指示器臂保持其静止位置。如果在测试期间在半导体器件中发生故障，则每个指示臂改变其位置，并且保持两个位置中的一个，直到将测试板从老化炉中取出。因此，可以在从老化炉中取出测试板之后确定测试结果。

10. 发明授权

US5856934A Digital filter system 失效
标题翻译：数字滤波系统
公开(公告)号：US5856934A
公开(公告)日：1999-01-05
申请号：US827407
申请日：1997-03-27
申请人： Michio Nakajima , Weimin Sun
发明人： Michio Nakajima , Weimin Sun
IPC分类号： H03H17/02 , G06F17/10
CPC分类号： H03H17/0294
摘要： Constants {P.sub.b00i, Q.sub.b00j, . . . , P.sub.ak2i, Q.sub.ak2j, P.sub.ci, Q.sub.cj, P.sub.di, and Q.sub.dj } for calculating each of filter coefficients {a.sub.k1, a.sub.k2, b.sub.00, b.sub.k1, b.sub.k2, c and d} for a digital filter 15 by using non-linear polynomials for pass band position data x and pass band width data y are stored in a memory 13. The constants {P.sub.b00i, Q.sub.b00j, . . . , P.sub.ak2i, Q.sub.ak2j, P.sub.ci, Q.sub.cj, P.sub.di, and Q.sub.dj } are determined by using the least square method so that the sum of the square of the errors between the filter coefficients calculated by using non-liner polynomials and the filter coefficients of digital filter having known characteristics becomes the least or the minimum. A CPU 11 calculates the filter coefficients non-linearly by using the constants stored in the memory 13, and sets the results to the digital filter 15 when new pass band position data x or pass band width data y is input at knobs SC and SW.
摘要翻译：常数{Pb00i，Qb00j，。。。，Pak2i，Qak2j，Pci，Qcj，Pdi和Qdj}，用于通过使用用于通带位置的非线性多项式来计算数字滤波器15的滤波器系数{ak1，ak2，b00，bk1，bk2，c和d} 数据x和通带宽度数据y存储在存储器13中。常数{Pb00i，Qb00j，...，。。，Pak2i，Qak2j，Pci，Qcj，Pdi和Qdj}通过使用最小二乘法确定，使得通过使用非线性多项式计算的滤波器系数与数字滤波器的滤波器系数之间的误差的平方和之和已知特征变得最小或最小。 CPU 11通过使用存储在存储器13中的常数非线性地计算滤波器系数，并且当在通过旋钮SC和SW处输入新的通带位置数据x或通带宽度数据y时，将结果设置为数字滤波器15。

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