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1. 发明授权

US5357310A Correlation phase difference type focus detecting interpolation 失效
标题翻译：相关相差型焦点检测插值
公开(公告)号：US5357310A
公开(公告)日：1994-10-18
申请号：US187136
申请日：1994-01-27
申请人： Kazuo Kawamura , Takashi Miida , Hiroshi Iwabuchi , Jun Hasegawa
发明人： Kazuo Kawamura , Takashi Miida , Hiroshi Iwabuchi , Jun Hasegawa
IPC分类号： G02B7/34 , G02B7/28 , G03B13/18 , G03B3/00 , G01C3/08 , G01J1/20
CPC分类号： G02B7/28
摘要： A pair of optical systems of the same characteristics are disposed spaced apart by a base line length in the direction perpendicular to an optical axis, to form a focal plane, on which a standard photosensor and a reference photosensor, each having a plurality of photosensor elements, are disposed. An image of an object is focused onto the standard and reference photosensors, to generate a standard optical signal and a reference optical signal which are compared with each other, while changing the phase of the reference optical signal relative to the phase of the standard optical signal to calculate correlation factors. A distance to the object is detected from a phase having an extreme value of the calculated correlation factors. If the calculated correlation factors are asymmetrical relative to the extreme value, one correlation factor change by a unit phase shift before the extreme value is subtracted from the other correlation factor change by the unit phase shift after the extreme value. The subtraction result is divided by a constant. The division result is added to the correlation factors at sampling points adjacent the extreme value on the side of the other correlation factor change. The addition results are used as the corrected correlation factors, to perform an interpolation calculation to obtain a phase having an extreme value of the corrected correlation factors.
摘要翻译：具有相同特性的一对光学系统在垂直于光轴的方向上以基线长度隔开设置，以形成焦平面，标准光电传感器和参考光电传感器各自具有多个光传感元件，被处置。将对象的图像聚焦到标准和参考光电传感器上，以便在相对于标准光信号的相位改变参考光信号的相位的同时产生相互比较的标准光信号和参考光信号计算相关因子。从具有所计算的相关因子的极值的相位检测距物体的距离。如果所计算的相关因子相对于极值相对不对称，则在从极值之后的单位相移中，从另一个相关因子变化减去极值之前，通过单位相移的一个相关因子改变。减法结果除以常数。将除法结果加到邻近另一相关因子变化一侧的极值的采样点处的相关因子。使用相加结果作为校正后的相关因子，进行插值运算，得到具有校正后的相关因子的极值的相位。

2. 发明授权

US5568249A Phase difference detection type rangefinder and method of measuring subject distance 失效
标题翻译：相位差检测型测距仪及测距距离测量方法
公开(公告)号：US5568249A
公开(公告)日：1996-10-22
申请号：US229818
申请日：1994-04-19
申请人： Kazuo Kawamura , Jun Hasegawa , Takashi Miida
发明人： Kazuo Kawamura , Jun Hasegawa , Takashi Miida
IPC分类号： G01C3/06 , G01S11/12 , G02B7/32 , G02B7/34 , G06T7/60 , G01C3/08
CPC分类号： G01S11/12 , G02B7/32
摘要： A phase difference detection type rangefinder is provided which calculates a distance value of each subject of two or more subjects at different distances. The rangefinder has a correlation calculation unit for calculating a correlation factor between images of a same subject focussed on a base photosensor and a reference photosensor, a second order differentiation unit for calculating second order differential values of correlation factors calculated by the correlation calculation unit, a second order differential value comparison unit for selecting a maximum second order differential value from the second order differential values calculated by the second order differentiation unit, a three-point interpolation unit for calculating an interpolation value through three-point interpolation using the maximum second order differential value and two second order differential values having the phases before and after the phase of the maximum second order differential value, and a distance value calculation unit for calculating a distance value from the phase of the maximum second order differential value and the interpolation value.
摘要翻译：提供一种相位差检测型测距仪，其计算不同距离的两个或更多个被摄体的每个被摄体的距离值。测距仪具有相关计算单元，用于计算聚焦在基础光电传感器上的相同对象的图像与参考光电传感器之间的相关因子;二阶微分单元，用于计算由相关计算单元计算的相关因子的二阶微分值，二阶微分值比较单元，用于从由二阶微分单元计算的二阶微分值中选择最大二阶微分值;三点插值单元，用于通过使用最大二阶微分的三点插值来计算插补值以及具有在最大二阶微分值的相位之前和之后的相位的两个二阶微分值，以及距离值计算单元，用于根据最大二阶微分值和内插值的相位来计算距离值。

3. 发明申请

US20080303171A1 Semiconductor device and a fabrication process thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20080303171A1
公开(公告)日：2008-12-11
申请号：US12216134
申请日：2008-06-30
申请人： Takeshi Ito , Satoshi Inagaki , Yasunori Uchino , Kazuo Kawamura
发明人： Takeshi Ito , Satoshi Inagaki , Yasunori Uchino , Kazuo Kawamura
IPC分类号： H01L23/48
CPC分类号： H01L21/76814 , H01L21/76846 , H01L21/76877
摘要： A semiconductor device formed by the steps of forming a contact hole in an insulation film so as to extend therethrough and so as to expose a conductor body at a bottom part of the contact hole, forming a barrier metal film of tungsten nitride on the bottom part and a sidewall surface of the contact hole with a conformal shape to the bottom part and the sidewall surface of the contact hole, forming a tungsten layer so as to fill the contact hole via the barrier metal film, and forming a tungsten plug in the contact hole by the tungsten layer by polishing away a part of the tungsten film on the insulation film until a surface of the insulation film is exposed, wherein there is conducted a step of cleaning a surface of the conductor body prior to the forming step of the barrier metal film.
摘要翻译：一种半导体器件，通过以下步骤形成：在绝缘膜上形成接触孔以便延伸穿过其中，以便在接触孔的底部露出导体，在底部形成氮化钨的阻挡金属膜以及与接触孔的底部和侧壁表面具有共形形状的接触孔的侧壁表面，形成钨层，以便通过阻挡金属膜填充接触孔，并在触头中形成钨塞通过抛光绝缘膜上的一部分钨膜直到透明绝缘膜的表面，由钨层形成孔，其中在屏障的形成步骤之前进行清洁导体主体的表面的步骤金属膜。

4. 发明申请

US20070202695A1 Method for fabricating a semiconductor device 审中-公开
标题翻译：半导体器件的制造方法
公开(公告)号：US20070202695A1
公开(公告)日：2007-08-30
申请号：US11504585
申请日：2006-08-16
申请人： Kazuo Kawamura , Hiroyuki Ohta
发明人： Kazuo Kawamura , Hiroyuki Ohta
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/0206 , H01L21/2633 , H01L21/28052 , H01L21/823412 , H01L21/823425 , H01L21/823807 , H01L21/823814 , H01L29/665 , H01L29/6653
摘要： A semiconductor device fabrication method that prevents an increase in junction leakage current in a semiconductor device in which nickel silicide is used as a gate electrode, a source electrode, and a drain electrode. A native oxide film formed on the surface of a semiconductor substrate where a gate region, a source region, and a drain region are formed is removed by sputter etching in which control is exercised in order to suppress the penetration of the semiconductor substrate by ions to 2 nm or less from the surface. A film of nickel or a nickel compound is formed on the surface of the semiconductor substrate where the native oxide film is removed, and nickel silicide is formed in the gate region, the source region, and the drain region by anneal. As a result, the formation of a spike is prevented in the gate region, the source region, and the drain region and a leakage current is decreased.
摘要翻译：一种半导体器件制造方法，其防止了使用硅化镍作为栅电极，源电极和漏电极的半导体器件中的结漏电流的增加。通过溅射蚀刻去除形成在其上形成栅极区域，源极区域和漏极区域的半导体衬底的表面上的自然氧化膜，其中通过溅射蚀刻来进行控制，以便抑制半导体衬底由离子穿透到距表面2nm以下。在去除了自然氧化膜的半导体衬底的表面上形成镍或镍化合物的膜，并且通过退火在栅极区，源极区和漏极区中形成硅化镍。结果，在栅极区域，源极区域和漏极区域中防止形成尖峰，并且漏电流减小。

5. 发明授权

US4318131A TV Camera system having synchronized oscillators in camera head and CCU 失效
标题翻译：电视摄像机系统具有相机头和CCU中的同步振荡器
公开(公告)号：US4318131A
公开(公告)日：1982-03-02
申请号：US135129
申请日：1980-03-28
申请人： Mitsuhiko Okuhara , Taizou Nishino , Kazuo Kawamura , Toshiaki Aoki
发明人： Mitsuhiko Okuhara , Taizou Nishino , Kazuo Kawamura , Toshiaki Aoki
IPC分类号： H04N5/225 , H04N7/06 , H04N7/10 , H04N5/30
CPC分类号： H04N7/06 , H04N7/10
摘要： In a television camera apparatus comprising a camera head, a camera control unit, and a camera cable for transmission of signals between the camera head and the camera control unit, the signals to be transmitted modulate frequency signals corresponding to integral multiples of a reference frequency, and the modulated signals are mixed and transmitted by means of the single-core camera cable. Oscillators to produce reference frequency signals are provided respectively for the camera head and the camera control unit, the oscillator of the camera head being controlled for synchronism by the reference frequency signal of the oscillator of the camera control unit or vice versa.
摘要翻译：在包括相机头，照相机控制单元和照相机电缆的电视摄像机装置中，用于在照相机头和照相机控制单元之间传输信号，要发射的信号调制对应于参考频率的整数倍的频率信号，调制信号通过单芯相机电缆进行混合和传输。分别为摄像机头和摄像机控制单元提供产生参考频率信号的振荡器，照相机头的振荡器由相机控制单元的振荡器的参考频率信号进行同步控制，反之亦然。

6. 发明授权

US08030207B2 Method of manufacturing a semiconductor device and semiconductor device 有权
标题翻译：制造半导体器件和半导体器件的方法
公开(公告)号：US08030207B2
公开(公告)日：2011-10-04
申请号：US12110662
申请日：2008-04-28
申请人： Shinichi Akiyama , Kazuo Kawamura , Hisaya Sakai , Hirofumi Watatani , Kazuya Okubo
发明人： Shinichi Akiyama , Kazuo Kawamura , Hisaya Sakai , Hirofumi Watatani , Kazuya Okubo
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L23/53238 , H01L21/2855 , H01L21/76805 , H01L21/76844 , H01L21/76846 , H01L21/76865 , H01L21/76873 , H01L23/5226 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A method of manufacturing a semiconductor device has forming, in a dielectric film, a first opening and a second opening located in the first opening, forming a first metal film containing a first metal over a whole surface, etching the first metal film at a bottom of the second opening using a sputtering process and forming a second metal film containing a second metal over the whole surface, and burying a conductive material in the second opening and the first opening.
摘要翻译：制造半导体器件的方法在电介质膜中形成位于第一开口中的第一开口和第二开口，在整个表面上形成含有第一金属的第一金属膜，在底部蚀刻第一金属膜的第二开口，并且在整个表面上形成含有第二金属的第二金属膜，并且在第二开口和第一开口中埋入导电材料。

7. 发明授权

US07977194B2 Method for fabricating semiconductor device with fully silicided gate electrode 有权
标题翻译：制造具有全硅化物栅电极的半导体器件的方法
公开(公告)号：US07977194B2
公开(公告)日：2011-07-12
申请号：US11492199
申请日：2006-07-25
申请人： Hidenobu Fukutome , Hiroyuki Ohta , Kazuo Kawamura , Kimihiko Hosaka
发明人： Hidenobu Fukutome , Hiroyuki Ohta , Kazuo Kawamura , Kimihiko Hosaka
IPC分类号： H01L21/8234
CPC分类号： H01L21/823443 , H01L21/28097 , H01L21/823456 , H01L29/665 , H01L29/6656 , H01L29/6659 , H01L29/7833 , H01L29/7843
摘要： A method for fabricating a semiconductor device includes the steps of: forming a first MISFET including first source/drain regions and a first gate electrode of a polycrystalline silicon, and a second MISFET including second source/drain regions and a second gate electrode of a polycrystalline silicon and having a gate length larger than that of the first gate electrode; and substituting the polycrystalline silicon forming the first and the second gate electrodes with a metal silicide. In the step of substituting the polycrystalline silicon with the metal silicide, the polycrystalline silicon forming the first gate electrode is totally substituted with the metal silicide and a part of polycrystalline silicon forming the second gate electrode is substituted with the metal silicide by utilizing that the gate length of the second gate electrode is larger than the gate length of the first gate electrode.
摘要翻译：一种制造半导体器件的方法包括以下步骤：形成第一MISFET，其包括多晶硅的第一源极/漏极区域和第一栅极电极，以及包括第二源极/漏极区域和第二栅极电极的第二MISFET，硅，其栅极长度大于第一栅电极的栅极长度; 以及用金属硅化物代替形成第一和第二栅电极的多晶硅。在用金属硅化物代替多晶硅的步骤中，形成第一栅电极的多晶硅完全被金属硅化物置换，并且形成第二栅极的部分多晶硅被金属硅化物取代，利用栅极第二栅电极的长度大于第一栅电极的栅极长度。

8. 发明授权

US07829461B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07829461B2
公开(公告)日：2010-11-09
申请号：US11898409
申请日：2007-09-12
申请人： Kazuo Kawamura , Shinichi Akiyama
发明人： Kazuo Kawamura , Shinichi Akiyama
IPC分类号： H01L21/44
CPC分类号： H01L21/28518 , H01L21/26506 , H01L21/28052 , H01L21/823814 , H01L21/823864 , H01L29/665 , H01L29/6653 , H01L29/6656
摘要： A semiconductor device fabrication method by which the thermal stability of nickel silicide can be improved. Nickel (or a nickel alloy) is formed over a semiconductor substrate on which a gate region, a source region, and a drain region are formed. Dinickel silicide is formed by performing a first annealing step, followed by a selective etching step. By performing a plasma treatment step, plasma which contains hydrogen ions is generated and the hydrogen ions are implanted in the dinickel silicide or the gate region, the source region, and the drain region under the dinickel silicide. The dinickel silicide is phase-transformed into nickel silicide by performing a second annealing step.
摘要翻译：可以提高硅化镍的热稳定性的半导体器件制造方法。镍（或镍合金）形成在其上形成有栅极区，源极区和漏极区的半导体衬底上。通过进行第一退火步骤，然后进行选择性蚀刻步骤来形成硅化镍。通过进行等离子体处理步骤，产生含有氢离子的等离子体，并且将氢离子注入硅化二锡或硅化二锡内的栅极区，源极区和漏极区。通过进行第二退火步骤，将二锡硅化物相转化成硅化镍。

9. 发明授权

US07407888B2 Semiconductor device and a fabrication process thereof 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US07407888B2
公开(公告)日：2008-08-05
申请号：US11355992
申请日：2006-02-17
申请人： Takeshi Ito , Satoshi Inagaki , Yasunori Uchino , Kazuo Kawamura
发明人： Takeshi Ito , Satoshi Inagaki , Yasunori Uchino , Kazuo Kawamura
IPC分类号： H01L21/44
CPC分类号： H01L21/76814 , H01L21/76846 , H01L21/76877
摘要： A method of fabricating a semiconductor device comprises the steps of forming a contact hole in an insulation film so as to extend therethrough and so as to expose a conductor body at a bottom part of the contact hole, forming a barrier metal film of tungsten nitride on the bottom part and a sidewall surface of the contact hole with a conformal shape to the bottom part and the sidewall surface of the contact hole, forming a tungsten layer so as to fill the contact hole via the barrier metal film, and forming a tungsten plug in the contact hole by the tungsten layer by polishing away a part of the tungsten film on the insulation film until a surface of the insulation film is exposed, wherein there is conducted a step of cleaning a surface of the conductor body prior to the forming step of the barrier metal film.
摘要翻译：一种制造半导体器件的方法包括以下步骤：在绝缘膜中形成接触孔以便延伸穿过其中，以便在接触孔的底部露出导体，形成氮化钨的阻挡金属膜接触孔的底部和侧壁表面具有与接触孔的底部和侧壁表面的共形形状，形成钨层，以便通过阻挡金属膜填充接触孔，并形成钨丝塞在所述接触孔中，通过在所述绝缘膜上抛光所述钨膜的一部分直到所述绝缘膜的表面露出来，在所述接触孔中，在所述形成步骤之前，进行清洁所述导体主体的表面的步骤的阻隔金属膜。

10. 发明授权

US07390707B2 Semiconductor device fabrication method 有权
标题翻译：半导体器件制造方法
公开(公告)号：US07390707B2
公开(公告)日：2008-06-24
申请号：US11220865
申请日：2005-09-08
申请人： Kazuo Kawamura , Yosuke Shimamune
发明人： Kazuo Kawamura , Yosuke Shimamune
IPC分类号： H01L21/336
CPC分类号： H01L21/28518 , H01L21/26506 , H01L21/28525 , H01L21/76829 , H01L29/165 , H01L29/41783 , H01L29/665 , H01L29/66537 , H01L29/66545 , H01L29/6656 , H01L29/6659 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： The semiconductor device fabrication method comprising the step of forming a gate electrode on a semiconductor substrate; the step of forming a source/drain diffused layer in the semiconductor substrate on both sides of the gate electrode; the step of burying a silicon germanium layer in the source/drain diffused layer; the step of forming an amorphous layer at an upper part of the silicon germanium layer; the step of forming a nickel film on the amorphous layer; and the step of making thermal processing to react the nickel film and the amorphous layer with each other to form a silicide film on the silicon germanium layer.
摘要翻译：半导体器件制造方法包括在半导体衬底上形成栅电极的步骤; 在栅电极两侧的半导体衬底中形成源极/漏极扩散层的步骤; 将硅锗层埋在源极/漏极扩散层中的步骤; 在硅锗层的上部形成非晶层的步骤; 在非晶层上形成镍膜的步骤; 以及使热处理使镍膜和非晶层彼此反应以在硅锗层上形成硅化物膜的步骤。

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