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1. 发明申请

US20130266758A2 METHOD FOR PRODUCING LAMINATED ELECTRONIC COMPONENT, AND LAMINATED ELECTRONIC COMPONENT 有权
标题翻译：生产层压电子元件的方法和层压电子元件
公开(公告)号：US20130266758A2
公开(公告)日：2013-10-10
申请号：US13811167
申请日：2011-07-21
申请人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
发明人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
IPC分类号： B32B38/00 , B32B18/00 , B32B5/00
CPC分类号： B32B38/0004 , B32B5/00 , B32B18/00 , B32B38/0036 , C04B2237/34 , C04B2237/343 , C04B2237/346 , C04B2237/68 , C04B2237/704 , C04B2237/76 , C04B2237/80 , H01G4/005 , H01G4/12 , H01G4/30 , H01G4/40 , H03H7/0115 , H03H2001/0085 , Y10T156/1089 , Y10T428/24058
摘要： A method of manufacturing a laminated electronic part includes fabricating first and second laminated sheets by laminating an insulating function layer made of an unsintered ceramic material and a conductor layer, having a plurality of conductors two-dimensionally arranged in a vertical direction and in a horizontal direction to make up part of circuit components; cutting the first and second laminated sheets into sticks to create a plurality of first and second laminate sticks; fabricating a third laminated sheet by rotating the second laminate sticks by 90°, arranging the second laminate sticks to be each sandwiched between the first laminate sticks, and thermocompression bonding them for integration; singulating the third laminated sheet into chips and creating sintered bodies by sintering the unsintered chips to integrate the first laminate with the second laminate.
摘要翻译：层叠电子部件的制造方法包括：通过层叠由烧结陶瓷材料制成的绝缘功能层和导体层来制造第一层压片和第二层叠片，所述导体层具有沿垂直方向和水平方向二维排列的多个导体组成电路元件的一部分; 将第一和第二层压片切割成棒以产生多个第一和第二层压棒; 通过将第二层压棒旋转90°来制造第三层压片，将第二层压棒布置在每个夹在第一层压棒之间，并将它们热压粘合用于一体化; 将第三层压片材切成芯片并通过烧结未烧结的芯片来制造烧结体，以将第一层压体与第二层压体集成。

2. 发明授权

US08864925B2 Method for producing laminated electronic component, and laminated electronic component 有权
标题翻译：层叠电子部件的制造方法以及层叠电子部件
公开(公告)号：US08864925B2
公开(公告)日：2014-10-21
申请号：US13811167
申请日：2011-07-21
申请人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
发明人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
IPC分类号： C03B29/00 , H01G4/40 , H01G4/005 , B32B18/00 , B32B5/00 , B32B38/00 , H01G4/30 , H01G4/12 , B29C65/00 , H03H1/00 , H03H7/01
CPC分类号： B32B38/0004 , B32B5/00 , B32B18/00 , B32B38/0036 , C04B2237/34 , C04B2237/343 , C04B2237/346 , C04B2237/68 , C04B2237/704 , C04B2237/76 , C04B2237/80 , H01G4/005 , H01G4/12 , H01G4/30 , H01G4/40 , H03H7/0115 , H03H2001/0085 , Y10T156/1089 , Y10T428/24058
摘要： A method of manufacturing a laminated electronic part includes fabricating first and second laminated sheets by laminating an insulating function layer made of an unsintered ceramic material and a conductor layer, having a plurality of conductors two-dimensionally arranged in a vertical direction and in a horizontal direction to make up part of circuit components; cutting the first and second laminated sheets into sticks to create a plurality of first and second laminate sticks; fabricating a third laminated sheet by rotating the second laminate sticks by 90°, arranging the second laminate sticks to be each sandwiched between the first laminate sticks, and thermocompression bonding them for integration; singulating the third laminated sheet into chips and creating sintered bodies by sintering the unsintered chips to integrate the first laminate with the second laminate.
摘要翻译：层叠电子部件的制造方法包括：通过层叠由烧结陶瓷材料制成的绝缘功能层和导体层来制造第一层压片和第二层叠片，所述导体层具有沿垂直方向和水平方向二维排列的多个导体组成电路元件的一部分; 将第一和第二层压片切割成棒以产生多个第一和第二层压棒; 通过将第二层压棒旋转90°来制造第三层压片，将第二层压棒布置在每个夹在第一层压棒之间，并将它们热压粘合用于一体化; 将第三层压片材切成芯片并通过烧结未烧结的芯片来制造烧结体，以将第一层压体与第二层压体集成。

3. 发明申请

US20130115411A1 METHOD FOR PRODUCING LAMINATED ELECTRONIC COMPONENT, AND LAMINATED ELECTRONIC COMPONENT 有权
公开(公告)号：US20130115411A1
公开(公告)日：2013-05-09
申请号：US13811167
申请日：2011-07-21
申请人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
发明人： Kazunari Kimura , Misaki Tabata , Shigemitsu Tomaki , Akira Nakamura , Isao Abe , Noriyuki Saito
IPC分类号： B32B38/00 , B32B18/00 , B32B5/00
CPC分类号： B32B38/0004 , B32B5/00 , B32B18/00 , B32B38/0036 , C04B2237/34 , C04B2237/343 , C04B2237/346 , C04B2237/68 , C04B2237/704 , C04B2237/76 , C04B2237/80 , H01G4/005 , H01G4/12 , H01G4/30 , H01G4/40 , H03H7/0115 , H03H2001/0085 , Y10T156/1089 , Y10T428/24058
摘要： A method of manufacturing a laminated electronic part includes fabricating first and second laminated sheets by laminating an insulating function layer made of an unsintered ceramic material and a conductor layer, having a plurality of conductors two-dimensionally arranged in a vertical direction and in a horizontal direction to make up part of circuit components; cutting the first and second laminated sheets into sticks to create a plurality of first and second laminate sticks; fabricating a third laminated sheet by rotating the second laminate sticks by 90°, arranging the second laminate sticks to be each sandwiched between the first laminate sticks, and thermocompression bonding them for integration; singulating the third laminated sheet into chips and creating sintered bodies by sintering the unsintered chips to integrate the first laminate with the second laminate.

4. 发明申请

US20120313743A1 LAMINATED ELECTRONIC COMPONENT EQUIPPED WITH INDUCTOR 审中-公开
标题翻译：带电感器的层压电子元件
公开(公告)号：US20120313743A1
公开(公告)日：2012-12-13
申请号：US13580021
申请日：2011-09-07
申请人： Kazunari Kimura , Shigemitsu Tomaki , Misaki Tabata , Isao Abe
发明人： Kazunari Kimura , Shigemitsu Tomaki , Misaki Tabata , Isao Abe
IPC分类号： H01F5/00
CPC分类号： H01F17/0013 , H01F2017/004
摘要： A laminated electronic part comprises a first laminate, and a second laminate including a front wiring layer and bonded to the first laminate. Wiring layers of the first laminate and second laminate are orthogonal to each other. The first laminate has a first inductor conductor disposed on a first wiring layer, and a second inductor conductor disposed on a second wiring layer. The second laminate has a connection conductor for electrically connecting an end of the first inductor conductor with an end of the second inductor conductor on a surface thereof to which the first laminate is bonded, such that the first inductor conductor and the second inductor conductor form a coil-shaped inductor.
摘要翻译：层叠电子部件包括第一层压体和包含前布线层并与第一层压体接合的第二层压体。第一层压体和第二层压体的接线层彼此正交。第一层压体具有布置在第一布线层上的第一电感器导体和布置在第二布线层上的第二电感器导体。第二层压体具有用于将第一电感器导体的端部与第二电感器导体的端部电连接到第一层压体的表面上的连接导体，使得第一电感器导体和第二电感器导体形成线圈形电感器。

5. 发明申请

US20130120950A1 BAND-PASS FILTER MODULE AND MODULE SUBSTRATE 有权
标题翻译：带通滤波器模块和模块基板
公开(公告)号：US20130120950A1
公开(公告)日：2013-05-16
申请号：US13811528
申请日：2011-07-21
申请人： Shigemitsu Tomaki , Yoshikazu Tsuya , Masamichi Tanaka , Isao Abe
发明人： Shigemitsu Tomaki , Yoshikazu Tsuya , Masamichi Tanaka , Isao Abe
IPC分类号： H05K1/18 , H05K1/11 , H03H7/01
CPC分类号： H05K1/18 , H01P1/20345 , H03H7/0115 , H03H7/0123 , H03H7/1708 , H03H7/1775 , H03H2001/0085 , H05K1/0224 , H05K1/0243 , H05K1/11 , H05K1/115 , H05K1/181
摘要： A bandpass filter module includes a mounting board and a BPF chip mounted on a surface thereof. The BPF chip includes three or more resonators; a first-stage resonator located closest to an input terminal, a final-stage resonator located closest to an output terminal, and a middle-stage resonator connected between the first-stage and the final-stage resonators and located in a chip middle zone. The mounting board includes an area overlapping with the chip middle zone, viewed in plan, defining a ground-free space in which no ground electrode is disposed. The ground-free space is formed at least from the surface of the mounting board to a depth position at which a topmost internal wiring layer is located. The middle-stage resonator is prevented from being coupled to ground electrodes on the mounting board and from a lower Q-value and increased insertion loss.
摘要翻译：带通滤波器模块包括安装板和安装在其表面上的BPF芯片。 BPF芯片包括三个或更多个谐振器; 位于最靠近输入端子的第一级谐振器，最靠近输出端子的最后级谐振器，以及连接在第一级谐振器和最后级谐振器之间并位于芯片中间区域的中间级谐振器。安装板包括与平面图中的芯片中间区域重叠的区域，限定没有设置接地电极的无地空间。至少从安装板的表面至最内部布线层所在的深度位置形成无地空间。防止中间级谐振器耦合到安装板上的接地电极和较低的Q值以及增加的插入损耗。

6. 发明授权

US09107323B2 Band-pass filter module and module substrate 有权
标题翻译：带通滤波器模块和模块基板
公开(公告)号：US09107323B2
公开(公告)日：2015-08-11
申请号：US13811528
申请日：2011-07-21
申请人： Shigemitsu Tomaki , Yoshikazu Tsuya , Masamichi Tanaka , Isao Abe
发明人： Shigemitsu Tomaki , Yoshikazu Tsuya , Masamichi Tanaka , Isao Abe
IPC分类号： H05K1/11 , H05K1/14 , H05K1/18 , H01P1/203 , H05K1/02 , H03H7/01 , H03H1/00
CPC分类号： H05K1/18 , H01P1/20345 , H03H7/0115 , H03H7/0123 , H03H7/1708 , H03H7/1775 , H03H2001/0085 , H05K1/0224 , H05K1/0243 , H05K1/11 , H05K1/115 , H05K1/181
摘要： A bandpass filter module includes a mounting board and a BPF chip mounted on a surface thereof. The BPF chip includes three or more resonators; a first-stage resonator located closest to an input terminal, a final-stage resonator located closest to an output terminal, and a middle-stage resonator connected between the first-stage and the final-stage resonators and located in a chip middle zone. The mounting board includes an area overlapping with the chip middle zone, viewed in plan, defining a ground-free space in which no ground electrode is disposed. The ground-free space is formed at least from the surface of the mounting board to a depth position at which a topmost internal wiring layer is located. The middle-stage resonator is prevented from being coupled to ground electrodes on the mounting board and from a lower Q-value and increased insertion loss.
摘要翻译：带通滤波器模块包括安装板和安装在其表面上的BPF芯片。 BPF芯片包括三个或更多个谐振器; 位于最靠近输入端子的第一级谐振器，最靠近输出端子的最后级谐振器，以及连接在第一级谐振器和最后级谐振器之间并位于芯片中间区域的中间级谐振器。安装板包括与平面图中的芯片中间区域重叠的区域，限定没有设置接地电极的无地空间。至少从安装板的表面至最内部布线层所在的深度位置形成无地空间。防止中间级谐振器耦合到安装板上的接地电极和较低的Q值以及增加的插入损耗。

7. 发明授权

US08952767B2 Layered bandpass filter 有权
标题翻译：分层带通滤波器
公开(公告)号：US08952767B2
公开(公告)日：2015-02-10
申请号：US13429982
申请日：2012-03-26
申请人： Eiko Wakata , Shigemitsu Tomaki , Isao Abe
发明人： Eiko Wakata , Shigemitsu Tomaki , Isao Abe
IPC分类号： H03H7/12 , H01P1/203 , H03H1/00
CPC分类号： H01P1/20345 , H03H7/12 , H03H2001/0085
摘要： A bandpass filter includes a layered structure including a plurality of stacked dielectric layers, and first to third resonators provided within the layered structure. In terms of circuit configuration, the second resonator is located between the first and third resonators. The first resonator includes a first inductor and a first capacitor. The second resonator includes a second inductor and a second capacitor. The third resonator includes a third inductor and a third capacitor. The second inductor is disposed at a position different from that of each of the first and third inductors in the stacking direction of the dielectric layers. The second inductor is lower in inductance than the first and third inductors. The second capacitor is higher in capacitance than the first and third capacitors.
摘要翻译：带通滤波器包括层叠结构，其包括多层堆叠介质层，以及设置在分层结构内的第一至第三谐振器。在电路结构方面，第二谐振器位于第一和第三谐振器之间。第一谐振器包括第一电感器和第一电容器。第二谐振器包括第二电感器和第二电容器。第三谐振器包括第三电感器和第三电容器。第二电感器设置在与电介质层的层叠方向上的第一和第三电感器的位置不同的位置处。第二电感器的电感比第一和第三电感器低。第二电容器的电容高于第一和第三电容器。

8. 发明授权

US07463120B2 High frequency filter 有权
标题翻译：高频滤波器
公开(公告)号：US07463120B2
公开(公告)日：2008-12-09
申请号：US11644007
申请日：2006-12-22
申请人： Hideya Matsubara , Shigemitsu Tomaki , Shinichiro Toda , Atsunori Okada
发明人： Hideya Matsubara , Shigemitsu Tomaki , Shinichiro Toda , Atsunori Okada
IPC分类号： H01P1/203
CPC分类号： H01P1/20345
摘要： A high frequency filter comprises a first resonator and a second resonator provided inside a layered substrate. The first and second resonators are inductively coupled and capacitively coupled to each other through a first capacitor and a second capacitor connected to each other in parallel. The first capacitor is formed using first and third electrodes and a dielectric layer. The first electrode is connected to the first resonator via a through hole. The third electrode is connected to the second resonator and opposed to the first electrode. The second capacitor is formed using second and fourth electrodes and the dielectric layer. The second electrode is connected to the second resonator via a through hole. The fourth electrode is connected to the first resonator and opposed to the second electrode.
摘要翻译：高频滤波器包括设置在分层衬底内的第一谐振器和第二谐振器。第一和第二谐振器通过并联连接的第一电容器和第二电容器彼此电感耦合和电容耦合。第一电容器使用第一和第三电极和电介质层形成。第一电极经由通孔与第一谐振器连接。第三电极连接到第二谐振器并与第一电极相对。第二电容器使用第二和第四电极和电介质层形成。第二电极经由通孔与第二谐振器连接。第四电极连接到第一谐振器并与第二电极相对。

9. 发明申请

US20070164840A1 High frequency filter 有权
标题翻译：高频滤波器
公开(公告)号：US20070164840A1
公开(公告)日：2007-07-19
申请号：US11643963
申请日：2006-12-22
申请人： Hideya Matsubara , Shigemitsu Tomaki , Shinichiro Toda , Atsunori Okada
发明人： Hideya Matsubara , Shigemitsu Tomaki , Shinichiro Toda , Atsunori Okada
IPC分类号： H01P1/203 , H01P5/10
CPC分类号： H01P5/10 , H01P1/20345
摘要： A high frequency filter incorporates: an unbalanced input/output terminal; two balanced input/output terminals; two resonators respectively provided between the unbalanced input/output terminal and the two balanced input/output terminals; and a layered substrate for integrating components of the high frequency filter. The two resonators are inductively coupled to each other, and are also capacitively coupled to each other through two capacitors. Each of the two capacitors is formed using a pair of first and second electrodes and a dielectric layer. The first electrode is connected to one of the resonators via a through hole. The second electrode is connected to the other of the resonators and opposed to the first electrode forming the pair with the second electrode, the dielectric layer being disposed between the second electrode and the first electrode.
摘要翻译：高频滤波器包括：不平衡输入/输出端子; 两个平衡输入/输出端子; 分别设置在不平衡输入/输出端子和两个平衡输入/输出端子之间的两个谐振器; 以及用于对高频滤波器的部件进行积分的分层基板。两个谐振器彼此电感耦合，并且还通过两个电容器彼此电容耦合。两个电容器中的每一个使用一对第一和第二电极和电介质层形成。第一电极经由通孔连接到谐振器中的一个。第二电极连接到另一个谐振器，并与第二电极形成一对的第一电极相对，电介质层设置在第二电极和第一电极之间。

10. 发明授权

US07432786B2 High frequency filter 有权
标题翻译：高频滤波器
公开(公告)号：US07432786B2
公开(公告)日：2008-10-07
申请号：US11654597
申请日：2007-01-18
申请人： Shigemitsu Tomaki , Shinichiro Toda , Hideya Matsubara , Atsunori Okada
发明人： Shigemitsu Tomaki , Shinichiro Toda , Hideya Matsubara , Atsunori Okada
IPC分类号： H01P1/20 , H01P3/08
CPC分类号： H01P1/20345
摘要： A high frequency filter incorporates first to third resonators provided inside a layered substrate. The first and third resonators are adjacent to each other and inductively coupled to each other. The second and third resonators are also adjacent to each other and inductively coupled to each other. The first and second resonators are not adjacent to each other but are capacitively coupled to each other through a conductor layer for capacitive coupling. The conductor layer for capacitive coupling incorporates: a first portion for forming a first capacitor between itself and the first resonator; a second portion for forming a second capacitor between itself and the second resonator; and a third portion having an end connected to the first portion and the other end connected to the second portion, the ends being opposed to each other in the longitudinal direction. The width of at least part of the third portion is smaller than the width of each of the first portion and the second portion.
摘要翻译：高频滤波器包括设置在分层衬底内的第一至第三谐振器。第一和第三谐振器彼此相邻并且彼此感应耦合。第二和第三谐振器也彼此相邻并且彼此感应耦合。第一和第二谐振器彼此不相邻，但是通过用于电容耦合的导体层彼此电容耦合。用于电容耦合的导体层包括：用于在其自身和第一谐振器之间形成第一电容器的第一部分; 第二部分，用于在其自身与第二谐振器之间形成第二电容器; 以及第三部分，其端部连接到第一部分，另一端连接到第二部分，端部在纵向方向上彼此相对。第三部分的至少一部分的宽度小于第一部分和第二部分的宽度。

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