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1. 发明授权

US07023061B2 Memory transistor array utilizing insulated word lines as gate electrodes 失效
标题翻译：使用绝缘字线作为栅电极的存储晶体管阵列
公开(公告)号：US07023061B2
公开(公告)日：2006-04-04
申请号：US11072505
申请日：2005-03-07
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L29/76
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.
摘要翻译：一种半导体器件，其能够以近似的间隔布置字线，包括排列成阵列的多个存储晶体管，以及同时作为沿行方向延伸的同一行中的存储晶体管的栅电极的多条字线，并重复在列方向上，在多个字线之间形成绝缘膜以使字线彼此绝缘和隔离，并且字线分隔的尺寸由绝缘膜的厚度限定。

2. 发明申请

US20050218522A1 Semiconductor device and method of producing the same 失效
公开(公告)号：US20050218522A1
公开(公告)日：2005-10-06
申请号：US11098501
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/28 , H01L21/8246 , H01L27/115 , H01L21/8242
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

3. 发明申请

US20050146015A1 Semiconductor device and method of producing the same 失效
公开(公告)号：US20050146015A1
公开(公告)日：2005-07-07
申请号：US11072505
申请日：2005-03-07
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/28 , H01L21/8246 , H01L27/115 , H01L29/76
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

4. 发明授权

US07012329B2 Memory transistor array utilizing insulated word lines as gate electrodes 失效
公开(公告)号：US07012329B2
公开(公告)日：2006-03-14
申请号：US11098503
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L29/76
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

5. 发明授权

US07227255B2 Semiconductor device and method of producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US07227255B2
公开(公告)日：2007-06-05
申请号：US11098501
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L23/48
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.
摘要翻译：一种半导体器件，其能够以近似的间隔布置字线，包括排列成阵列的多个存储晶体管，以及同时作为沿行方向延伸的同一行中的存储晶体管的栅电极的多条字线，并重复在列方向上，在多个字线之间形成绝缘膜以使字线彼此绝缘和隔离，并且字线分隔的尺寸由绝缘膜的厚度限定。

6. 发明授权

US07049180B2 Method of fabricating a memory transistor array utilizing insulated word lines as gate electrodes 失效
标题翻译：使用绝缘字线作为栅电极制造存储晶体管阵列的方法
公开(公告)号：US07049180B2
公开(公告)日：2006-05-23
申请号：US11098447
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/48 , H01L29/76
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.
摘要翻译：一种半导体器件，其能够以近似的间隔布置字线，包括排列成阵列的多个存储晶体管，以及同时作为沿行方向延伸的同一行中的存储晶体管的栅电极的多条字线，并重复在列方向上，在多个字线之间形成绝缘膜以使字线彼此绝缘和隔离，并且字线分隔的尺寸由绝缘膜的厚度限定。

7. 发明申请

US20050255652A1 Semiconductor device and method of producing the same 失效
公开(公告)号：US20050255652A1
公开(公告)日：2005-11-17
申请号：US11098447
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/28 , H01L21/8246 , H01L27/115 , H01L21/336
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

8. 发明授权

US06891262B2 Semiconductor device and method of producing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06891262B2
公开(公告)日：2005-05-10
申请号：US10196636
申请日：2002-07-17
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/28 , H01L21/8246 , H01L27/115 , H01L23/48 , H01L23/04 , H01L23/495 , H01L29/788
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.
摘要翻译：一种半导体器件，其能够以近似的间隔布置字线，包括排列成阵列的多个存储晶体管，以及同时作为沿行方向延伸的同一行中的存储晶体管的栅电极的多条字线，并重复在列方向上，在多个字线之间形成绝缘膜，以使字线彼此绝缘和隔离，并且字线分隔的尺寸由绝缘膜的厚度限定。

9. 发明申请

US20050189570A1 Semiconductor device and method of producing the same 失效
公开(公告)号：US20050189570A1
公开(公告)日：2005-09-01
申请号：US11098503
申请日：2005-04-05
申请人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
发明人： Kazumasa Nomoto , Toshio Kobayashi , Akihiro Nakamura , Ichiro Fujiwara , Toshio Terano
IPC分类号： H01L21/28 , H01L21/8246 , H01L27/115 , H01L21/8242 , H01L23/02 , H01L27/10 , H01L29/73 , H01L29/74
CPC分类号： H01L27/11568 , H01L21/2815 , H01L27/115 , H01L29/6656
摘要： A semiconductor device enabling word lines to be arranged at close intervals, comprising a plurality of memory transistors arranged in an array and a plurality of word lines serving also as gate electrodes of memory transistors in a same row, extending in a row direction, and repeating in a column direction, where insulating films are formed between the plurality of word lines to insulate and isolate the word lines from each other and where a dimension of separation of word lines is defined by the thickness of the insulating films.

10. 发明申请

US20050230766A1 Non-volatile semiconductor memory device and method for producing same 失效
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20050230766A1
公开(公告)日：2005-10-20
申请号：US11131865
申请日：2005-05-18
申请人： Kazumasa Nomoto , Hiroshi Aozasa , Ichiro Fujiwara , Shinji Tanaka
发明人： Kazumasa Nomoto , Hiroshi Aozasa , Ichiro Fujiwara , Shinji Tanaka
IPC分类号： H01L21/8247 , H01L21/28 , H01L21/318 , H01L21/762 , H01L27/115 , H01L27/12 , H01L29/788 , H01L29/792 , H01L21/336
CPC分类号： H01L29/792 , H01L21/28282 , H01L21/7624
摘要： The memory device has a plurality of dielectric films including charge storage layers CS having a charge holding capability therein and stacked on an active region of a semiconductor SUB and electrodes G on the plurality of dielectric films. Each charge storage layer CS includes a first nitride film CS1 made of silicon nitride or silicon oxynitride and a second nitride film CS2 made of silicon nitride or silicon oxynitride and having a higher charge trap density than the first nitride film CS1. The first nitride film CS1 is formed by chemical vapor deposition using a first gas which contains a first silicon-containing gas containing chlorine with a predetermined percent composition and a nitrogen-containing gas as starting materials. The second nitride film CS2 is formed by chemical vapor deposition using a second gas which contains a second silicon-containing gas having a lower chlorine percent composition than the above predetermined percent composition and a nitrogen-containing gas as starting materials.
摘要翻译：存储器件具有多个电介质膜，其包括其中具有电荷保持能力的电荷存储层CS，并且堆叠在半导体SUB的有源区和多个介电膜上的电极G. 每个电荷存储层CS包括由氮化硅或氮氧化硅制成的第一氮化物膜CS 1和由氮化硅或氮氧化硅制成并且具有比第一氮化物膜CS 1更高的电荷陷阱密度的第二氮化物膜CS 2。第一氮化物膜CS1通过化学气相沉积形成，该第一气体含有含有预定百分比组成的含氯的第一含硅气体和含氮气体作为原料。第二氮化物膜CS2通过使用包含比上述预定百分比组成低的氯百分含量的第二含硅气体和含氮气体作为起始材料的第二气体进行化学气相沉积而形成。

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