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    • 3. 发明授权
    • Lockup device of torque converter
    • 变矩器闭锁装置
    • US06269923B1
    • 2001-08-07
    • US09497208
    • 2000-02-03
    • Kazuhiro YamashitaMitsugu Yamaguchi
    • Kazuhiro YamashitaMitsugu Yamaguchi
    • F16H4502
    • F16H45/02F16H2045/0294
    • A lockup device 6 is provided for a torque converter 1 that allows for the use of larger torsion springs 50. The lockup device 6 of the torque converter 1 includes a piston 8 and a damper mechanism 13. The piston 8 constitutes a clutch together with a front cover 3. The damper mechanism 13 includes a drive plate 9, a driven plate 10 and coil spring assemblies 12. The drive plate 9 is secured to one axial side surface of the piston 8. The coil spring assemblies 12 couple the drive plate 9 and the driven plate 10 in a rotational direction. Cutouts 41 are formed in the drive plate 9 at positions corresponding to positions of the coil spring assemblies 12. Each coil spring assembly 12 is received within the corresponding one of the cutout 41 and is axially supported by the one axial side surface of the piston 8.
    • 锁止装置6设置用于允许使用较大的扭转弹簧50的变矩器1。变矩器1的锁止装置6包括活塞8和阻尼机构13.活塞8与一个离合器一起构成 阻尼机构13包括驱动板9,从动板10和螺旋弹簧组件12.驱动板9固定在活塞8的一个轴向侧表面上。螺旋弹簧组件12将驱动板9 和从动板10沿旋转方向。 在驱动板9上形成有与螺旋弹簧组件12的位置相对应的位置处的切口41.每个螺旋弹簧组件12被容纳在相应的一个切口41内并由活塞8的一个轴向侧面轴向支承 。
    • 4. 发明授权
    • Solid-state imaging device
    • 固态成像装置
    • US08395194B2
    • 2013-03-12
    • US13238537
    • 2011-09-21
    • Haruhisa YokoyamaHiroshi SakohKazuhiro YamashitaMitsuo YasuhiraYuichi Hirofuji
    • Haruhisa YokoyamaHiroshi SakohKazuhiro YamashitaMitsuo YasuhiraYuichi Hirofuji
    • H01L27/148H01L27/146H01L21/00
    • H01L27/14623H01L27/14627H01L27/1464H01L27/14656
    • A solid-state imaging device according to the present invention is of a MOS type and includes a plurality of pixels arranged in rows and columns, and includes: a semiconductor substrate; a photodiode which is formed in the semiconductor substrate and converts, into a signal charge, light that is incident from a first main surface of the semiconductor substrate; a transfer transistor which is formed in a second main surface of the semiconductor substrate and transfers the signal charge converted by the photodiode; a light shielding film which is conductive and formed on a boundary between the pixels, above the first main surface of the semiconductor substrate; an overflow drain region electrically connected to the light shielding film and formed in the first main surface of the semiconductor substrate; and an overflow barrier region formed between the overflow drain region and the photodiode.
    • 根据本发明的固态成像装置是MOS型的,并且包括排列成行和列的多个像素,并且包括:半导体衬底; 形成在所述半导体衬底中并将从所述半导体衬底的第一主表面入射的光转换为信号电荷的光电二极管; 传输晶体管,其形成在半导体衬底的第二主表面中并传送由光电二极管转换的信号电荷; 在半导体衬底的第一主表面之上的像素之间的边界上导电并形成的遮光膜; 与所述遮光膜电连接并形成在所述半导体衬底的所述第一主表面中的溢出漏极区域; 以及形成在溢出漏极区域和光电二极管之间的溢出阻挡区域。
    • 5. 发明授权
    • Semiconductor test system
    • 半导体测试系统
    • US06378098B1
    • 2002-04-23
    • US09264768
    • 1999-03-09
    • Kazuhiro Yamashita
    • Kazuhiro Yamashita
    • G01R3128
    • G01R31/31917
    • A semiconductor test system for efficiently testing a semiconductor device (DUT) having a phase lock loop (PLL) circuit therein. The semiconductor test system includes a first clock and waveform generator for supplying a clock signal to the PLL circuit at a start of the first pattern block, a second clock and waveform generator for supplying pattern data to the DUT during each of the pattern blocks, a pattern generator for generating pattern data, and a timing generator for generating a tester rate signal, a clear signal, and a gate signal for controlling the tester rate signal and the clear signal in the first and second clock and waveform generators. The clock signal is continuously provided to the PLL circuit until the end of the last pattern block while the pattern data to the data pin is reset between the end of the current pattern block and the start of the next pattern block.
    • 一种用于有效测试其中具有锁相环(PLL)电路的半导体器件(DUT)的半导体测试系统。 半导体测试系统包括第一时钟和波形发生器,用于在第一模式块的开始处向PLL电路提供时钟信号;第二时钟和波形发生器,用于在每个模式块期间向DUT提供模式数据, 用于产生图案数据的图形发生器,以及用于产生测试器速率信号,清除信号和用于控制第一和第二时钟和波形发生器中的测试仪速率信号和清除信号的清除信号的定时发生器。 在当前图案块的结束和下一个图案块的开始之间复位到数据引脚的图案数据之前,将时钟信号连续提供给PLL电路,直到最后一个模式块的结束为止。
    • 6. 发明授权
    • Device and method for measuring dynamic torsional characteristics of a damper assembly
    • 用于测量阻尼器组件的动态扭转特性的装置和方法
    • US06253620B1
    • 2001-07-03
    • US09323695
    • 1999-06-02
    • Kazuhiro Yamashita
    • Kazuhiro Yamashita
    • G01D900
    • G01P15/165G01M17/04
    • An object is to enable accurate measurement of dynamic torsional characteristics of a damper assembly. A measuring device measures an angular speed (d&thgr;1/dt) of an input rotary member, an angular speed (d&thgr;2/dt) of an output rotary member and a torque (T1) transmitted to the input rotary member. A torsion angle (&thgr;) of a damper unit is calculated by integrating the angular speeds (d&thgr;1/dt) and (d&thgr;2/dt) of the input and output rotary members. A torque (T) acting on the damper unit is calculated by subtracting a product of an angular acceleration (d2&thgr;1/dt2) of the input rotary member calculated by differentiating the angular speed (d&thgr;1/dt) of the input rotary member and a moment of inertia (I1) of the input rotary member from the torque (T1) transmitted to the input rotary member.
    • 目的是能够精确地测量阻尼器组件的动态扭转特性。测量装置测量输入旋转构件的角速度(dθta/ dt),输出旋转构件的角速度(dθ= 2 / dt)和扭矩 (T1)传输到输入旋转部件。 通过积分输入和输出旋转构件的角速度(dθta/ dt)和(dθta/ dt)来计算阻尼单元的扭转角(θ)。 通过减去通过对输入旋转部件的角速度(dθta/ dt)进行微分而计算出的输入旋转部件的角加速度(d2theta1 / dt2)的乘积,计算作用在减震器单元上的扭矩(T) 输入旋转构件的惯性(I1)从传递到输入旋转构件的扭矩(T1)。
    • 8. 发明授权
    • Evaluation method of resist coating
    • 抗蚀剂涂层的评价方法
    • US5252414A
    • 1993-10-12
    • US747619
    • 1991-08-20
    • Kazuhiro YamashitaHironao IwaiNoboru Nomura
    • Kazuhiro YamashitaHironao IwaiNoboru Nomura
    • G03F7/16G03F7/00G03F7/20H01L21/027H01L21/30H01L21/66G03F9/00
    • G03F7/70633G03F7/0035G03F7/20
    • A method for evaluating a resist coating comprising the steps of: forming a first layer resist pattern including an alignment mark by applying a first resist on a semiconductor substrate and by exposing and developing said first resist, said first layer resist pattern having a ridge portion; irradiating said first layer resist pattern with a deep ultraviolet ray; applying, onto said irradiated first layer resist pattern, a second resist having substantially the same refractive index as said first resist to form a second resist coating; detecting said alignment mark formed in said first layer resist pattern, and relatively positioning a pattern for said second resist and said first layer resist pattern; and determining nonuniformity characteristics of said second resist coating by measuring an overlay accuracy between said first layer resist pattern and said pattern for said second resist. The present invention ensures a quantitative evaluation in a non-contact manner for non-uniformity of a resist coating, and enables a resist coating method to be optimized.
    • 一种抗蚀剂涂层评价方法,其特征在于,包括以下步骤:通过在半导体衬底上施加第一抗蚀剂,通过曝光和显影所述第一抗蚀剂,形成包括对准标记的第一层抗蚀剂图案,所述第一层抗蚀剂图案具有脊部; 用深紫外线照射所述第一层抗蚀剂图案; 在所述照射的第一层抗蚀剂图案上施加具有与所述第一抗蚀剂基本相同的折射率的第二抗蚀剂,以形成第二抗蚀剂涂层; 检测形成在所述第一层抗蚀剂图案中的所述对准标记,并且相对地定位所述第二抗蚀剂和所述第一层抗蚀剂图案的图案; 以及通过测量所述第一层抗蚀剂图案和所述第二抗蚀剂的所述图案之间的覆盖精度来确定所述第二抗蚀剂涂层的不均匀性。 本发明确保以非接触方式对抗蚀剂涂层的不均匀性进行定量评价,并且能够优化抗蚀剂涂布方法。