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1. 发明授权

US07307292B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07307292B2
公开(公告)日：2007-12-11
申请号：US10456901
申请日：2003-06-09
申请人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
发明人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
IPC分类号： H01L31/0336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.
摘要翻译：绝缘栅半导体器件具有形成在衬底上的第一氮化物半导体层和通过氧化形成在第一氮化物半导体层上的第二氮化物半导体层而获得的绝缘氧化层。在绝缘氧化层上形成栅电极。

2. 发明授权

US06774449B1 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06774449B1
公开(公告)日：2004-08-10
申请号：US09664555
申请日：2000-09-18
申请人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
发明人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
IPC分类号： H01L3100
CPC分类号： H01L29/475 , H01L21/28581 , H01L29/2003 , H01L29/66856 , H01L29/66863 , H01L29/812 , H01L33/32 , H01L33/40
摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
摘要翻译：本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

3. 发明授权

US06593193B2 Semiconductor device and method for fabricating the same 有权
公开(公告)号：US06593193B2
公开(公告)日：2003-07-15
申请号：US10054843
申请日：2002-01-25
申请人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
发明人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
IPC分类号： H01L21336
CPC分类号： H01L29/66462 , H01L21/28264 , H01L29/2003 , H01L29/7783
摘要： An insulating-gate semiconductor device has a first nitride semiconductor layer formed over a substrate and an insulating oxidation layer obtained by oxidizing a second nitride semiconductor layer formed on the first nitride semiconductor layer. A gate electrode is formed on the insulating oxidation layer.

4. 发明授权

US07585706B2 Method of fabricating a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07585706B2
公开(公告)日：2009-09-08
申请号：US11898951
申请日：2007-09-18
申请人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
发明人： Katsunori Nishii , Kaoru Inoue , Toshinobu Matsuno , Yoshito Ikeda , Hiroyuki Masato
IPC分类号： H01L21/336
CPC分类号： H01L29/66863 , H01L29/2003 , H01L29/205 , H01L29/66462 , H01L29/7783
摘要： The semiconductor device of this invention includes an active region formed from a group III nitride semiconductor grown on a substrate and an insulating oxide film formed in a peripheral portion of the active region by oxidizing the group III nitride semiconductor. On the active region, a gate electrode in Schottky contact with the active region extending onto the insulating oxide film and having an extended portion on the insulating oxide film is formed, and ohmic electrodes respectively serving as a source electrode and a drain electrode are formed with space from side edges along the gate length direction of the gate electrode.
摘要翻译：本发明的半导体器件包括由在衬底上生长的III族氮化物半导体形成的有源区和通过氧化III族氮化物半导体而形成在有源区的周边部分中的绝缘氧化物膜。在有源区域上，形成与延伸到绝缘氧化膜上并在绝缘氧化膜上具有延伸部分的有源区肖特基接触的栅电极，分别用作源电极和漏电极的欧姆电极形成有沿着栅电极的栅极长度方向的侧边缘的空间。

5. 发明授权

US06852612B2 Semiconductor device and method for fabricating the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US06852612B2
公开(公告)日：2005-02-08
申请号：US10323637
申请日：2002-12-20
申请人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
发明人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
IPC分类号： H01L21/285 , H01L21/338 , H01L23/48 , H01L29/20 , H01L29/47 , H01L29/812 , H01L31/00 , H01L33/32 , H01L33/40 , H01L21/28
CPC分类号： H01L29/475 , H01L21/28581 , H01L29/2003 , H01L29/66856 , H01L29/66863 , H01L29/812 , H01L33/32 , H01L33/40
摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
摘要翻译：本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

6. 发明授权

US06809352B2 Palladium silicide (PdSi) schottky electrode for gallium nitride semiconductor devices 失效
标题翻译：用于氮化镓半导体器件的硅化钯（PdSi）肖特基电极
公开(公告)号：US06809352B2
公开(公告)日：2004-10-26
申请号：US10329675
申请日：2002-12-27
申请人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
发明人： Katsunori Nishii , Yoshito Ikeda , Hiroyuki Masato , Kaoru Inoue
IPC分类号： H01L310328
CPC分类号： H01L29/475 , H01L21/28581 , H01L29/2003 , H01L29/66856 , H01L29/66863 , H01L29/812 , H01L33/32 , H01L33/40
摘要： The semiconductor device of the present invention includes: a gallium nitride (GaN) compound semiconductor layer; and a Schottky electrode formed on the GaN compound semiconductor layer, wherein the Schottky electrode contains silicon.
摘要翻译：本发明的半导体器件包括：氮化镓（GaN）化合物半导体层; 和形成在GaN化合物半导体层上的肖特基电极，其中肖特基电极含有硅。

7. 发明授权

US06812505B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06812505B2
公开(公告)日：2004-11-02
申请号：US10605019
申请日：2003-09-02
申请人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
发明人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
IPC分类号： H01L29737
CPC分类号： H01L29/7783 , H01L29/045 , H01L29/2003 , H01L29/42316
摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
摘要翻译：半导体器件包括：衬底; 包括形成在衬底上的GaN的缓冲层，其中：缓冲层的表面是Ga原子的c个面; 在缓冲层上形成包括GaN或InGaN的沟道层，其中：沟道层的表面是Ga或In原子的c面; 包括形成在沟道层上的AlGaN的电子给体层，其中：电子给体层的表面是Al或Ga原子的c个面; 形成在电子供体层上的源电极和漏电极; 形成在源电极和漏电极之间的包含GaN或InGaAlN的覆盖层，其中：覆盖层的表面是Ga或In原子的c面，并且覆盖层的至少一部分与电子给体层接触; 以及形成为至少一部分与盖层接触的栅电极。

8. 发明授权

US06924516B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06924516B2
公开(公告)日：2005-08-02
申请号：US10711134
申请日：2004-08-26
申请人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
发明人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
IPC分类号： H01L29/04 , H01L29/20 , H01L29/423 , H01L29/778 , H01L31/0328
CPC分类号： H01L29/7783 , H01L29/045 , H01L29/2003 , H01L29/42316
摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer,wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
摘要翻译：半导体器件包括：衬底; 包括形成在衬底上的GaN的缓冲层，其中：缓冲层的表面是Ga原子的c个面; 在缓冲层上形成包括GaN或InGaN的沟道层，其中：沟道层的表面是Ga或In原子的c面; 包括形成在沟道层上的AlGaN的电子给体层，其中：电子给体层的表面是Al或Ga原子的c个面; 形成在电子供体层上的源电极和漏电极; 形成在源电极和漏电极之间的包含GaN或InGaAlN的覆盖层，其中：覆盖层的表面是Ga或In原子的c面，并且覆盖层的至少一部分与电子给体层接触; 以及形成为至少一部分与盖层接触的栅电极。

9. 发明授权

US06639255B2 GaN-based HFET having a surface-leakage reducing cap layer 有权
标题翻译：具有表面泄漏降低帽层的GaN基HFET
公开(公告)号：US06639255B2
公开(公告)日：2003-10-28
申请号：US09733593
申请日：2000-12-08
申请人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
发明人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
IPC分类号： H01L29737
CPC分类号： H01L29/7783 , H01L29/045 , H01L29/2003 , H01L29/42316
摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein: surfaces of the buffer layer are c facets of Ga atoms; a channel layer including GaN or InGaN formed on the buffer layer, wherein: surfaces of the channel layer are c facets of Ga or In atoms; an electron donor layer including AlGaN formed on the channel layer, wherein: surfaces of the electron donor layer are c facets of Al or Ga atoms; a source electrode and a drain electrode formed on the electron donor layer; a cap layer including GaN or InGaAlN formed between the source electrode and the drain electrode, wherein: surfaces of the cap layer are c facets of Ga or In atoms and at least a portion of the cap layer is in contact with the electron donor layer; and a gate electrode formed at least a portion of which is in contact with the cap layer.
摘要翻译：半导体器件包括：衬底; 包括形成在衬底上的GaN的缓冲层，其中：缓冲层的表面是Ga原子的c个面; 在缓冲层上形成包括GaN或InGaN的沟道层，其中：沟道层的表面是Ga或In原子的c面; 包括形成在沟道层上的AlGaN的电子给体层，其中：电子给体层的表面是Al或Ga原子的c个面; 形成在电子供体层上的源电极和漏电极; 形成在源电极和漏电极之间的包含GaN或InGaAlN的覆盖层，其中：所述覆盖层的表面是Ga或In原子的c面，并且所述覆盖层的至少一部分与所述电子给体层接触; 以及形成为至少一部分与盖层接触的栅电极。

10. 发明授权

US06531718B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US06531718B2
公开(公告)日：2003-03-11
申请号：US09759401
申请日：2001-01-12
申请人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
发明人： Kaoru Inoue , Katsunori Nishii , Hiroyuki Masato
IPC分类号： H01L2906
CPC分类号： H01L29/205 , H01L29/2003 , H01L29/7783
摘要： A semiconductor device includes: a substrate; a buffer layer including GaN formed on the substrate, wherein surfaces of the buffer layer are c facets of Ga atoms; a separating layer including (InXAl1-X)YGa1-YN (where 0≦X≦1, 0≦Y≦1) formed on the buffer layer, wherein surfaces of the separating layer are c facets of In, Al, or Ga atoms; a channel layer including GaN, InGaN, or a combination of GaN and InGaN formed on the separating layer, wherein surfaces of the channel layer are c facets of Ga or In atoms; and an electron supply layer including AlGaN formed on the channel layer, wherein surfaces of the electron supply layer are c facets of Al or Ga atoms, wherein the AlN composition ratio in the separating layer is smaller than the AlN composition ratio in the electron supply layer.
摘要翻译：半导体器件包括：衬底; 包括在衬底上形成的GaN的缓冲层，其中缓冲层的表面是Ga原子的c个面; 形成在缓冲层上的（InXAl1-X）YGa1-YN（其中0 <= X <= 1,0 <= Y <= 1）的分离层，其中分离层的表面是In，Al，或Ga原子; 包含GaN，InGaN或在分离层上形成的GaN和InGaN的组合的沟道层，其中沟道层的表面是Ga或In原子的c个面; 以及形成在沟道层上的包含AlGaN的电子供给层，其中电子供给层的表面是Al或Ga原子的c个面，其中分离层中的AlN组成比小于电子供给层中的AlN组成比。

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