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1. 发明授权

US06278153B1 Thin film capacitor formed in via 有权
标题翻译：薄膜电容器形成在通孔中
公开(公告)号：US06278153B1
公开(公告)日：2001-08-21
申请号：US09420561
申请日：1999-10-19
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Akinobu Shibuya
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Akinobu Shibuya
IPC分类号： H01L27108
CPC分类号： H01L28/55 , H01L21/3212 , H01L21/76877 , H01L28/75 , H05K1/162
摘要： There is provided a thin film capacitor including (a) a lower electrode, (b) an insulating layer formed burying the lower electrode therein and formed with a via-hole reaching the lower electrode, (c) a dielectric layer formed on an inner sidewall of the via-hole and covering an exposed surface of the lower electrode therewith, and (d) an upper electrode surrounded by the dielectric layer. In accordance with the thin film capacitor, the upper electrode is formed to be buried in the via-hole formed above the lower electrode. Hence, it is possible to prevent short-circuit between the upper and lower electrodes, and degradation of the dielectric layer during fabrication of a thin film capacitor, both of which enhances reliability of a capacitor. In addition, a multi-layered wiring structure could be readily fabricated on the thin film capacitor.
摘要翻译：提供一种薄膜电容器，其包括（a）下电极，（b）在其中埋设下电极并形成有到达下电极的通孔形成的绝缘层，（c）形成在内侧壁上的电介质层的通孔，并且覆盖下电极的暴露表面，以及（d）由电介质层包围的上电极。根据薄膜电容器，上电极被形成为埋在形成在下电极上的通孔中。因此，可以防止上下电极之间的短路，以及薄膜电容器的制造时的电介质层的劣化，这两者都提高了电容器的可靠性。此外，可以容易地在薄膜电容器上制造多层布线结构。

2. 发明授权

US07696007B2 Semiconductor package board using a metal base 有权
标题翻译：半导体封装板采用金属底座
公开(公告)号：US07696007B2
公开(公告)日：2010-04-13
申请号：US12390708
申请日：2009-02-23
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.
摘要翻译：用于安装半导体芯片的半导体封装板包括具有用于在其中接收半导体芯片的开口的金属基体和层叠在金属基底上的多层布线膜。将半导体芯片倒装芯片接合到设置在开口内的多层布线膜上的金属焊盘上。金属基体的表面与容纳在开口中的半导体芯片的顶表面齐平。所得的半导体器件在不使用加强件的情况下具有较大数量的外部引脚和较小的变形。

3. 发明申请

US20090162974A1 SEMICONDUCTOR PACKAGE BOARD USING A METAL BASE 有权
标题翻译：使用金属基底的半导体封装板
公开(公告)号：US20090162974A1
公开(公告)日：2009-06-25
申请号：US12390708
申请日：2009-02-23
申请人： Katsumi KIKUCHI , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi KIKUCHI , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/50 , C23F1/00
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.
摘要翻译：用于安装半导体芯片的半导体封装板包括具有用于在其中接收半导体芯片的开口的金属基体和层叠在金属基底上的多层布线膜。将半导体芯片倒装芯片接合到设置在开口内的多层布线膜上的金属焊盘上。金属基体的表面与容纳在开口中的半导体芯片的顶表面齐平。所得的半导体器件在不使用加强件的情况下具有较大数量的外部引脚和较小的变形。

4. 发明申请

US20050130413A1 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device 有权
标题翻译：用于承载半导体器件的互连衬底，其制造方法和半导体器件的封装
公开(公告)号：US20050130413A1
公开(公告)日：2005-06-16
申请号：US10997986
申请日：2004-11-29
申请人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
发明人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/48 , H01L23/498 , H05K1/11 , H05K3/20 , H05K3/46 , H01L21/4763
CPC分类号： H05K3/20 , H01L21/4857 , H01L23/49822 , H01L23/49838 , H01L2221/68345 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H05K1/112 , H05K3/4644
摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.
摘要翻译：一种用于承载半导体器件的互连衬底，包括：绝缘层; 在所述绝缘层的正面上设置的布线; 设置在绝缘层的背面侧的电极，其形成方式至少使电极的正面的侧面全部与绝缘层接触，同时至少电极的反面不与所述绝缘层接触; 通孔导体，其设置在所述电极的正面上并形成在所述绝缘层中，以将所述电极与所述互连件连接; 以及在绝缘层的表面上的支撑结构。

5. 发明申请

US20050098875A1 Semiconductor package board using a metal base 审中-公开
公开(公告)号：US20050098875A1
公开(公告)日：2005-05-12
申请号：US11002248
申请日：2004-12-03
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/60 , H01L23/498 , H01L23/538 , H05K3/00 , H05K3/06 , H05K3/20 , H05K3/40 , H05K3/44 , H05K3/46 , H01L23/053 , H01L23/48
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

6. 发明授权

US07338884B2 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device 有权
标题翻译：用于承载半导体器件的互连衬底，其制造方法和半导体器件的封装
公开(公告)号：US07338884B2
公开(公告)日：2008-03-04
申请号：US10997986
申请日：2004-11-29
申请人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
发明人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/00 , H01L21/76 , H01L21/30 , H01L21/4763 , H01L21/44 , H01L29/40
CPC分类号： H05K3/20 , H01L21/4857 , H01L23/49822 , H01L23/49838 , H01L2221/68345 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H05K1/112 , H05K3/4644
摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.
摘要翻译：一种用于承载半导体器件的互连衬底，包括：绝缘层; 在所述绝缘层的正面上设置的布线; 设置在绝缘层的背面侧的电极，其形成方式至少使电极的正面的侧面全部与绝缘层接触，同时至少电极的反面不与所述绝缘层接触; 通孔导体，其设置在所述电极的正面上并形成在所述绝缘层中，以将所述电极与所述互连件连接; 以及在绝缘层的表面上的支撑结构。

7. 发明授权

US06861757B2 Interconnecting substrate for carrying semiconductor device, method of producing thereof and package of semiconductor device 有权
公开(公告)号：US06861757B2
公开(公告)日：2005-03-01
申请号：US10097843
申请日：2002-03-15
申请人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
发明人： Tadanori Shimoto , Katsumi Kikuchi , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/48 , H01L23/498 , H05K1/11 , H05K3/20 , H05K3/46 , H01L23/48 , H01L29/40
CPC分类号： H05K3/20 , H01L21/4857 , H01L23/49822 , H01L23/49838 , H01L2221/68345 , H01L2224/05571 , H01L2224/05573 , H01L2224/16 , H01L2924/01019 , H01L2924/01078 , H01L2924/01079 , H05K1/112 , H05K3/4644
摘要： An interconnecting substrate for carrying a semiconductor device, comprising: an insulating layer; an interconnection set on an obverse surface of the insulating layer; an electrode which is set on a reverse surface side of the insulating layer and formed in such a way that, at least, a lateral face of an obverse end of the electrode is all round brought into contact with the insulating layer, while, at least, a reverse surface of the electrode is not in contact with said insulating layer; a via conductor which is disposed on an obverse surface of the electrode and formed in the insulating layer so as to connect this electrode with the interconnection; and a supporting structure on the surface of the insulating layer.

8. 发明授权

US07585699B2 Semiconductor package board using a metal base 有权
公开(公告)号：US07585699B2
公开(公告)日：2009-09-08
申请号：US11477111
申请日：2006-06-29
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

9. 发明申请

US20060244137A1 Semiconductor package board using a metal base 有权
公开(公告)号：US20060244137A1
公开(公告)日：2006-11-02
申请号：US11477111
申请日：2006-06-29
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L23/48
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.

10. 发明授权

US06841862B2 Semiconductor package board using a metal base 有权
标题翻译：半导体封装板采用金属底座
公开(公告)号：US06841862B2
公开(公告)日：2005-01-11
申请号：US09894123
申请日：2001-06-29
申请人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
发明人： Katsumi Kikuchi , Tadanori Shimoto , Koji Matsui , Kazuhiro Baba
IPC分类号： H01L21/60 , H01L23/498 , H01L23/538 , H05K3/00 , H05K3/06 , H05K3/20 , H05K3/40 , H05K3/44 , H05K3/46 , H01L23/02 , H05K1/03
CPC分类号： H01L21/4857 , H01L21/6835 , H01L23/49811 , H01L23/49816 , H01L23/49827 , H01L23/49833 , H01L23/5389 , H01L24/19 , H01L24/81 , H01L2224/73204 , H01L2224/81801 , H01L2924/01005 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/0105 , H01L2924/01057 , H01L2924/01073 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01327 , H01L2924/014 , H01L2924/12042 , H01L2924/19041 , H01L2924/19043 , H05K3/0097 , H05K3/06 , H05K3/20 , H05K3/205 , H05K3/4007 , H05K3/44 , H05K3/4644 , H05K3/4682 , H05K2201/0367 , H05K2201/0969 , H05K2203/0323 , H05K2203/0376 , H05K2203/061 , H05K2203/1536 , H01L2924/00
摘要： A semiconductor package board for mounting thereon a semiconductor chip includes a metal base having an opening for receiving therein the semiconductor chip and a multilayer wiring film layered onto the metal base. The semiconductor chip is flip-chip bonded onto the metal pads disposed on the multilayer wiring film within the opening. The surface of the metal base is flush with the top surface of the semiconductor chip received in the opening. The resultant semiconductor device has a larger number of external pins and a smaller deformation without using a stiffener.
摘要翻译：用于安装半导体芯片的半导体封装板包括具有用于在其中接收半导体芯片的开口的金属基体和层叠在金属基底上的多层布线膜。将半导体芯片倒装芯片接合到设置在开口内的多层布线膜上的金属焊盘上。金属基体的表面与容纳在开口中的半导体芯片的顶表面齐平。所得的半导体器件在不使用加强件的情况下具有较大数量的外部引脚和较小的变形。

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