专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06794693B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US06794693B2
公开(公告)日：2004-09-21
申请号：US10408581
申请日：2003-04-08
申请人： Katsumi Kakamu , Atsushi Suzuki , Kiyotaka Tabuchi
发明人： Katsumi Kakamu , Atsushi Suzuki , Kiyotaka Tabuchi
IPC分类号： H01L2348
CPC分类号： H01L21/02167 , H01L21/02129 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/28123 , H01L21/312 , H01L21/3127 , H01L21/3148 , H01L21/76828 , H01L21/76829 , H01L21/76835 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L29/78 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.
摘要翻译：在MOS晶体管的一段时间内的阈值电压变化和漏极饱和电流的劣化通过在插头表面上提供用作层间蚀刻停止层的可渗透绝缘膜来防止，可以由低介电常数有机绝缘膜制成的绝缘膜。

2. 发明申请

US20050012122A1 Semiconductor device and manufacturing method thereof 审中-公开
标题翻译：半导体装置及其制造方法
公开(公告)号：US20050012122A1
公开(公告)日：2005-01-20
申请号：US10920209
申请日：2004-08-18
申请人： Katsumi Kakamu , Atsushi Suzuki , Kiyotaka Tabuchi
发明人： Katsumi Kakamu , Atsushi Suzuki , Kiyotaka Tabuchi
IPC分类号： H01L21/28 , H01L21/312 , H01L21/314 , H01L21/336 , H01L21/768 , H01L23/522 , H01L23/532 , H01L29/78 , H01L29/80
CPC分类号： H01L21/02167 , H01L21/02129 , H01L21/022 , H01L21/02211 , H01L21/02274 , H01L21/28123 , H01L21/312 , H01L21/3127 , H01L21/3148 , H01L21/76828 , H01L21/76829 , H01L21/76835 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L29/78 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A threshold voltage change and degradation of the drain saturation current over a period of time of a MOS transistor are prevented by providing a permeable insulating film that serves as an inter-layer etching stopper layer on the surface of a plug, and an inter-layer insulating film that can be made from a low dielectric constant organic insulating film.
摘要翻译：在MOS晶体管的一段时间内的阈值电压变化和漏极饱和电流的劣化通过在插头表面上提供用作层间蚀刻停止层的可渗透绝缘膜来防止，可以由低介电常数有机绝缘膜制成的绝缘膜。

3. 发明申请

US20090149031A1 Method of making a semiconductor device with residual amine group free multilayer interconnection 审中-公开
标题翻译：制备具有残留的无胺基多层互连的半导体器件的方法
公开(公告)号：US20090149031A1
公开(公告)日：2009-06-11
申请号：US12289227
申请日：2008-10-23
申请人： Katsumi Kakamu , Hirofumi Watatani , Masanobu Ikeda
发明人： Katsumi Kakamu , Hirofumi Watatani , Masanobu Ikeda
IPC分类号： H01L21/31 , H01L21/02
CPC分类号： H01L21/76808 , H01L21/02126 , H01L21/02129 , H01L21/02167 , H01L21/022 , H01L21/02203 , H01L21/31144 , H01L21/31612 , H01L21/3185 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： The present invention provides a semiconductor device that can restrict the dissolution hindering phenomenon in a chemically amplified resist film. More specifically, after the formation of a contact pattern on a semiconductor substrate, a wiring pattern is formed on the contact pattern. A SiC film, a first SiOC film, a SiC film, a second SiOC film, a USG film as a diffusion preventing film, and a silicon nitride film as a reflection preventing film, are formed on the wiring pattern. A dual damascene structure is then formed using the chemically amplified resist film and another chemically amplified resist film. In this manner, the N2 gas generated during the formation of the silicon nitride film as a reflection preventing film can be prevented from diffusing into the second SiOC film formed under the silicon nitride film. Accordingly, the reaction of the N2 gas with the H group contained in the second SiOC film and the generation of an amine group such as NH in the second SiOC film can be prevented. Thus, the dissolution hindering phenomenon in the chemically amplified resist film can be avoided.
摘要翻译：本发明提供一种可以限制化学放大抗蚀剂膜中的溶解阻碍现象的半导体器件。更具体地，在半导体衬底上形成接触图案之后，在接触图案上形成布线图案。在布线图案上形成SiC膜，第一SiOC膜，SiC膜，第二SiOC膜，作为扩散防止膜的USG膜和作为防反射膜的氮化硅膜。然后使用化学放大抗蚀剂膜和另一种化学放大抗蚀剂膜形成双镶嵌结构。以这种方式，可以防止在形成作为反射防止膜的氮化硅膜形成期间产生的N 2气体扩散到在氮化硅膜下形成的第二SiOC膜中。因此，可以防止在第二SiOC膜中包含的N 2气体与H基团的反应，并且可以防止在第二SiOC膜中产生诸如NH的胺基团。因此，可以避免化学放大抗蚀剂膜中的溶解阻碍现象。

4. 发明授权

US06777323B2 Lamination structure with copper wiring and its manufacture method 失效
标题翻译：铜布复合结构及其制造方法
公开(公告)号：US06777323B2
公开(公告)日：2004-08-17
申请号：US10287513
申请日：2002-11-05
申请人： Katsumi Kakamu
发明人： Katsumi Kakamu
IPC分类号： H01L214763
CPC分类号： H01L21/76886 , H01L21/31116 , H01L21/76801 , H01L21/76811 , H01L21/76813 , H01L21/76849 , H01L21/76867 , H01L21/76883 , H01L2924/0002 , H01L2924/00
摘要： A substrate is prepared whose surface has a partial area exposing an insulating material containing fluorine and at least a partial area in the other area exposing a conductive material containing copper as a main composition. The surface of the substrate is exposed to hydrogen plasma to clean the surface. A first insulating film made of insulating material is formed on the cleaned surface. It is possible to form a lamination structure having a fluorine-doped interlayer insulating film hard to be peeled off.
摘要翻译：制备其表面具有暴露包含氟的绝缘材料的部分区域和在另一区域中的至少部分区域暴露包含铜作为主要组成的导电材料的衬底。将基板的表面暴露于氢等离子体以清洁表面。在清洁表面上形成由绝缘材料制成的第一绝缘膜。可以形成具有难以剥离的氟掺杂层间绝缘膜的层叠结构。

5. 发明授权

US06211570B1 Semiconductor device having a multilayer interconnection structure 有权
公开(公告)号：US06211570B1
公开(公告)日：2001-04-03
申请号：US09383203
申请日：1999-08-26
申请人： Katsumi Kakamu
发明人： Katsumi Kakamu
IPC分类号： H01L2348
CPC分类号： H01L21/76835 , H01L21/02131 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/31629 , H01L21/76801 , H01L21/76807 , H01L21/76832 , H01L21/76834 , H01L23/5329 , H01L27/10882 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes a F-doped interlayer insulation film and a high-refractive index insulation film having a refractive index higher than a refractive index of the F-doped interlayer insulation film, such that the high-refractive index insulation film is disposed at least one of a top side and a bottom side of the F-doped interlayer insulation film.

6. 发明授权

US07030498B2 Semiconductor device with copper wirings having improved negative bias temperature instability (NBTI) 有权
标题翻译：具有改善的负偏置温度不稳定性（NBTI）的具有铜布线的半导体器件
公开(公告)号：US07030498B2
公开(公告)日：2006-04-18
申请号：US10943910
申请日：2004-09-20
申请人： Katsumi Kakamu , Yoshihiro Takao
发明人： Katsumi Kakamu , Yoshihiro Takao
IPC分类号： H01L27/108 , H01L21/00 , H01L27/10 , H01L23/52
CPC分类号： H01L21/76843 , H01L21/28202 , H01L21/76807 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/823871 , H01L23/53238 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.
摘要翻译：具有p沟道MOS晶体管的半导体器件具有：含氮氧化硅的栅极绝缘膜; 含硼硅的栅电极; 包括氧化硅的栅电极的侧壁上的侧壁间隔物; 具有平坦化表面的层间绝缘膜; 布线沟槽和形成在层间绝缘膜中的接触通孔; 包括下层阻挡层和上层铜区域的铜布线图案，并填充在布线沟槽中; 以及覆盖铜布线图案的碳化硅层。半导体器件具有能够抑制NBTI劣化的晶体管结构。

7. 发明授权

US06885105B2 Semiconductor device with copper wirings 有权
标题翻译：带铜线的半导体器件
公开(公告)号：US06885105B2
公开(公告)日：2005-04-26
申请号：US10265764
申请日：2002-10-08
申请人： Katsumi Kakamu , Yoshihiro Takao
发明人： Katsumi Kakamu , Yoshihiro Takao
IPC分类号： H01L21/28 , H01L21/768 , H01L21/8234 , H01L23/532 , H01L27/088 , H01L29/78 , H01L29/40 , H01L21/90
CPC分类号： H01L21/76843 , H01L21/28202 , H01L21/76807 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/823871 , H01L23/53238 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.
摘要翻译：具有p沟道MOS晶体管的半导体器件具有：含氮氧化硅的栅极绝缘膜; 含硼硅的栅电极; 包括氧化硅的栅电极的侧壁上的侧壁间隔物; 具有平坦化表面的层间绝缘膜; 布线沟槽和形成在层间绝缘膜中的接触通孔; 包括下层阻挡层和上层铜区域的铜布线图案，并填充在布线沟槽中; 以及覆盖铜布线图案的碳化硅层。半导体器件具有能够抑制NBTI劣化的晶体管结构。

8. 发明授权

US06878619B2 Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US06878619B2
公开(公告)日：2005-04-12
申请号：US10341430
申请日：2003-01-14
申请人： Katsumi Kakamu
发明人： Katsumi Kakamu
IPC分类号： H01L21/3205 , H01L21/027 , H01L21/033 , H01L21/311 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/31144 , H01L21/0276 , H01L21/0332 , H01L21/31116 , H01L21/76813
摘要： The method comprises the steps of sequentially forming a USG film 32, an SiN film 34, a USG film 36, a carbon film 50 and an anti-reflection coating 52 for protecting the carbon film 50 from ashing, forming a resist film 56 with openings in prescribed regions on the anti-reflection coating 52, etching the anti-reflection film 52 and the carbon film 50 with the resist film 56 as a mask, removing the resist film by ashing, and anisotropically etching the USG films 36, 32 with the carbon film 50 as a hard mask. Accordingly, the insulation film can be etched at a high selective ratio, and the increase of dimensions of a pattern of the mask with respect to dimension of a pattern of the resist film used in the patterning can be suppressed.
摘要翻译：该方法包括以下步骤：顺序地形成USG膜32，SiN膜34，USG膜36，碳膜50和用于保护碳膜50免于灰化的抗反射涂层52，形成具有开口的抗蚀剂膜56 在防反射涂层52上的规定区域中，用抗蚀剂膜56作为掩模蚀刻抗反射膜52和碳膜50，通过灰化去除抗蚀剂膜，并且用各向异性蚀刻USG膜36,32 碳膜50作为硬掩模。因此，可以以高选择比蚀刻绝缘膜，并且可以抑制掩模图案相对于在图案化中使用的抗蚀剂膜的图案的尺寸的增加。

9. 发明申请

US20050029671A1 Semiconductor device with copper wirings 有权
公开(公告)号：US20050029671A1
公开(公告)日：2005-02-10
申请号：US10943910
申请日：2004-09-20
申请人： Katsumi Kakamu , Yoshihiro Takao
发明人： Katsumi Kakamu , Yoshihiro Takao
IPC分类号： H01L21/28 , H01L21/768 , H01L21/8234 , H01L23/532 , H01L27/088 , H01L29/78 , H01L23/52
CPC分类号： H01L21/76843 , H01L21/28202 , H01L21/76807 , H01L21/76828 , H01L21/76834 , H01L21/76846 , H01L21/823871 , H01L23/53238 , H01L29/518 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device with p-channel MOS transistor having: a gate insulating film of nitrogen-containing silicon oxide; a gate electrode of boron-containing silicon; side wall spacers on side walls of the gate electrode, comprising silicon oxide; an interlayer insulating film having a planarized surface; a wiring trench and a contact via hole formed in the interlayer insulating film; a copper wiring pattern including an underlying barrier layer and an upper level copper region, and filled in the wiring trench; and a silicon carbide layer covering the copper wiring pattern. A semiconductor device has the transistor structure capable of suppressing NBTI deterioration.

10. 发明授权

US06455444B2 Semiconductor device having a multilayer interconnection structure 有权
标题翻译：具有多层互连结构的半导体器件
公开(公告)号：US06455444B2
公开(公告)日：2002-09-24
申请号：US09773594
申请日：2001-02-02
申请人： Katsumi Kakamu
发明人： Katsumi Kakamu
IPC分类号： H01L21469
CPC分类号： H01L21/76835 , H01L21/02131 , H01L21/02211 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/31629 , H01L21/76801 , H01L21/76807 , H01L21/76832 , H01L21/76834 , H01L23/5329 , H01L27/10882 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A semiconductor device includes a F-doped interlayer insulation film and a high-refractive index insulation film having a refractive index higher than a refractive index of the F-doped interlayer insulation film, such that the high-refractive index insulation film is disposed at least one of a top side and a bottom side of the F-doped interlayer insulation film.
摘要翻译：半导体器件包括F掺杂层间绝缘膜和折射率高于掺杂F的层间绝缘膜的折射率的高折射率绝缘膜，使得高折射率绝缘膜至少设置 F掺杂层间绝缘膜的顶侧和底侧之一。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式