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1. 发明申请

US20070035532A1 BACKPLANES FOR DISPLAY APPLICATIONS, AND COMPONENTS FOR USE THEREIN 有权
标题翻译：显示应用的背板及其使用的组件
公开(公告)号：US20070035532A1
公开(公告)日：2007-02-15
申请号：US11461255
申请日：2006-07-31
申请人： Karl Amundson , Yu Chen , Kevin Denis , Paul Drzaic , Peter Kazlas , Andrew Ritenour
发明人： Karl Amundson , Yu Chen , Kevin Denis , Paul Drzaic , Peter Kazlas , Andrew Ritenour
IPC分类号： G09G5/00
CPC分类号： H01L27/12 , G09G3/2011 , G09G3/344 , G09G2300/043 , G09G2310/0262 , G09G2310/027 , G09G2310/0297 , G09G2320/0209 , H01L27/124 , H01L27/1285 , H01L27/1292 , H01L29/41733 , H01L29/42384
摘要： A thin-film transistor includes a gate electrode having a first gate electrode edge and a second gate electrode edge opposite the first gate electrode edge. The TFT also includes a drain electrode having a first drain electrode edge that overlaps the first gate electrode edge, and a second drain electrode edge that overlaps the second gate electrode edge. A method for fabricating a diode array for use in a display includes deposition of a conductive layer adjacent to a substrate, deposition of a doped semiconductor layer adjacent to the substrate, and deposition of an undoped semiconductor layer adjacent to the substrate. A display pixel unit provides reduced capacitative coupling between a pixel electrode and a source line. The unit includes a transistor, the pixel electrode, and the source line. The source line includes an extension that provides a source for the transistor. A patterned conductive portion is disposed adjacent to the source line. Another display pixel unit provides reduced pixel electrode voltage shifts. The unit includes a transistor, a pixel electrode, a source line and a balance line. The invention also provides a driver for driving a display provided with such a balance line.
摘要翻译：薄膜晶体管包括具有第一栅电极边缘和与第一栅电极边缘相对的第二栅电极边缘的栅电极。 TFT还包括具有与第一栅电极边缘重叠的第一漏电极边缘和与第二栅极边缘重叠的第二漏电极边缘的漏电极。用于制造用于显示器的二极管阵列的方法包括：与衬底相邻的导电层的沉积，与衬底相邻的掺杂半导体层的沉积以及与衬底相邻的未掺杂的半导体层的沉积。显示像素单元在像素电极和源极线之间提供减小的电容耦合。该单元包括晶体管，像素电极和源极线。源极线包括提供晶体管源极的扩展。图案化导电部分邻近源极线设置。另一显示像素单元提供减小的像素电极电压偏移。该单元包括晶体管，像素电极，源极线和平衡线。本发明还提供一种用于驱动具有这种平衡线的显示器的驱动器。

2. 发明申请

US20060223282A1 PROCESSES FOR FORMING BACKPLANES FOR ELECTRO-OPTIC DISPLAYS 失效
公开(公告)号：US20060223282A1
公开(公告)日：2006-10-05
申请号：US11424258
申请日：2006-06-15
申请人： Karl Amundson , Guy Danner , Gregg Duthaler , Peter Kazlas , Yu Chen , Kevin Denis , Nathan Kane , Andrew Ritenour
发明人： Karl Amundson , Guy Danner , Gregg Duthaler , Peter Kazlas , Yu Chen , Kevin Denis , Nathan Kane , Andrew Ritenour
IPC分类号： H01L21/30
CPC分类号： H01L27/1266 , B60C23/04 , G02F1/133305 , G02F1/1362 , G02F1/167 , G02F2001/13613 , H01L27/1214 , H01L27/1288 , H01L29/66765 , H01L29/78603
摘要： A non-linear element is formed on a flexible substrate by securing the substrate to a rigid carrier, forming the non-linear element, and then separating the flexible substrate from the carrier. The process allows flexible substrates to be processed in a conventional fab intended to process rigid substrates. In a second method, a transistor is formed on a insulating substrate by forming gate electrodes, depositing a dielectric layer, a semiconductor layer and a conductive layer, patterning the conductive layer to form source, drain and pixel electrodes, covering the channel region of the resultant transistor with an etch-resistant material and etching using the etch-resistant material and the conductive layer as a mask, the etching extending substantially through the semiconductor layer between adjacent transistors. The invention also provides a process for forming a diode on a substrate by depositing on the substrate a first conductive layer, and a second patterned conductive layer and a patterned dielectric layer over parts of the first conductive layer, and etching the first conductive layer using the second conductive layer and dielectric layer as an etch mask. Finally, the invention provides a process for driving an impulse-sensitive electro-optic display.

3. 发明申请

US20050067656A1 Process for fabricating thin film transistors 有权
标题翻译：制造薄膜晶体管的工艺
公开(公告)号：US20050067656A1
公开(公告)日：2005-03-31
申请号：US10919657
申请日：2004-08-17
申请人： Kevin Denis , Yu Chen , Paul Drzaic , Joseph Jacobson , Peter Kazlas
发明人： Kevin Denis , Yu Chen , Paul Drzaic , Joseph Jacobson , Peter Kazlas
IPC分类号： H01L21/336 , H01L29/786 , H01L21/00 , H01L21/84 , H01L27/01 , H01L27/12 , H01L31/0392
CPC分类号： H01L29/66765 , H01L29/78603
摘要： Transistors are formed by depositing at least one layer of semiconductor material on a substrate comprising a polyphenylene polyimide. The substrate permits the use of processing temperatures in excess of 300° C. during the processes used to form the transistors, thus allowing the formation of high quality silicon semiconductor layers. The substrate also has a low coefficient of thermal expansion, which closely matches that of silicon, thus reducing any tendency for a silicon layer to crack or delaminate.
摘要翻译：晶体管通过在包含聚亚苯基聚酰亚胺的衬底上沉积至少一层半导体材料形成。在用于形成晶体管的工艺期间，衬底允许使用超过300℃的处理温度，从而允许形成高质量的硅半导体层。该基板也具有低的热膨胀系数，其与硅的热膨胀系数非常接近，从而减少硅层破裂或分层的任何趋势。

4. 发明申请

US20050223812A1 Non-contacting crack sensor 失效
公开(公告)号：US20050223812A1
公开(公告)日：2005-10-13
申请号：US10822075
申请日：2004-04-12
申请人： Kevin Denis
发明人： Kevin Denis
IPC分类号： G01N3/00 , G01N3/06 , G01N19/08 , G01N29/04 , G01N35/00
CPC分类号： G01M5/0083 , G01M5/0033 , G01N35/00871 , G01N2203/0062 , G01N2203/0617
摘要： A non-contacting sensor based on inductive coupling for detecting failure initiation, and crack propagation in composite materials is disclosed. A very low cost crack sensing transducer or test pattern that can be imbedded into a structural material, interrogated, and powered wirelessly is described. A detection method for interrogating the crack sensor utilizing RF inductive coupling is disclosed. The proposed sensor consists of minimal components resulting in maximum reliability.

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