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1. 发明申请

US20090040850A1 SEMICONDUCTOR MEMORY, TEST METHOD OF SEMICONDUCTOR MEMORY AND SYSTEM 失效
标题翻译：半导体存储器，半导体存储器和系统的测试方法
公开(公告)号：US20090040850A1
公开(公告)日：2009-02-12
申请号：US12130480
申请日：2008-05-30
申请人： Kaoru Mori , Toshikazu Nakamura , Jun Ohno , Masaki Okuda
发明人： Kaoru Mori , Toshikazu Nakamura , Jun Ohno , Masaki Okuda
IPC分类号： G11C29/00 , G11C8/00
CPC分类号： G11C8/18 , G11C11/401 , G11C11/406 , G11C11/40615 , G11C29/1201 , G11C29/18 , G11C29/48 , G11C2029/1802
摘要： An address switch circuit receives a row address signal supplied to a first address terminal group and a column address signal supplied to a second address terminal group. Further, the address switch circuit receives the row address signal supplied to the second address terminal group and thereafter receives the column address signal supplied to the second address terminal group and supplies the received row address signal and the received column address signal to the row decoder and the column decoder during a second operation mode. The number of semiconductor memories that are tested at once can be increased by executing an operation test of the semiconductor memories in the second operation mode. In addition, it becomes possible to test a semiconductor memory using test assets for other semiconductor memories. Consequently, the test efficiency can be improved, and the test cost can be reduced.
摘要翻译：地址开关电路接收提供给第一地址端子组的行地址信号和提供给第二地址端子组的列地址信号。此外，地址开关电路接收提供给第二地址端子组的行地址信号，然后接收提供给第二地址端子组的列地址信号，并将接收到的行地址信号和接收的列地址信号提供给行解码器，列解码器在第二操作模式期间。可以通过在第二操作模式下执行半导体存储器的操作测试来增加一次测试的半导体存储器的数量。此外，可以使用用于其他半导体存储器的测试资产来测试半导体存储器。因此，可以提高测试效率，并且可以降低测试成本。

2. 发明授权

US07675773B2 Semiconductor memory, test method of semiconductor memory and system 失效
标题翻译：半导体存储器，半导体存储器和系统的测试方法
公开(公告)号：US07675773B2
公开(公告)日：2010-03-09
申请号：US12130480
申请日：2008-05-30
申请人： Kaoru Mori , Toshikazu Nakamura , Jun Ohno , Masaki Okuda
发明人： Kaoru Mori , Toshikazu Nakamura , Jun Ohno , Masaki Okuda
IPC分类号： G11C11/34
CPC分类号： G11C8/18 , G11C11/401 , G11C11/406 , G11C11/40615 , G11C29/1201 , G11C29/18 , G11C29/48 , G11C2029/1802
摘要： An address switch circuit receives a row address signal supplied to a first address terminal group and a column address signal supplied to a second address terminal group. Further, the address switch circuit receives the row address signal supplied to the second address terminal group and thereafter receives the column address signal supplied to the second address terminal group and supplies the received row address signal and the received column address signal to the row decoder and the column decoder during a second operation mode. The number of semiconductor memories that are tested at once can be increased by executing an operation test of the semiconductor memories in the second operation mode. In addition, it becomes possible to test a semiconductor memory using test assets for other semiconductor memories. Consequently, the test efficiency can be improved, and the test cost can be reduced.
摘要翻译：地址开关电路接收提供给第一地址端子组的行地址信号和提供给第二地址端子组的列地址信号。此外，地址开关电路接收提供给第二地址端子组的行地址信号，然后接收提供给第二地址端子组的列地址信号，并将接收到的行地址信号和接收的列地址信号提供给行解码器，列解码器在第二操作模式期间。可以通过在第二操作模式中执行半导体存储器的操作测试来增加一次测试的半导体存储器的数量。此外，可以使用用于其他半导体存储器的测试资产来测试半导体存储器。因此，可以提高测试效率，并且可以降低测试成本。

3. 发明申请

US20060098523A1 Semiconductor memory device capable of driving non-selected word lines to first and second potentials 失效
标题翻译：能够将未选择的字线驱动到第一和第二电位的半导体存储器件
公开(公告)号：US20060098523A1
公开(公告)日：2006-05-11
申请号：US11313963
申请日：2005-12-22
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C8/00
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.
摘要翻译：半导体器件包括字线驱动电路，用于通过驱动连接到存储单元的字线来重置字线，并且被构造成切换在复位时设置的字线驱动电路的复位电平在诸如地电位的第一电位和诸如负电位的第二电位之间的字线的操作。此外，包括通过布置多个存储单元形成的存储单元阵列和用于产生负电位的字线复位电平发生电路的半导体器件使得可以改变字线复位电平产生电路的电流供应量当通过将字线复位电平产生电路的输出施加到未被选择的字线而将未被选择的字线设置为负电位时，根据操作来改变负电位的电流供给量存储单元阵列。此外，在具有振荡电路和电容器的多个电源电路的半导体装置中，通过由振荡电路输出的振荡信号来驱动电容器，这些电源电路的至少一部分共享振荡电路，不同的电容器由共同的振荡电路输出的振荡信号驱动。

4. 发明授权

US06628564B1 Semiconductor memory device capable of driving non-selected word lines to first and second potentials 有权
标题翻译：能够将未选择的字线驱动到第一和第二电位的半导体存储器件
公开(公告)号：US06628564B1
公开(公告)日：2003-09-30
申请号：US09339855
申请日：1999-06-25
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C808
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit resetting the word line by driving the word line connected to a memory cell and switching a reset level of the word line drive circuit at the time of the reset operation of the word line. Further, a semiconductor device includes a memory cell array formed by arranging a plurality of memory cells and a reset level switch circuit for selecting a first potential or a second potential and supplying the first potential or the second potential to the word line drive circuit.
摘要翻译：半导体器件包括字线驱动电路，通过驱动连接到存储单元的字线并在字线的复位操作时切换字线驱动电路的复位电平来重置字线。此外，半导体器件包括通过布置多个存储单元形成的存储单元阵列和用于选择第一电位或第二电位的复位电平开关电路，并将第一电位或第二电位提供给字线驱动电路。

5. 发明申请

US20100321983A1 SEMICONDUCTOR MEMORY DEVICE CAPABLE OF DRIVING NON-SELECTED WORD LINES TO FIRST AND SECOND POTENTIALS 审中-公开
标题翻译：能够驱动非选定字线的第一和第二电位的半导体存储器件
公开(公告)号：US20100321983A1
公开(公告)日：2010-12-23
申请号：US12718819
申请日：2010-03-05
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C11/24 , G11C5/14
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.
摘要翻译：半导体器件包括字线驱动电路，用于通过驱动连接到存储单元的字线来重置字线，并且被构造成切换在复位时设置的字线驱动电路的复位电平在诸如地电位的第一电位和诸如负电位的第二电位之间的字线的操作。此外，包括通过布置多个存储单元形成的存储单元阵列和用于产生负电位的字线复位电平发生电路的半导体器件使得可以改变字线复位电平产生电路的电流供应量当通过将字线复位电平产生电路的输出施加到未被选择的字线而将未被选择的字线设置为负电位时，根据操作来改变负电位的电流供给量存储单元阵列。此外，在具有振荡电路和电容器的多个电源电路的半导体装置中，通过由振荡电路输出的振荡信号来驱动电容器，这些电源电路的至少一部分共享振荡电路，不同的电容器由共同的振荡电路输出的振荡信号驱动。

6. 发明授权

US07079443B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07079443B2
公开(公告)日：2006-07-18
申请号：US10631752
申请日：2003-08-01
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C8/08
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.
摘要翻译：半导体器件包括字线驱动电路，用于通过驱动连接到存储单元的字线来重置字线，并且被构造成切换在复位时设置的字线驱动电路的复位电平在诸如地电位的第一电位和诸如负电位的第二电位之间的字线的操作。此外，包括通过布置多个存储单元形成的存储单元阵列和用于产生负电位的字线复位电平发生电路的半导体器件使得可以改变字线复位电平产生电路的电流供应量当通过将字线复位电平产生电路的输出施加到未被选择的字线而将未被选择的字线设置为负电位时，根据操作来改变负电位的电流供给量存储单元阵列。此外，在具有振荡电路和电容器的多个电源电路的半导体装置中，通过由振荡电路输出的振荡信号来驱动电容器，这些电源电路的至少一部分共享振荡电路，不同的电容器由共同的振荡电路输出的振荡信号驱动。

7. 发明授权

US07688659B2 Semiconductor memory capable of testing a failure before programming a fuse circuit and method thereof 失效
标题翻译：在对熔丝电路编程之前能够测试故障的半导体存储器及其方法
公开(公告)号：US07688659B2
公开(公告)日：2010-03-30
申请号：US12127161
申请日：2008-05-27
申请人： Kaoru Mori , Jun Ohno , Hiroyuki Kobayashi
发明人： Kaoru Mori , Jun Ohno , Hiroyuki Kobayashi
IPC分类号： G11C29/00
CPC分类号： G11C29/26 , G11C7/1045 , G11C11/401 , G11C29/02 , G11C29/025 , G11C2029/5006 , G11C2029/5602
摘要： Each program circuit outputs an operating specification signal indicating a first or second operating specification according to a program state. Each specification changing circuit is set by a corresponding block selection signal and outputs an operating specification signal indicating a second operating specification. Each timing control circuit changes an output timing of a precharge control signal for a bit line according to the operating specification signal. By the operating specification signal from the specification changing circuit, a failure can be detected in each memory block before programming a program circuit. Thereafter, the failure can be relieved by the program circuit. The output timing of the precharge control signal can be set for each memory block by a block selection signal without wiring a dedicated signal line for setting each specification changing circuit. Accordingly, increase in chip size can be minimized.
摘要翻译：每个程序电路根据程序状态输出指示第一或第二操作规范的操作规范信号。每个规格改变电路由相应的块选择信号设置，并输出指示第二操作规范的操作指定信号。每个定时控制电路根据操作指定信号改变位线的预充电控制信号的输出定时。通过来自规范改变电路的操作规范信号，在对程序电路进行编程之前可以在每个存储器块中检测到故障。此后，程序电路可以解除故障。可以通过块选择信号为每个存储器块设置预充电控制信号的输出定时，而不布线用于设置每个规格改变电路的专用信号线。因此，可以使芯片尺寸的增加最小化。

8. 发明申请

US20100220540A1 SEMICONDUCTOR MEMORY DEVICE CAPABLE OF DRIVING NON-SELECTED WORD LINES TO FIRST AND SECOND POTENTIALS 审中-公开
公开(公告)号：US20100220540A1
公开(公告)日：2010-09-02
申请号：US12718808
申请日：2010-03-05
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device includes a word line drive circuit for resetting the word line by driving the word line connected to a memory cell and is constituted so as to switch a reset level of the word line drive circuit, which is set at the time of the reset operation of the word line, between a first potential such as a ground potential and a second potential such as a negative potential. Further, a semiconductor device including a memory cell array formed by arranging a plurality of memory cells and a word line reset level generating circuit for generating a negative potential makes it possible to vary the amount of a current supply of the word line reset level generating circuit when non-selected word lines are set to a negative potential by applying the output of the word line reset level generating circuit to the non-selected word lines, and varies the amount of the current supply of the negative potential in accordance with the operation of the memory cell array. Furthermore, in a semiconductor device including a plurality of power source circuits each having an oscillation circuit and a capacitor, for driving the capacitor by the oscillation signal outputted by the oscillation circuit, at least a part of these power source circuits shares in common the oscillation circuit, and different capacitors are driven by the oscillation signal outputted from the common oscillation circuit.

9. 发明授权

US07706209B2 Semiconductor memory device capable of driving non-selected word lines to a variable negative potential based on a bank access operation 失效
标题翻译：能够基于银行存取操作将未选字线驱动到可变负电位的半导体存储器件
公开(公告)号：US07706209B2
公开(公告)日：2010-04-27
申请号：US11313963
申请日：2005-12-22
申请人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
发明人： Masato Takita , Masato Matsumiya , Satoshi Eto , Toshikazu Nakamura , Masatomo Hasegawa , Ayako Kitamoto , Kuninori Kawabata , Hideki Kanou , Toru Koga , Yuki Ishii , Shinichi Yamada , Kaoru Mori
IPC分类号： G11C8/08
CPC分类号： G11C5/147 , G11C8/08 , G11C8/12 , G11C11/4074 , G11C11/4085 , G11C2207/2227
摘要： A semiconductor device, including a word line driver for driving a word line connected to a memory cell in a memory cell array and for resetting the word line when the memory cell changes from an activated to a standby state. The reset level of the word line driver is set when resetting of the word line is performed, and may be switched between first and second potentials. A word line reset level generating circuit varies the amount of negative potential current supply in accordance with memory cell array operating conditions. The semiconductor device includes a plurality of power source circuits, each having an oscillation circuit and a capacitor, for driving the capacitor via an oscillation signal outputted by the oscillation circuit. At least some power source circuits share a common oscillation circuit, and different capacitors are driven via the common oscillation signal.
摘要翻译：一种半导体器件，包括用于驱动连接到存储单元阵列中的存储单元的字线的字线驱动器，以及当存储器单元从激活状态变为待机状态时重新设定字线。当执行字线的复位时，字线驱动器的复位电平被设置，并且可以在第一和第二电位之间切换。字线复位电平发生电路根据存储单元阵列工作条件改变负电位电流供给量。半导体器件包括多个电源电路，每个电源电路具有振荡电路和电容器，用于经由振荡电路输出的振荡信号来驱动电容器。至少一些电源电路共用一个共同的振荡电路，而不同的电容通过公共振荡信号驱动。

10. 发明授权

US08111575B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08111575B2
公开(公告)日：2012-02-07
申请号：US12684652
申请日：2010-01-08
申请人： Kaoru Mori , Shinya Fujioka , Yoshitaka Takahashi , Jun Ohno , Akihiro Funyu , Shinichiro Suzuki
发明人： Kaoru Mori , Shinya Fujioka , Yoshitaka Takahashi , Jun Ohno , Akihiro Funyu , Shinichiro Suzuki
IPC分类号： G11C5/14
CPC分类号： G11C7/04 , G11C11/406 , G11C11/40626 , G11C11/4072 , G11C11/4074
摘要： There is provided a semiconductor device including: a temperature sensor detecting temperature; an inner circuit operating when supplied with a power supply voltage from a power supply line; a switch connected between the power supply line and the inner circuit; and a control circuit performing control in which, in a case where the temperature detected by the temperature sensor is higher than a threshold value, the switch is turned on when the inner circuit is in operation and the switch is turned off when the inner circuit is in non-operation, and in a case where the temperature detected by the temperature sensor is lower than the threshold value, the switch is turned on when the inner circuit is in operation and in non-operation.
摘要翻译：提供了一种半导体器件，包括：温度传感器检测温度; 当从电源线供给电源电压时工作的内部电路; 连接在电源线和内部电路之间的开关; 以及控制电路，其进行控制，其中，在由所述温度传感器检测到的温度高于阈值的情况下，当所述内部电路工作时所述开关接通，并且当所述内部电路为在不工作的情况下，并且在由温度传感器检测到的温度低于阈值的情况下，当内部电路运行并且不工作时，开关导通。

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