专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US06907001B1 Packet switch for switching variable length packets in the form of ATM cells 有权
标题翻译：用于以ATM信元的形式切换可变长度分组的分组交换机
公开(公告)号：US06907001B1
公开(公告)日：2005-06-14
申请号：US09262839
申请日：1999-03-05
申请人： Kaori Nakayama , Mitsuhiro Wada , Takayuki Kanno , Nobuyuki Yamamoto , Makoto Matsuoka , Yusho Futami , Takahiko Kozaki
发明人： Kaori Nakayama , Mitsuhiro Wada , Takayuki Kanno , Nobuyuki Yamamoto , Makoto Matsuoka , Yusho Futami , Takahiko Kozaki
IPC分类号： H04Q3/00 , H04J3/14 , H04L12/28 , H04L12/70 , H04L12/801 , H04L12/835 , H04L12/865 , H04L12/911 , H04L12/931 , H04L12/951
CPC分类号： H04L12/5601 , H04L49/608 , H04L2012/5651 , H04L2012/5683
摘要： A packet switch which includes input line interfaces for converting variable length packets received from input lines to fixed length cells, a switch unit for switching said packets in cell units, output line interfaces for converting output cells from the switching unit to variable length packets and transmitting the variable length packets over output lines. Each of the input line interfaces has a cell output controller for queuing the fixed length cells for each output line according to the degree of priority of the cells, and for selectively outputting the stored cells in the queues in order of priority, thereby to suppress the transmission of cells with a low priority during the times of congestion.
摘要翻译：一种分组交换机，包括用于将从输入线路接收的可变长度分组转换为固定长度小区的输入线路接口，用于以小区为单位切换所述分组的交换单元，用于将来自交换单元的输出单元转换为可变长度分组的发送线路接口和发送输出行上的可变长度数据包。每个输入线接口具有单元输出控制器，用于根据单元的优先级将每条输出线的固定长度单元进行排队，并且以优先级顺序选择性地输出队列中存储的单元，从而抑制在拥塞时传输低优先级的小区。

2. 发明授权

US06977941B2 Shared buffer type variable length packet switch 失效
标题翻译：共享缓冲区类型可变长度分组交换机
公开(公告)号：US06977941B2
公开(公告)日：2005-12-20
申请号：US09791791
申请日：2001-02-26
申请人： Masami Takahashi , Akio Makimoto , Takahiko Kozaki , Takayuki Kanno , Yasuo Oginuma , Kaori Nakayama , Mitsuhiro Wada , Norihiko Moriwaki , Masumi Fukano , Yusho Futami
发明人： Masami Takahashi , Akio Makimoto , Takahiko Kozaki , Takayuki Kanno , Yasuo Oginuma , Kaori Nakayama , Mitsuhiro Wada , Norihiko Moriwaki , Masumi Fukano , Yusho Futami
IPC分类号： H04L12/56 , G06F12/00
CPC分类号： H04L49/103 , H04L49/3018 , H04L49/3027 , H04L49/351 , H04L49/40
摘要： A packet switch having a structure of writing a variable length packet received from each of input lines into a shared buffer memory on a fixed length data block unit basis, wherein a buffer controller forms an input queue for each input line and, when the last data block of a variable length packet is registered in the input queue, links a linked address list for the input queue to one or a plurality of output queues corresponding to one or a plurality of packet destination output lines.
摘要翻译：一种分组交换机，具有以固定长度数据块单位为基础将从每个输入线路接收的可变长度分组写入共享缓冲存储器的结构，其中缓冲器控制器为每个输入线路形成输入队列，并且当最后数据可变长度分组的块被登记在输入队列中，将用于输入队列的链接地址列表链接到对应于一个或多个分组目的地输出线的一个或多个输出队列。

3. 发明授权

US06556567B1 Method and system for multiplexing packets 失效
标题翻译：用于复用数据包的方法和系统
公开(公告)号：US06556567B1
公开(公告)日：2003-04-29
申请号：US09265219
申请日：1999-03-01
申请人： Yasuo Murakami , Takaaki Toyama , Masahide Minowa , Nobuyuki Yamamoto , Tetsuo Kano , Yusho Futami , Yoshihiro Sakae
发明人： Yasuo Murakami , Takaaki Toyama , Masahide Minowa , Nobuyuki Yamamoto , Tetsuo Kano , Yusho Futami , Yoshihiro Sakae
IPC分类号： H04L1256
CPC分类号： H04Q11/0478 , H04L2012/561 , H04L2012/5656 , H04L2012/5671 , H04L2012/5672 , H04L2012/5679
摘要： A method and a system for multiplexing voice packets without delay variation even if the number of multiplexed channels is increased, wherein a packet buffering unit receives compressed voice data, and stores voice data groups during voice activity intervals in each channel as talk; a scheduling FIFO block sequentially stores the channel numbers of a predetermined number of multiplexed channels which are read according to priority over the other channels, thereby controlling reading contention. A write decision block controls writing of talk spurts in the buffer areas of the respective channels in a packet buffering unit and also controls writing of the channel numbers in the scheduling FIFO block. A scheduling FIFO controller selects channel numbers from the scheduling FIFO block and a read decision block outputs voice packets by controlling the multiplexing sequence of talk spurts of the selected channel numbers.
摘要翻译：即使增加多路复用通道的数量，也可以不发生延迟变化来复用语音分组的方法和系统，其中分组缓冲单元接收压缩的语音数据，并且在每个频道的语音活动间隔期间将话音数据组存储为通话; 调度FIFO块顺序地存储根据优先级读取的预定数量的多路复用信道的信道数，而不是其他信道，从而控制读取竞争。写入决定块控制在分组缓冲单元中的各个通道的缓冲区中的对话口的写入，并且还控制调度FIFO块中的通道号的写入。调度FIFO控制器从调度FIFO块中选择信道号，并且读取判定块通过控制所选择的信道号的通话流的复用顺序来输出语音分组。

4. 发明授权

US06597696B1 Variable length packet switch 失效
标题翻译：可变长度分组交换机
公开(公告)号：US06597696B1
公开(公告)日：2003-07-22
申请号：US09373594
申请日：1999-08-13
申请人： Takaaki Toyama , Yusho Futami , Yasuo Murakami , Masahide Minowa
发明人： Takaaki Toyama , Yusho Futami , Yasuo Murakami , Masahide Minowa
IPC分类号： H04J324
CPC分类号： H04L12/5601 , H04L2012/5656
摘要： In a variable length switch for exchanging CPS-packets by AAL2, an effective variable length packet switch without limiting capacitance of a switching section is provided when the CPS-packets are loaded on an ATM cell and exchanged. An interface section receives the ATM cell in which the CPS-packets are multiplexed and packed, disassembles the received ATM cell and demultiplexes and unpacks the CPS-packets loaded on the ATM cell. When output paths of the plurality of the CPS-packets are identical, the CPS-packets are transferred by multiplexing and packing them in the same connection. In an interface 110-1 to 110-N on a transmission side, a cell transferred from the switching section 100 is disassembled, and the CPS-packet are multiplexed and packed in a cell corresponding to an output path of the CPS-packets.
摘要翻译：在通过AAL2交换CPS分组的可变长度交换机中，当CPS分组被加载到ATM信元上并被交换时，提供一个不限制切换部分电容的有效可变长度分组交换机。接口部分接收其中CPS分组被复用和打包的ATM信元，分解接收到的ATM信元，并解复用和解包装在ATM信元上的CPS分组。当多个CPS分组的输出路径相同时，CPS分组通过多路复用传输并以相同的连接进行打包。在发送侧的接口110-1〜110-N中，将从切换部100传送的小区分解，并将CPS分组复用并打包在与CPS分组的输出路径对应的小区中。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式