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1. 发明申请

US20080239600A1 LOW TRIGGER VOLTAGE ESD PROTECTION DEVICE 审中-公开
标题翻译：低触发电压ESD保护装置
公开(公告)号：US20080239600A1
公开(公告)日：2008-10-02
申请号：US11695316
申请日：2007-04-02
申请人： Kang-Neng Hsu , Wen-Chih Li , Chien-Hao Huang , Kun-Huang Chang
发明人： Kang-Neng Hsu , Wen-Chih Li , Chien-Hao Huang , Kun-Huang Chang
IPC分类号： H02H9/04
CPC分类号： H05K9/0067 , H01T4/12
摘要： The present invention is an electrostatic discharge protection device having a low trigger voltage. The device can utilize a process of manufacturing a PCB to minimize costs and manufacturing time. The device comprises: a discharge area, which is essentially a space within the device and can be filled by a material having a desired breakdown voltage, and at least two electrode areas, wherein the two electrode areas are substantially electrically isolated from each other and simultaneously adjacent to or within the discharge area. When an electric potential difference between the electrode areas exceeds a predetermined value, a conductive path between the electrode areas will be created by discharging through the discharge area. The device is characterized in that each of the two electrodes is a part of a conductive plate, and the two conductive plates become a part of the device by pressing or adhering so that a gap for electric isolation exists between the two electrode areas.
摘要翻译：本发明是具有低触发电压的静电放电保护装置。该设备可以利用制造PCB的过程来最小化成本和制造时间。该装置包括：放电区域，其基本上是装置内的空间并且可以由具有期望的击穿电压的材料填充，以及至少两个电极区域，其中两个电极区域彼此基本上电隔离并且同时邻近或在放电区域内。当电极区域之间的电位差超过预定值时，将通过放电区域放电来产生电极区域之间的导电路径。该装置的特征在于，两个电极中的每一个是导电板的一部分，并且两个导电板通过按压或粘合而成为器件的一部分，使得在两个电极区域之间存在用于电绝缘的间隙。

2. 发明授权

US07741709B2 Embedded type multifunctional integrated structure for integrating protection components and method for manufacturing the same 失效
标题翻译：用于集成保护元件的嵌入式多功能一体化结构及其制造方法
公开(公告)号：US07741709B2
公开(公告)日：2010-06-22
申请号：US12007284
申请日：2008-01-09
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H01L23/552 , H01L23/02 , H01L23/48 , H01L23/52 , H01L23/04
CPC分类号： H05K3/403 , H05K3/0052 , Y10T29/49169
摘要： An embedded type multifunctional integrated structure for integrating protection components and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrate more than two passive components on a component structure that is adhered onto a substrate and is applied to a USB terminal in order to protect an electronic device that uses the USB. Hence, the present invention has an OCP function, an OVP function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrates two or more passive components in order to increase functionality. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.
摘要翻译：公开了一种用于集成保护部件的嵌入式多功能一体化结构及其制造方法。本发明利用多层设计的概念，将多于两个的无源部件集成在粘附到基板上的部件结构上，并将其应用于USB端子，以保护使用USB的电子设备。因此，本发明同时具有OCP功能，OVP功能和抗ESD功能。因此，为了增加功能，本发明有效地集成了两个或多个无源部件。此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

3. 发明申请

US20070148823A1 Method of manufacturing an electronic protection device 失效
标题翻译：电子保护装置的制造方法
公开(公告)号：US20070148823A1
公开(公告)日：2007-06-28
申请号：US11641830
申请日：2006-12-20
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H01L21/00
CPC分类号： H01C7/021 , H01C1/1406 , H01C17/281
摘要： A method of manufacturing an electronic protection device comprises: providing a substrate mother board with a top surface and a bottom surface; forming a first conductive layer and a second conductive layer on the top surface and the bottom surface, respectively; cutting the substrate mother board into a plurality of strip-shaped substrates; and forming insulating layers on surfaces of each of the strip-shaped substrates that are not covered by the first conductive layer and the second conductive layer.
摘要翻译：一种制造电子保护装置的方法包括：向母板提供顶表面和底表面; 在顶表面和底表面上分别形成第一导电层和第二导电层; 将基板母板切割成多个条形基板; 以及在未被所述第一导电层和所述第二导电层覆盖的所述条形基板的表面上形成绝缘层。

4. 发明授权

US07715164B2 Embedded type multifunctional integrated structure and method for manufacturing the same 失效
标题翻译：嵌入式多功能一体化结构及其制造方法
公开(公告)号：US07715164B2
公开(公告)日：2010-05-11
申请号：US11984559
申请日：2007-11-20
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H02H5/04
CPC分类号： H05K1/0234 , H05K1/0257 , H05K1/0259 , H05K1/141 , H05K1/167 , H05K1/185 , H05K3/3442 , H05K3/4611 , H05K3/4688 , H05K2201/09181 , H05K2201/09309 , H05K2201/10045 , Y10T428/239
摘要： An embedded type multifunctional integrated structure and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrated more than two passive components on a component structure that would be adhered to a substrate. Hence, the embedded type multifunctional integrated structure has an OCP function, an OVP function, an anti-EMI function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrated two or more than one passive components in order to increase function of the embedded type multifunctional integrated structure. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.
摘要翻译：公开了一种嵌入式多功能一体化结构及其制造方法。本发明利用多层设计的概念将多于两个的无源部件集成在将粘附到基板上的部件结构上。因此，嵌入式多功能一体化结构同时具有OCP功能，OVP功能，抗EMI功能和抗ESD功能。因此，为了增加嵌入式多功能一体化结构的功能，本发明有效地集成了两个或多个无源部件。此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

5. 发明授权

US07592203B2 Method of manufacturing an electronic protection device 失效
标题翻译：电子保护装置的制造方法
公开(公告)号：US07592203B2
公开(公告)日：2009-09-22
申请号：US11641830
申请日：2006-12-20
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H01L21/00
CPC分类号： H01C7/021 , H01C1/1406 , H01C17/281
摘要： A method of manufacturing an electronic protection device comprises: providing a substrate mother board with a top surface and a bottom surface; forming a first conductive layer and a second conductive layer on the top surface and the bottom surface, respectively; cutting the substrate mother board into a plurality of strip-shaped substrates; and forming insulating layers on surfaces of each of the strip-shaped substrates that are not covered by the first conductive layer and the second conductive layer.
摘要翻译：一种制造电子保护装置的方法包括：向母板提供顶表面和底表面; 在顶表面和底表面上分别形成第一导电层和第二导电层; 将基板母板切割成多个条形基板; 以及在未被所述第一导电层和所述第二导电层覆盖的所述条形基板的表面上形成绝缘层。

6. 发明申请

US20070037322A1 End electrode structure of a surface-mounted resettable over-current protection device 审中-公开
标题翻译：表面安装的可复位过电流保护装置的端电极结构
公开(公告)号：US20070037322A1
公开(公告)日：2007-02-15
申请号：US11373787
申请日：2006-03-10
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H01L21/82
CPC分类号： H01C17/28 , H01C1/14
摘要： The present invention relates to an end electrode structure of a surface-mounted resettable over-current protection device. A polymer-based sheet is punched with a mold for manufacturing a plurality of H-shaped through-holes separated at an equal interval, such that several strip-shaped sheets are formed. Then, a first pair of electrodes and a second pair of electrodes are manufactured on each of the strip-shaped sheets through an ordinary through-hole manufacturing process of a printed circuit board. Then, the sheet is divided into several strip-shaped devices, thereby forming several over-current protection devices with five-sided electrodes. Thereby, with the five-sided electrode, the device may be more easily adhered to a circuit board.
摘要翻译：本发明涉及一种表面安装的可重置过电流保护装置的端电极结构。聚合物基片材用用于制造以相等间隔分开的多个H形通孔的模具冲压，从而形成几个带状片材。然后，通过印刷电路板的普通通孔制造工艺，在每个带状片上制造第一对电极和第二对电极。然后，将片材分割成几个带状装置，从而形成具有五边电极的数个过电流保护装置。因此，利用五面电极，该装置可以更容易地粘附到电路板。

7. 发明申请

US20090174974A1 Embedded type multifunctional integrated structure for integrating protection components and method for manufacturing the same 失效
标题翻译：用于集成保护元件的嵌入式多功能一体化结构及其制造方法
公开(公告)号：US20090174974A1
公开(公告)日：2009-07-09
申请号：US12007284
申请日：2008-01-09
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： H02H9/00 , H05K3/30
CPC分类号： H05K3/403 , H05K3/0052 , Y10T29/49169
摘要： An embedded type multifunctional integrated structure for integrating protection components and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrate more than two passive components on a component structure that is adhered onto a substrate and is applied to a USB terminal in order to protect an electronic device that uses the USB. Hence, the present invention has an OCP function, an OVP function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrates two or more passive components in order to increase functionality. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.
摘要翻译：公开了一种用于集成保护部件的嵌入式多功能一体化结构及其制造方法。本发明利用多层设计的概念，将多于两个的无源部件集成在粘附到基板上的部件结构上，并将其应用于USB端子，以保护使用USB的电子设备。因此，本发明同时具有OCP功能，OVP功能和抗ESD功能。因此，为了增加功能，本发明有效地集成了两个或多个无源部件。此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

8. 发明申请

US20090130369A1 Embedded type multifunctional integrated structure and method for manufacturing the same 失效
标题翻译：嵌入式多功能一体化结构及其制造方法
公开(公告)号：US20090130369A1
公开(公告)日：2009-05-21
申请号：US11984559
申请日：2007-11-20
申请人： Chien-Hao Huang , Wen-Chih Li
发明人： Chien-Hao Huang , Wen-Chih Li
IPC分类号： B32B5/00 , B05D5/12
CPC分类号： H05K1/0234 , H05K1/0257 , H05K1/0259 , H05K1/141 , H05K1/167 , H05K1/185 , H05K3/3442 , H05K3/4611 , H05K3/4688 , H05K2201/09181 , H05K2201/09309 , H05K2201/10045 , Y10T428/239
摘要： An embedded type multifunctional integrated structure and a method for manufacturing the same are disclosed. The present invention utilizes the concept of multi-layer design to integrated more than two passive components on a component structure that would be adhered to a substrate. Hence, the embedded type multifunctional integrated structure has an OCP function, an OVP function, an anti-EMI function, and an anti-ESD function at the same time. Therefore, the present invention effectively integrated two or more than one passive components in order to increase function of the embedded type multifunctional integrated structure. Moreover, the present invention effectively reduces the size of the passive components on a PCB and reduces the number of solder joints.
摘要翻译：公开了一种嵌入式多功能一体化结构及其制造方法。本发明利用多层设计的概念将多于两个的无源部件集成在将粘附到基板上的部件结构上。因此，嵌入式多功能一体化结构同时具有OCP功能，OVP功能，抗EMI功能和抗ESD功能。因此，为了增加嵌入式多功能一体化结构的功能，本发明有效地集成了两个或多个无源部件。此外，本发明有效地减小了PCB上的无源部件的尺寸，并且减少了焊点的数量。

9. 发明申请

US20140315358A1 MANUFACTURING METHOD OF JUNCTION FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：连接场效应晶体管的制造方法
公开(公告)号：US20140315358A1
公开(公告)日：2014-10-23
申请号：US13866766
申请日：2013-04-19
申请人： Tsung-Yi Huang , Chien-Hao Huang
发明人： Tsung-Yi Huang , Chien-Hao Huang
IPC分类号： H01L29/66
CPC分类号： H01L29/66893 , H01L29/0649 , H01L29/0843 , H01L29/66901 , H01L29/808
摘要： The present invention discloses a manufacturing method of a junction field effect transistor (JFET). The manufacturing method includes: providing a substrate with a first conductive type, forming a channel region with a second conductive type, forming a field region with the first conductive type, forming a gate with the first conductive type, forming a source with the second conductive type, forming a drain with the second conductive type, and forming a lightly doped region with the second conductive type. The channel region is formed by an ion implantation process step, wherein the lightly doped region is formed by masking a predetermined region from accelerated ions of the ion implantation process step, and diffusing impurities with the second conductive type nearby the predetermined region into it with a thermal process step.
摘要翻译：本发明公开了一种结型场效应晶体管（JFET）的制造方法。该制造方法包括：提供具有第一导电类型的衬底，形成具有第二导电类型的沟道区，形成具有第一导电类型的场区，形成具有第一导电类型的栅极，形成具有第二导电形成具有第二导电类型的漏极，以及形成具有第二导电类型的轻掺杂区域。沟道区域通过离子注入工艺步骤形成，其中通过从离子注入工艺步骤的加速离子掩蔽预定区域并且将具有第二导电类型的杂质附近的预定区域的杂质扩散到其中以通过离子注入工艺步骤热处理步骤。

10. 发明授权

US08686504B2 Double diffused drain metal oxide semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08686504B2
公开(公告)日：2014-04-01
申请号：US13555163
申请日：2012-07-22
申请人： Tsung-Yi Huang , Chien-Hao Huang
发明人： Tsung-Yi Huang , Chien-Hao Huang
IPC分类号： H01L29/66
CPC分类号： H01L29/78 , H01L21/823412 , H01L21/823418 , H01L27/088 , H01L29/0653 , H01L29/0696 , H01L29/0878 , H01L29/1083 , H01L29/1095 , H01L29/66689 , H01L29/7816
摘要： The present invention discloses a double diffused drain metal oxide semiconductor (DDDMOS) device and a manufacturing method thereof. The DDDMOS device is formed in a substrate, and includes a first well, a gate, a diffusion region, a source, and a drain. A low voltage device is also formed in the substrate, which includes a second well and a lightly doped drain (LDD) region, wherein the first well and the diffusion region are formed by process steps which also form the second well and the LDD region in the low voltage device, respectively.

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