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1. 发明授权

US09704953B2 Semiconductor device 有权
公开(公告)号：US09704953B2
公开(公告)日：2017-07-11
申请号：US14830980
申请日：2015-08-20
申请人： Kabushiki Kaisha Toshiba
发明人： Hiroaki Yamashita , Syotaro Ono , Hideyuki Ura , Masahiro Shimura
IPC分类号： H01L29/06 , H01L29/08 , H01L29/10 , H01L29/66
CPC分类号： H01L29/0696 , H01L29/0634 , H01L29/0688 , H01L29/0878 , H01L29/1095 , H01L29/66712 , H01L29/7802
摘要： According to one embodiment, a semiconductor device includes a plurality of first semiconductor regions of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a gate electrode. An impurity concentration of the second conductivity type of the third semiconductor region is higher than an impurity concentration of the second conductivity type of the second semiconductor regions. The fourth semiconductor region is provided on the first semiconductor regions. The gate electrode provided on the fourth semiconductor region with a gate insulation layer interposed. The gate electrode extends in a third direction. The third direction intersects the first direction. The third direction is parallel to a plane including the first direction and the second direction.

2. 发明申请

US20160254379A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20160254379A1
公开(公告)日：2016-09-01
申请号：US14830980
申请日：2015-08-20
申请人： Kabushiki Kaisha Toshiba
发明人： Hiroaki Yamashita , Syotaro Ono , Hideyuki Ura , Masahiro Shimura
IPC分类号： H01L29/78 , H01L29/36 , H01L29/06
CPC分类号： H01L29/0696 , H01L29/0634 , H01L29/0688 , H01L29/0878 , H01L29/1095 , H01L29/66712 , H01L29/7802
摘要： According to one embodiment, a semiconductor device includes a plurality of first semiconductor regions of a first conductivity type, a plurality of second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a gate electrode. An impurity concentration of the second conductivity type of the third semiconductor region is higher than an impurity concentration of the second conductivity type of the second semiconductor regions. The fourth semiconductor region is provided on the first semiconductor regions. The gate electrode provided on the fourth semiconductor region with a gate insulation layer interposed. The gate electrode extends in a third direction. The third direction intersects the first direction. The third direction is parallel to a plane including the first direction and the second direction.
摘要翻译：根据一个实施例，半导体器件包括多个第一导电类型的第一半导体区域，第二导电类型的多个第二半导体区域，第二导电类型的第三半导体区域，第二导电类型的第四半导体区域导电类型，第一导电类型的第五半导体区域和栅电极。第三半导体区域的第二导电类型的杂质浓度高于第二半导体区域的第二导电类型的杂质浓度。第四半导体区域设置在第一半导体区域上。设置在第四半导体区域上的栅电极具有栅绝缘层。栅电极沿第三方向延伸。第三个方向与第一个方向相交。第三方向平行于包括第一方向和第二方向的平面。

3. 发明授权

US10211331B2 Semiconductor device 有权
公开(公告)号：US10211331B2
公开(公告)日：2019-02-19
申请号：US15252095
申请日：2016-08-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hisao Ichijo , Syotaro Ono , Masahiro Shimura , Hideyuki Ura , Hiroaki Yamashita
IPC分类号： H01L29/739 , H01L29/78 , H01L29/06 , H01L27/06 , H01L49/02
摘要： A semiconductor device includes a first conductivity type first semiconductor region, a second conductivity type second semiconductor region, a second conductivity type third semiconductor region, a first conductivity type fourth semiconductor region, a gate insulating portion, a gate electrode, and first and second electrodes. The first semiconductor region includes first and second portions. The second semiconductor region includes third and fourth portions. The gate electrode is on the gate insulating portion and over the first semiconductor region and a portion of the third semiconductor region. The first electrode is on, and electrically connected to, the fourth semiconductor region. The second electrode is over the first portion, the third portion, and the gate electrode, and spaced from the first electrode.

4. 发明授权

US09496334B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09496334B2
公开(公告)日：2016-11-15
申请号：US14826788
申请日：2015-08-14
申请人： Kabushiki Kaisha Toshiba
发明人： Hiroaki Yamashita , Syotaro Ono , Hideyuki Ura , Masahiro Shimura
IPC分类号： H01L29/06 , H01L29/78 , H01L29/40 , H01L29/10 , H01L29/08
CPC分类号： H01L29/0634 , H01L29/0619 , H01L29/0696 , H01L29/086 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/7397 , H01L29/7813
摘要： A semiconductor device according to an embodiment includes a first semiconductor layer of a first conductivity type, second semiconductor regions of a second conductivity type, a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, a gate electrode, an insulating layer, and a first electrode. The first semiconductor layer includes first semiconductor regions. The second semiconductor regions are provided respectively between the first semiconductor regions. The insulating layer is provided between the gate electrode and the third semiconductor region. The first electrode includes a first portion and a second portion. The first portion is connected to the first semiconductor region. The second portion is provided on the fourth semiconductor region side of the first portion. The first electrode is provided on the first semiconductor region and on the second semiconductor region. The first electrode is provided around the fourth semiconductor region.
摘要翻译：根据实施例的半导体器件包括第一导电类型的第一半导体层，第二导电类型的第二半导体区域，第二导电类型的第三半导体区域，第一导电类型的第四半导体区域，栅极电极绝缘层和第一电极。第一半导体层包括第一半导体区域。第二半导体区域分别设置在第一半导体区域之间。绝缘层设置在栅电极和第三半导体区之间。第一电极包括第一部分和第二部分。第一部分连接到第一半导体区域。第二部分设置在第一部分的第四半导体区域侧。第一电极设置在第一半导体区域和第二半导体区域上。第一电极围绕第四半导体区域设置。

5. 发明申请

US20160035879A1 SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件
公开(公告)号：US20160035879A1
公开(公告)日：2016-02-04
申请号：US14642345
申请日：2015-03-09
申请人： Kabushiki Kaisha Toshiba
发明人： Syotaro Ono , Hideyuki Ura , Masahiro Shimura , Hiroaki Yamashita
IPC分类号： H01L29/78 , H01L29/06 , H01L29/08 , H01L29/36 , H01L29/739 , H01L29/10
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/36 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： In general, according to one embodiment, a semiconductor device includes, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a fourth semiconductor region, a fifth semiconductor region, and a gate electrode. The third semiconductor region includes a first portion and a second portion. The first portion is provided between the second semiconductor regions adjacent to each other. An amount of impurity of the second conductivity type in the first portion is greater than an amount of impurity of the first conductivity type in the second semiconductor region contiguous to the first portion. The second portion is arranged with a part of the first semiconductor region. An amount of impurity of the second conductivity type in the second portion is smaller than an amount of impurity of the first conductivity type in the part of the first semiconductor region.
摘要翻译：通常，根据一个实施例，半导体器件包括第一半导体区域，多个第二半导体区域，多个第三半导体区域，第四半导体区域，第五半导体区域和栅电极。第三半导体区域包括第一部分和第二部分。第一部分设置在彼此相邻的第二半导体区域之间。第一部分中的第二导电类型的杂质的量大于与第一部分相邻的第二半导体区域中的第一导电类型的杂质的量。第二部分布置有第一半导体区域的一部分。第二部分中的第二导电类型的杂质的量小于第一半导体区域的部分中的第一导电类型的杂质的量。

6. 发明授权

US09142627B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09142627B2
公开(公告)日：2015-09-22
申请号：US14473718
申请日：2014-08-29
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Syotaro Ono , Masaru Izumisawa , Hideyuki Ura , Hiroaki Yamashita
IPC分类号： H01L29/66 , H01L29/40 , H01L29/06 , H01L29/423
CPC分类号： H01L29/407 , H01L29/0634 , H01L29/0878 , H01L29/1095 , H01L29/42368 , H01L29/7813
摘要： A semiconductor device includes a first layer of a first conductivity type between a first and a second electrode. A second layer of the first conductivity type is between the first layer and the second electrode. A pair of third layers of a second conductivity type has a first portion in the first layer and a second portion contacting the second layer. A fourth layer is between the second layer and the second electrode and between the third layers and the second electrode. A fifth layer is between the fourth layer and the second electrode. A third electrode is adjacent to the second layer via a first insulating film. A fourth electrode is between the second electrode and the third electrode and adjacent to the fourth semiconductor layer via a second insulating film. The second insulating film is thinner than the first insulating film.
摘要翻译：半导体器件包括在第一和第二电极之间的第一导电类型的第一层。第一导电类型的第二层在第一层和第二电极之间。一对第二导电类型的第三层具有第一层中的第一部分和与第二层接触的第二部分。第四层在第二层和第二电极之间以及第三层和第二电极之间。第五层在第四层和第二电极之间。第三电极经由第一绝缘膜与第二层相邻。第四电极通过第二绝缘膜在第二电极和第三电极之间并且与第四半导体层相邻。第二绝缘膜比第一绝缘膜薄。

7. 发明授权

US10103222B2 Semiconductor device 有权
公开(公告)号：US10103222B2
公开(公告)日：2018-10-16
申请号：US15251726
申请日：2016-08-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hiroaki Katou , Syotaro Ono , Masahiro Shimura , Hideyuki Ura
IPC分类号： H01L29/423 , H01L29/06 , H01L29/10 , H01L29/49 , H01L29/167 , H01L29/739 , H01L29/78
摘要： A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided on a part of the first semiconductor region, a third semiconductor region of the first conductivity type provided on a part of the second semiconductor region, agate electrode, a first electrode, and a conductive portion. The gate electrode is provided on another part of the second semiconductor region via a gate insulating portion. The first electrode is provided on the third semiconductor region and electrically connected to the third semiconductor region. The conductive portion is provided on another part of the first semiconductor region via a first insulating portion and electrically connected to the first electrode, and includes a portion arranged side by side with the gate electrode in a second direction perpendicular to a first direction from the first semiconductor region to the first electrode.

8. 发明授权

US09312331B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09312331B2
公开(公告)日：2016-04-12
申请号：US14637170
申请日：2015-03-03
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Hiroaki Yamashita , Syotaro Ono , Hideyuki Ura , Masaru Izumisawa
IPC分类号： H01L29/06 , H01L29/76 , H01L27/088 , H01L27/06 , H01L29/739 , H01L29/78 , H01L29/423 , H01L29/66
CPC分类号： H01L29/0634 , H01L29/0692 , H01L29/1095 , H01L29/404 , H01L29/66348 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813
摘要： A semiconductor device includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type provided in the first semiconductor region, an element region, and a termination region. The element region includes a third semiconductor region of the second conductivity type, a fourth semiconductor region of the first conductivity type, and a gate electrode disposed on a gate insulating layer that extends adjacent the third semiconductor region and the fourth semiconductor region. The termination region surrounds the element region and includes a first electrode, which includes first portions extending in a first direction and second portions extending in a second direction. A plurality of first electrodes are provided on the first semiconductor region and the second semiconductor region. An interval between adjacent first portions in the second direction is less than an interval between adjacent second portions in the first direction.
摘要翻译：半导体器件包括第一导电类型的第一半导体区域，设置在第一半导体区域中的第二导电类型的第二半导体区域，元件区域和端接区域。元件区域包括第二导电类型的第三半导体区域，第一导电类型的第四半导体区域和设置在邻近第三半导体区域和第四半导体区域延伸的栅极绝缘层上的栅电极。终端区域围绕元件区域并且包括第一电极，其包括沿第一方向延伸的第一部分和沿第二方向延伸的第二部分。多个第一电极设置在第一半导体区域和第二半导体区域上。第二方向上相邻的第一部分之间的间隔小于第一方向上相邻的第二部分之间的间隔。

9. 再颁专利

USRE48259E1 Semiconductor device 有权
公开(公告)号：USRE48259E1
公开(公告)日：2020-10-13
申请号：US14527574
申请日：2014-10-29
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Kouta Tomita , Noboru Matsuda , Hideyuki Ura
IPC分类号： H01L29/76 , H01L31/062 , H01L29/78 , H01L29/06 , H01L29/417 , H01L29/40 , H01L29/423
摘要： In general, according to one embodiment, a semiconductor device includes a first electrode, a first and a second semiconductor layer of a first conductivity type, a third semiconductor layer of a second conductivity type, a fourth semiconductor layer of the first conductivity type in this order. A device region includes a gate electrode inside a first trench. A second trench having a ring-shaped structure forms a first region penetrating through the fourth and third semiconductor layers to the second semiconductor layer and including the device region inside and a second region surrounding the first region outside. A first opening is provided between adjacent ones of the first trenches. A second opening having a wider width than the first opening is provided in the first region outside the device region. A second electrode is electrically connected to the third and fourth semiconductor layers through the first and second openings.

10. 发明授权

US09590093B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US09590093B2
公开(公告)日：2017-03-07
申请号：US14642345
申请日：2015-03-09
申请人： Kabushiki Kaisha Toshiba
发明人： Syotaro Ono , Hideyuki Ura , Masahiro Shimura , Hiroaki Yamashita
IPC分类号： H01L29/73 , H01L29/78 , H01L29/739 , H01L29/10 , H01L29/08 , H01L29/36 , H01L29/06
CPC分类号： H01L29/7811 , H01L29/0634 , H01L29/086 , H01L29/0869 , H01L29/0878 , H01L29/0886 , H01L29/1095 , H01L29/36 , H01L29/66712 , H01L29/7395 , H01L29/7802
摘要： In general, according to one embodiment, a semiconductor device includes, a first semiconductor region, a plurality of second semiconductor regions, a plurality of third semiconductor regions, a fourth semiconductor region, a fifth semiconductor region, and a gate electrode. The third semiconductor region includes a first portion and a second portion. The first portion is provided between the second semiconductor regions adjacent to each other. An amount of impurity of the second conductivity type in the first portion is greater than an amount of impurity of the first conductivity type in the second semiconductor region contiguous to the first portion. The second portion is arranged with a part of the first semiconductor region. An amount of impurity of the second conductivity type in the second portion is smaller than an amount of impurity of the first conductivity type in the part of the first semiconductor region.
摘要翻译：通常，根据一个实施例，半导体器件包括第一半导体区域，多个第二半导体区域，多个第三半导体区域，第四半导体区域，第五半导体区域和栅电极。第三半导体区域包括第一部分和第二部分。第一部分设置在彼此相邻的第二半导体区域之间。第一部分中的第二导电类型的杂质的量大于与第一部分相邻的第二半导体区域中的第一导电类型的杂质的量。第二部分布置有第一半导体区域的一部分。第二部分中的第二导电类型的杂质的量小于第一半导体区域的部分中的第一导电类型的杂质的量。

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