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1. 发明申请

US20130244142A1 Method and Apparatus for Inspecting a Mask Substrate for Defects, Method of Manufacturing a Photomask, and Method of Manufacturing a Semiconductor Device 有权
标题翻译：用于检查缺陷的掩模基板的方法和装置，制造光掩模的方法以及制造半导体器件的方法
公开(公告)号：US20130244142A1
公开(公告)日：2013-09-19
申请号：US13840489
申请日：2013-03-15
申请人： KABUSHIKI KAISHA TOSHIBA , TSUNEO TERASAWA
发明人： Takeshi YAMANE , Tsuneo Terasawa
IPC分类号： G01N21/956 , G03F1/00
CPC分类号： G01N21/956 , G01N2021/95676 , G03F1/00 , G03F1/24
摘要： According to one embodiment, a method of inspecting a mask substrate for defects, includes acquiring a defocus image of a partial region of a mask substrate using a dark-field optical system, acquiring a just-focus image of the partial region using the dark-field optical system, generating a set composed of first signals obtained from the defocus image and having signal intensities equal to or higher than a first threshold value, excluding, from the set, the first signals pertaining to parts in which signal intensities of signals obtained from the just-focus image are equal to or higher than a second threshold value, determining an inspection threshold value for signal intensities, on the basis of the first signals not excluded from, and remaining in, the sea.
摘要翻译：根据一个实施例，一种用于检查掩模基板的缺陷的方法包括使用暗视场光学系统获取掩模基板的部分区域的散焦图像，使用暗视场光学系统获取部分区域的正焦点图像，产生由散焦图像获得的具有等于或高于第一阈值的信号强度的由第一信号组成的集合，从集合中除去与从第一阈值获得的信号的信号强度相关的部分的第一信号，正焦点图像等于或高于第二阈值，基于未从集合中排除和保留的第一信号确定信号强度的检查阈值。

2. 发明申请

US20130244143A1 Optimum Imaging Position Detecting Method, Optimum Imaging Position Detecting Device, Photomask Manufacturing Method, and Semiconductor Device Manufacturing Method 有权
标题翻译：最佳成像位置检测方法，最佳成像位置检测装置，光掩模制造方法和半导体装置制造方法
公开(公告)号：US20130244143A1
公开(公告)日：2013-09-19
申请号：US13841049
申请日：2013-03-15
申请人： Tsuneo Terasawa , KABUSHIKI KAISHA TOSHIBA
发明人： Takeshi YAMANE , Tsuneo Terasawa
IPC分类号： G03F1/22 , H04N7/18
CPC分类号： G03F1/22 , H04N7/18
摘要： According to one embodiment, an optimum imaging position detecting method includes acquiring an image of a predetermined area of a substrate surface, calculating, on the basis of the image of the predetermined area, peak intensity corresponding to a value obtained by subtracting average signal intensity of an area outside an intensity acquisition part from signal intensity of the intensity acquisition part, calculating variation of the peak intensity, executing acquiring the image of the predetermined area, calculating the peak intensity, and calculating the variation of the peak intensity at each of a plurality of imaging positions, and determining that a position of the maximum variation of the peak intensity is an optimum imaging position.
摘要翻译：根据一个实施例，最佳成像位置检测方法包括获取基板表面的预定区域的图像，基于预定区域的图像计算与通过减去平均信号强度减去获得的值相对应的峰值强度强度获取部分的强度获取部分之外的区域，计算峰值强度的变化，执行获取预定区域的图像，计算峰值强度，以及计算多个峰值强度的变化并且确定峰值强度的最大变化的位置是最佳成像位置。

3. 发明授权

US08986913B2 Method and apparatus for inspecting a mask substrate for defects, method of manufacturing a photomask, and method of manufacturing a semiconductor device 有权
标题翻译：用于检查缺陷的掩模基板的方法和装置，以及制造光掩模的方法以及制造半导体器件的方法
公开(公告)号：US08986913B2
公开(公告)日：2015-03-24
申请号：US13840489
申请日：2013-03-15
申请人： Kabushiki Kaisha Toshiba , Tsuneo Terasawa
发明人： Takeshi Yamane , Tsuneo Terasawa
IPC分类号： G03F1/24 , G01N21/956 , G03F1/00
CPC分类号： G01N21/956 , G01N2021/95676 , G03F1/00 , G03F1/24
摘要： According to one embodiment, a method of inspecting a mask substrate for defects, includes acquiring a defocus image of a partial region of a mask substrate using a dark-field optical system, acquiring a just-focus image of the partial region using the dark-field optical system, generating a set composed of first signals obtained from the defocus image and having signal intensities equal to or higher than a first threshold value, excluding, from the set, the first signals pertaining to parts in which signal intensities of signals obtained from the just-focus image are equal to or higher than a second threshold value, determining an inspection threshold value for signal intensities, on the basis of the first signals not excluded from, and remaining in, the sea.
摘要翻译：根据一个实施例，一种用于检查掩模基板的缺陷的方法包括使用暗视场光学系统获取掩模基板的部分区域的散焦图像，使用暗视场光学系统获取部分区域的正焦点图像，产生由散焦图像获得的具有等于或高于第一阈值的信号强度的由第一信号组成的集合，不包括与该集合相关的信号强度的第一信号，正焦点图像等于或高于第二阈值，基于未从集合中排除和保留的第一信号确定信号强度的检查阈值。

4. 发明授权

US09063098B2 Method of inspecting mask, mask inspection device, and method of manufacturing mask 有权
标题翻译：掩模检查方法，掩模检查装置以及制造掩模的方法
公开(公告)号：US09063098B2
公开(公告)日：2015-06-23
申请号：US13549482
申请日：2012-07-15
申请人： Tsuneo Terasawa , Osamu Suga
发明人： Tsuneo Terasawa , Osamu Suga
IPC分类号： G03F1/84 , G01N21/88 , G01N21/956
CPC分类号： G03F1/22 , G01N21/8806 , G01N21/95 , G01N21/956 , G01N2021/8822 , G01N2021/95676 , G01N2201/061 , G03F1/84
摘要： There is provided a method of high-sensitively detecting both of a phase defect existing in a mask blank and a phase defect remaining after manufacturing an EUVL mask. When the mask blank is inspected, EUV light having illumination NA to be within an inner NA but a larger value is irradiated. When the EUVL mask is inspected, by using a dark-field imaging optical system including a center shielding portion for shielding EUV light and a linear shielding portion for shielding the EUV light whose width is smaller than a diameter of the center shielding portion, the center shielding portion and the linear shielding portion being included in a pupil plane, the EUV light having illumination NA as large as or smaller than the width of the linear shielding portion is irradiated.
摘要翻译：提供了一种高灵敏度地检测存在于掩模坯料中的相位缺陷和在制造EUVL掩模之后剩余的相缺陷的方法。当检查掩模毛坯时，照射具有NA内但NA值越大的EUV光。当检查EUVL掩模时，通过使用包括用于屏蔽EUV光的中心屏蔽部分和用于屏蔽宽度小于中心屏蔽部分的直径的EUV光的线性屏蔽部分的暗视场成像光学系统，中心屏蔽部分和线性屏蔽部分包括在光瞳平面中，照射具有大于或等于线状屏蔽部分的宽度的照明NA的EUV光。

5. 发明授权

US08435702B2 Manufacturing method of semiconductor device and manufacturing method of mask 有权
标题翻译：半导体器件的制造方法和掩模的制造方法
公开(公告)号：US08435702B2
公开(公告)日：2013-05-07
申请号：US12563265
申请日：2009-09-21
申请人： Tsuneo Terasawa , Takeshi Yamane
发明人： Tsuneo Terasawa , Takeshi Yamane
IPC分类号： G03F1/00
CPC分类号： G03F1/24 , B82Y10/00 , B82Y40/00 , Y10T403/13
摘要： Provided is a technique capable of improving the dimensional accuracy of a transfer pattern in a lithography technique in which EUV light is used and the EUV light is incident obliquely on a mask and an image of the EUV light reflected from the mask is formed on a semiconductor substrate (resist film), thereby transferring the pattern formed on the mask onto the semiconductor substrate. The present invention is based on a lithography technique in which EUV light is used and an exposure optical system in which the EUV light is obliquely incident on a mask is used. In this lithography technique, an absorber and a difference in level are formed on the mask, and a projective component projected on a mask surface out of a direction cosine component of the incident light is set to be almost orthogonal to an extending direction of the difference in level.
摘要翻译：提供了一种技术，其能够提高使用EUV光的光刻技术中的转印图案的尺寸精度，并且EUV光倾斜地入射到掩模上，并且在半导体上形成从掩模反射的EUV光的图像衬底（抗蚀剂膜），从而将形成在掩模上的图案转印到半导体衬底上。本发明基于使用EUV光的光刻技术和其中EUV光倾斜入射在掩模上的曝光光学系统。在该光刻技术中，在掩模上形成吸收体和水平差，并且投射到入射光的方向余弦分量的掩模表面上的投射分量被设定为与差异的延伸方向几乎正交在水平。

6. 发明申请

US20120224051A1 MASK INSPECTION METHOD AND MASK INSPECTION APPARATUS 审中-公开
标题翻译：屏蔽检查方法和面罩检查装置
公开(公告)号：US20120224051A1
公开(公告)日：2012-09-06
申请号：US13409846
申请日：2012-03-01
申请人： Takeshi YAMANE , Tsuneo Terasawa
发明人： Takeshi YAMANE , Tsuneo Terasawa
IPC分类号： H04N7/18
CPC分类号： G03F1/84 , G03F1/22
摘要： According to one embodiment, a method of inspecting a defect of a semiconductor exposure mask by using an optical system, which is configured to acquire an image by an imaging module by making light of an arbitrary wavelength incident on the semiconductor exposure mask, includes acquiring a control condition for elongating a point image acquired by the optical system in a read-out direction of the imaging module, acquiring an image of a desired area of the mask under the control condition, and determining, when a peak signal with a signal intensity which is a first threshold or more.
摘要翻译：根据一个实施例，通过使用被配置为通过使入射在半导体曝光掩模上的任意波长的光获取成像模块的图像的光学系统来检查半导体曝光掩模的缺陷的方法包括：控制条件，用于在所述摄像模块的读出方向上延伸由所述光学系统获取的点图像，在所述控制条件下获取所述掩模的期望区域的图像，以及当将具有信号强度的峰值信号是第一个门槛以上。

7. 发明申请

US20120218543A1 MASK INSPECTION METHOD AND MASK INSPECTION APPARATUS 有权
标题翻译：屏蔽检查方法和面罩检查装置
公开(公告)号：US20120218543A1
公开(公告)日：2012-08-30
申请号：US13403105
申请日：2012-02-23
申请人： Takeshi YAMANE , Tsuneo Terasawa
发明人： Takeshi YAMANE , Tsuneo Terasawa
IPC分类号： G01J3/00 , G01N21/00
CPC分类号： G01N21/956 , G01N2021/8822 , G01N2021/95676
摘要： According to one embodiment, a method of detecting a defect of a semiconductor exposure mask includes acquiring a background intensity from a surface height distribution of the mask, acquiring a standard background intensity distribution from the background intensity, making light of an arbitrary wavelength incident on the mask, and acquiring an image at a position of interest of the mask, acquiring background intensity raw data, based on a signal intensity of the acquired image at the position of interest and a mean value of image intensity data in a peripheral area of the position of interest, finding a correction coefficient of the signal intensity, based on a ratio of the background intensity raw data to the standard background intensity distribution, correcting the signal intensity by multiplying the signal intensity.
摘要翻译：根据一个实施例，一种检测半导体曝光掩模的缺陷的方法包括从掩模的表面高度分布获取背景强度，从背景强度获取标准背景强度分布，使入射到掩模，并且获取所述掩模的感兴趣位置处的图像，基于感兴趣位置处获取的图像的信号强度和所述位置的周边区域中的图像强度数据的平均值来获取背景强度原始数据根据背景强度原始数据与标准背景强度分布的比率，求出信号强度的校正系数，通过乘以信号强度来校正信号强度。

8. 发明授权

US07361530B2 Method of fabricating a semiconductor integrated circuit that includes patterning a semiconductor substrate with a first photomask that uses metal for blocking light and patterning the same substrate with a second photomask that uses organic resin for blocking light 有权
标题翻译：一种半导体集成电路的制造方法，其包括使用第一光掩模图案化半导体衬底，所述第一光掩模使用金属来阻挡光，并且利用使用有机树脂阻挡光的第二光掩模对相同衬底进行图案化
公开(公告)号：US07361530B2
公开(公告)日：2008-04-22
申请号：US11714837
申请日：2007-03-07
申请人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
发明人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
IPC分类号： H01L21/58
CPC分类号： G03F7/70425 , G03F1/00 , G03F1/56 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05569 , H01L2224/05572 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/15311 , Y10S438/944 , Y10S438/946 , H01L2924/00
摘要： Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.
摘要翻译：提高了半导体集成电路器件的生产率。根据使用光掩模的次数，适当地使用具有由金属制成的不透明图案的光掩模和由抗蚀剂膜制成的不透明图案的光掩模，从而进行曝光处理。

9. 发明授权

US06849540B2 METHOD OF FABRICATING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF PRODUCING A MULTI-CHIP MODULE THAT INCLUDES PATTERNING WITH A PHOTOMASK THAT USES METAL FOR BLOCKING EXPOSURE LIGHT AND A PHOTOMASK THAT USES ORGANIC RESIN FOR BLOCKING EXPOSURE LIGHT 失效
标题翻译：制造半导体集成电路装置的方法以及制造多芯片模块的方法，其包括使用用于阻挡接触光的金属的光电图案，以及使用有机树脂阻挡接触光的照相机
公开(公告)号：US06849540B2
公开(公告)日：2005-02-01
申请号：US10296495
申请日：2001-08-15
申请人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
发明人： Tsuneo Terasawa , Toshihiko Tanaka , Ko Miyazaki , Norio Hasegawa , Kazutaka Mori
IPC分类号： G03F1/54 , G03F1/56 , G03F7/20 , H01L21/768 , H01L21/027
CPC分类号： G03F7/70425 , G03F1/00 , G03F1/56 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05024 , H01L2224/05569 , H01L2224/05572 , H01L2224/16225 , H01L2224/32225 , H01L2224/73204 , H01L2224/92125 , H01L2924/15311 , Y10S438/944 , Y10S438/946 , H01L2924/00
摘要： Productivity of a semiconductor integrated circuit device is improved. According to how many times the photomask is used, a photomask having an opaque pattern made of metal and a photomask having an opaque pattern made of a resist film are properly used, and thereby an exposure treatment is performed.
摘要翻译：提高了半导体集成电路器件的生产率。根据使用光掩模的次数，适当地使用具有由金属制成的不透明图案的光掩模和由抗蚀剂膜制成的不透明图案的光掩模，从而进行曝光处理。

10. 发明授权

US06677107B1 Method for manufacturing semiconductor integrated circuit device, optical mask used therefor, method for manufacturing the same, and mask blanks used therefor 有权
标题翻译：用于制造半导体集成电路器件的方法，用于其的光学掩模，其制造方法和用于其的掩模毛坯
公开(公告)号：US06677107B1
公开(公告)日：2004-01-13
申请号：US09646036
申请日：2000-09-13
申请人： Norio Hasegawa , Tsuneo Terasawa , Toshihiko Tanaka
发明人： Norio Hasegawa , Tsuneo Terasawa , Toshihiko Tanaka
IPC分类号： G03C500
CPC分类号： G03F1/56 , G03F1/44 , G03F1/62 , G03F7/70983
摘要： In order to suppress or prevent the occurrence of foreign matter in the manufacture of a semiconductor integrated circuit device by the use of a photo mask constituted in such a manner that a resist film is made to function as a light screening film, inspection or exposure treatment is carried out, when the photo mask 1PA1 has been mounted on a predetermined apparatus such as, e.g., an inspection equipment or aligner, in the state in which a mounting portion 2 of the predetermined apparatus is contacted with that region of a major surface of a mask substrate 1a of the photo mask 1PA1 in which a light shielding pattern 1b and a mask pattern 1mr, each formed of a resist film, on the major surface of the mask substrate 1a do not exist.
摘要翻译：为了通过使用以使抗蚀剂膜作为遮光膜的方式构成的光掩模来抑制或防止在制造半导体集成电路器件时发生异物，检查或曝光处理当在预定设备的安装部分2与主要表面的区域接触的状态下，当光掩模1PA1已经安装在诸如检查设备或对准器的预定设备上时，在掩模基板1a的主表面上不存在其中由抗蚀剂膜形成的遮光图案1b和掩模图案1mr的光掩模1PA1的掩模基板1a。

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