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    • 9. 发明申请
    • SEMICONDUCTOR MODULE
    • 半导体模块
    • US20150019150A1
    • 2015-01-15
    • US14501995
    • 2014-09-30
    • Kabushiki Kaisha Toshiba
    • Kenji HIROHATAMinoru MUKAITomoko MONDA
    • G01R27/16
    • G01R27/16H01L23/64H01L2924/0002H01L2924/00
    • According to one embodiment, a semiconductor module comprises a substrate, a first wiring, an electrode pad, a junction, an oscillator, and a detector. The first wiring is disposed on the substrate, and has a characteristic impedance Z0. The electrode pad is connected to the first wiring. The junction is disposed on the electrode pad, and has an impedance Z1. The oscillator is disposed in contact with the first wiring, and oscillates a pulse wave of a voltage toward the junction via the first wiring. The detector is disposed in contact with the first wiring, and detects an output wave of the pulse wave from the junction. The characteristic impedance Z0 and the impedance Z1 satisfy a following relationship (1),  Z   0 - Z   1 Z   0  ≤ 0.05 . ( 1 )
    • 根据一个实施例,半导体模块包括衬底,第一布线,电极焊盘,结,振荡器和检测器。 第一布线设置在基板上,并具有特性阻抗Z0。 电极焊盘连接到第一布线。 接点设置在电极焊盘上,并具有阻抗Z1。 振荡器设置成与第一布线接触,并且经由第一布线使得电压脉冲波朝向结。 检测器设置成与第一布线接触,并检测来自结的脉冲波的输出波。 特征阻抗Z0和阻抗Z1满足以下关系式(1),0。。 (1)
    • 10. 发明申请
    • SEMICONDUCTOR DEVICE, APPARATUS OF ESTIMATING LIFETIME, METHOD OF ESTIMATING LIFETIME
    • 半导体器件,估算生命周期的设备,估算生命周期的方法
    • US20140091829A1
    • 2014-04-03
    • US14013573
    • 2013-08-29
    • Kabushiki Kaisha Toshiba
    • Yuu YAMAYOSEKenji HIROHATA
    • G01R31/319
    • G01R31/31924G01R31/318513H01L2224/16145
    • According to one embodiment, a semiconductor device includes a circuit board, a plurality of semiconductor chips stacked above the circuit board, first and second bumps, third and fourth bumps, and first and second detection units. The first and second bumps are provided in either a gap between the circuit board and the semiconductor chip or a gap between the two semiconductor chips. The third and fourth bumps are provided in any of gaps other than the gap in which the first and second bumps are provided. The first detection unit is electrically connected to the first bump to detect damage of the first bump and to generate a first signal indicating the damage of the first bump. The second detection unit is electrically connected to the third bump to detect damage of the third bump and to generate a second signal indicating the damage of the third bump.
    • 根据一个实施例,半导体器件包括电路板,堆叠在电路板上的多个半导体芯片,第一和第二凸块,第三和第四凸块以及第一和第二检测单元。 第一和第二凸起设置在电路板和半导体芯片之间的间隙中或两个半导体芯片之间的间隙。 第三和第四凸起设置在除了设置第一和第二凸块的间隙之外的任何间隙中。 第一检测单元电连接到第一凸块以检测第一凸块的损坏并产生指示第一凸块损坏的第一信号。 第二检测单元电连接到第三凸块以检测第三凸块的损坏并产生指示第三凸起的损伤的第二信号。