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1. 发明申请

US20030111690A1 Semiconductor device and method of manufacturing the same 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US20030111690A1
公开(公告)日：2003-06-19
申请号：US10075236
申请日：2002-02-15
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Kanna Adachi
IPC分类号： H01L029/76 , H01L029/94 , H01L031/062 , H01L031/113 , H01L031/119
CPC分类号： H01L29/6659 , H01L21/26506 , H01L21/26513 , H01L29/7833
摘要： An aspect of the present invention includes: a gate insulating layer formed on an n-type silicon semiconductor region; a gate electrode formed on the gate insulating layer; a channel region formed immediately below the gate electrode in the semiconductor region; p-type source/drain regions formed at both sides of the channel region in the semiconductor region; p-type diffusion layer regions formed between the channel region and the source/drain regions in the semiconductor region and having a lower impurity concentration than the source/drain regions; first impurity regions formed near surface portions of the diffusion layer regions; and second impurity regions formed in part of the p-type diffusion layer regions and near surface portions of the source/drain regions, the second impurity regions being deeper than the first impurity regions, the first and second impurity regions containing one element selected from germanium, silicon, gallium, and indium as impurity.
摘要翻译：本发明的一个方面包括：形成在n型硅半导体区域上的栅极绝缘层; 形成在所述栅极绝缘层上的栅电极; 形成在半导体区域中的栅电极正下方的沟道区; 形成在半导体区域中的沟道区域的两侧的p型源极/漏极区域; 形成在半导体区域中的沟道区域和源极/漏极区域之间并且具有比源极/漏极区域更低的杂质浓度的p型扩散层区域; 形成在扩散层区域的表面部附近的第一杂质区域; 以及形成在所述p型扩散层区域和所述源极/漏极区域的近表面部分的一部分中的第二杂质区域，所述第二杂质区域比所述第一杂质区域深，所述第一和第二杂质区域包含选自锗，硅，镓和铟作为杂质。

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