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1. 发明申请

US20090146752A1 Clock, Frequency Reference, and Other Reference Signal Generator with a Controlled Quality Factor 有权
标题翻译：时钟，频率参考和其他具有受控质量因子的参考信号发生器
公开(公告)号：US20090146752A1
公开(公告)日：2009-06-11
申请号：US12013440
申请日：2008-01-12
申请人： Justin O'Day , Michael Shannon McCorquodale , Scott Michael Pernia , Nam Duc Nguyen , Ralph Beaudouin , Sundus Kubba
发明人： Justin O'Day , Michael Shannon McCorquodale , Scott Michael Pernia , Nam Duc Nguyen , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03B5/04 , H03L1/00
CPC分类号： H03L5/00 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1287 , H03B5/1293 , H03L1/02 , H03L7/08
摘要： Exemplary embodiments of the invention provide a reference signal generator having a controlled quality (“Q”) factor. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, which generates a first reference signal having a resonant frequency, and a plurality of reactance modules couplable to the reference resonator. Each reactance module comprises one or more reactance unit cells, and each reactance unit cell comprises a reactance element coupled in series to a switching element. In exemplary embodiments, the reactance element is a capacitor having a predetermined unit of capacitance, and the switching element is a transistor having a predetermined resistance when in an off state. The ratio of capacitance to resistance is substantially constant for all reactance modules of the plurality of reactance modules.
摘要翻译：本发明的示例性实施例提供具有受控质量（“Q”）因子的参考信号发生器。产生谐波参考信号的示例性装置包括产生具有共振频率的第一参考信号的参考谐振器，例如LC槽，以及可耦合到参考谐振器的多个电抗模块。每个电抗模块包括一个或多个电抗单位电池，并且每个电抗单元包括与开关元件串联耦合的电抗元件。在示例性实施例中，电抗元件是具有预定电容单位的电容器，并且当处于断开状态时，开关元件是具有预定电阻的晶体管。对于多个电抗模块的所有电抗模块，电容与电阻的比率基本上是恒定的。

2. 发明申请

US20090146748A1 Amplitude Controller for a Clock, Frequency Reference, and Other Reference Signal Generator 审中-公开
标题翻译：时钟幅度控制器，频率参考和其他参考信号发生器
公开(公告)号：US20090146748A1
公开(公告)日：2009-06-11
申请号：US12013435
申请日：2008-01-12
申请人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
发明人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03L5/00 , H03B5/12 , H03L1/00 , H03B5/30
CPC分类号： H03B5/04 , H03J2200/10 , H03L1/026 , H03L5/00
摘要： Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, and an amplitude controller. The reference resonator generates a first reference signal having a resonant frequency, and the amplitude controller maintains substantially constant a magnitude of a peak amplitude of the first reference signal. A common mode controller may also be included to maintain substantially constant a common mode voltage level of the reference resonator. A temperature-dependent control voltage also may be generated and utilized to maintain the resonant frequency substantially constant or within a predetermined variance of a calibrated or selected frequency.
摘要翻译：本发明的示例性实施例提供了一种参考信号发生器，系统和方法。用于产生谐波参考信号的示例性装置包括参考谐振器，例如LC槽，以及振幅控制器。参考谐振器产生具有谐振频率的第一参考信号，并且振幅控制器维持第一参考信号的峰值幅度的幅度基本恒定。还可以包括共模控制器以保持参考谐振器的共模电压电平基本恒定。还可以产生温度依赖的控制电压并用于维持谐振频率基本上恒定或在校准或选定频率的预定变化范围内。

3. 发明授权

US07978017B2 Control voltage generator for a clock, frequency reference, and other reference signal generator 有权
标题翻译：用于时钟，频率参考和其他参考信号发生器的控制电压发生器
公开(公告)号：US07978017B2
公开(公告)日：2011-07-12
申请号：US12013438
申请日：2008-01-12
申请人： Scott Michael Pernia , Nam Duc Nguyen , Michael Shannon McCorquodale , Justin O'Day , Ralph Beaudouin , Sundus Kubba
发明人： Scott Michael Pernia , Nam Duc Nguyen , Michael Shannon McCorquodale , Justin O'Day , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03B5/08
CPC分类号： H03K3/011 , H03B5/04 , H03L1/00 , H03L1/026 , H03L5/00 , H03L7/00
摘要： Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, a control voltage generator adapted to provide a temperature-dependent control voltage; and a plurality of variable reactance modules. The reference resonator generates a first reference signal having a resonant frequency, and each reactance module is adapted to modify a corresponding reactance in response to the control voltage to maintain the resonant frequency substantially constant or within a predetermined variance over a predetermined temperature range. A frequency controller may also be included to maintain substantially constant a magnitude of a peak amplitude of the first reference signal and maintains substantially constant a common mode voltage level of the reference resonator.
摘要翻译：本发明的示例性实施例提供了一种参考信号发生器，系统和方法。产生谐波参考信号的示例性装置包括参考谐振器，例如LC槽，适于提供温度依赖控制电压的控制电压发生器; 以及多个可变电抗模块。参考谐振器产生具有谐振频率的第一参考信号，并且每个电抗模块适于响应于控制电压修改相应的电抗，以使谐振频率基本上恒定或在预定的温度范围内的预定方差内。还可以包括频率控制器以保持第一参考信号的峰值幅度的幅度基本上恒定，并且保持参考谐振器的共模电压电平基本恒定。

4. 发明申请

US20090146751A1 Clock, Frequency Reference, and Other Reference Signal Generator 审中-公开
标题翻译：时钟，频率参考和其他参考信号发生器
公开(公告)号：US20090146751A1
公开(公告)日：2009-06-11
申请号：US11950707
申请日：2007-12-05
申请人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
发明人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03B5/12 , H03L1/00
CPC分类号： H03L7/08 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1293 , H03L1/02 , H03L5/00
摘要： Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, and a frequency controller. The reference resonator generates a first reference signal having a resonant frequency, and the frequency controller maintains substantially constant a magnitude of a peak amplitude of the first reference signal and maintains substantially constant a common mode voltage level of the reference resonator. A temperature-dependent control voltage is also generated and utilized to maintain the resonant frequency substantially constant or within a predetermined variance of a calibrated or selected frequency.
摘要翻译：本发明的示例性实施例提供了一种参考信号发生器，系统和方法。用于产生谐波参考信号的示例性装置包括参考谐振器，例如LC槽和频率控制器。参考谐振器产生具有谐振频率的第一参考信号，并且频率控制器维持第一参考信号的峰值幅度的幅度基本上恒定，并且保持参考谐振器的共模电压电平基本恒定。还产生温度依赖性控制电压并用于维持谐振频率基本上恒定或在校准或选定频率的预定变化范围内。

5. 发明申请

US20090146719A1 Control Voltage Generator for a Clock, Frequency Reference, and Other Reference Signal Generator 有权
标题翻译：用于时钟，频率参考和其他参考信号发生器的控制电压发生器
公开(公告)号：US20090146719A1
公开(公告)日：2009-06-11
申请号：US12013438
申请日：2008-01-12
申请人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
发明人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03K3/00 , H03L1/00
CPC分类号： H03K3/011 , H03B5/04 , H03L1/00 , H03L1/026 , H03L5/00 , H03L7/00
摘要： Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, a control voltage generator adapted to provide a temperature-dependent control voltage; and a plurality of variable reactance modules. The reference resonator generates a first reference signal having a resonant frequency, and each reactance module is adapted to modify a corresponding reactance in response to the control voltage to maintain the resonant frequency substantially constant or within a predetermined variance over a predetermined temperature range. A frequency controller may also be included to maintain substantially constant a magnitude of a peak amplitude of the first reference signal and maintains substantially constant a common mode voltage level of the reference resonator.
摘要翻译：本发明的示例性实施例提供了一种参考信号发生器，系统和方法。产生谐波参考信号的示例性装置包括参考谐振器，例如LC槽，适于提供温度依赖控制电压的控制电压发生器; 以及多个可变电抗模块。参考谐振器产生具有谐振频率的第一参考信号，并且每个电抗模块适于响应于控制电压修改相应的电抗，以使谐振频率基本上恒定或在预定的温度范围内的预定方差内。还可以包括频率控制器以保持第一参考信号的峰值幅度的幅度基本上恒定，并且保持参考谐振器的共模电压电平基本恒定。

6. 发明授权

US08093958B2 Clock, frequency reference, and other reference signal generator with a controlled quality factor 有权
标题翻译：时钟，频率参考和其他具有受控质量因素的参考信号发生器
公开(公告)号：US08093958B2
公开(公告)日：2012-01-10
申请号：US12013440
申请日：2008-01-12
申请人： Justin O'Day , Michael Shannon McCorquodale , Scott Michael Pernia , Nam Duc Nguyen , Ralph Beaudouin , Sundus Kubba
发明人： Justin O'Day , Michael Shannon McCorquodale , Scott Michael Pernia , Nam Duc Nguyen , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03L5/00
CPC分类号： H03L5/00 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1287 , H03B5/1293 , H03L1/02 , H03L7/08
摘要： Exemplary embodiments of the invention provide a reference signal generator having a controlled quality (“Q”) factor. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, which generates a first reference signal having a resonant frequency, and a plurality of reactance modules couplable to the reference resonator. Each reactance module comprises one or more reactance unit cells, and each reactance unit cell comprises a reactance element coupled in series to a switching element. In exemplary embodiments, the reactance element is a capacitor having a predetermined unit of capacitance, and the switching element is a transistor having a predetermined resistance when in an off state. The ratio of capacitance to resistance is substantially constant for all reactance modules of the plurality of reactance modules.
摘要翻译：本发明的示例性实施例提供具有受控质量（“Q”）因子的参考信号发生器。产生谐波参考信号的示例性装置包括产生具有共振频率的第一参考信号的参考谐振器，例如LC槽，以及可耦合到参考谐振器的多个电抗模块。每个电抗模块包括一个或多个电抗单位电池，并且每个电抗单元包括与开关元件串联耦合的电抗元件。在示例性实施例中，电抗元件是具有预定电容单位的电容器，并且当处于断开状态时，开关元件是具有预定电阻的晶体管。对于多个电抗模块的所有电抗模块，电容与电阻的比率基本上是恒定的。

7. 发明申请

US20090146750A1 Common Mode Controller for a Clock, Frequency Reference, and Other Reference Signal Generator 审中-公开
标题翻译：用于时钟，频率参考和其他参考信号发生器的共模控制器
公开(公告)号：US20090146750A1
公开(公告)日：2009-06-11
申请号：US12013437
申请日：2008-01-12
申请人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
发明人： Scott Michael Pernia , Michael Shannon McCorquodale , Nam Duc Nguyen , Justin O'Day , Ralph Beaudouin , Sundus Kubba
IPC分类号： H03B5/30 , H03B5/12 , H03L1/00 , H03L5/00
CPC分类号： H03L1/02 , H03B5/1215 , H03B5/1228 , H03B5/1243 , H03B5/1253 , H03B5/1265 , H03B5/1287 , H03B5/1293 , H03L5/00 , H03L7/08
摘要： Exemplary embodiments of the invention provide a reference signal generator, system and method. An exemplary apparatus to generate a harmonic reference signal includes a reference resonator, such as an LC-tank, and a common mode controller. The reference resonator generates a first reference signal having a resonant frequency, and the common mode controller maintains substantially constant a common mode voltage level of the reference resonator. An amplitude controller may also be included to maintain substantially constant a magnitude of a peak amplitude of the first reference signal. A temperature-dependent control voltage also may be generated and utilized to maintain the resonant frequency substantially constant or within a predetermined variance of a calibrated or selected frequency.
摘要翻译：本发明的示例性实施例提供了一种参考信号发生器，系统和方法。用于产生谐波参考信号的示例性装置包括参考谐振器，例如LC槽和共模控制器。参考谐振器产生具有谐振频率的第一参考信号，并且共模控制器维持参考谐振器的共模电压电平基本恒定。还可以包括幅度控制器以维持第一参考信号的峰值幅度的幅度基本恒定。还可以产生温度依赖的控制电压并用于维持谐振频率基本上恒定或在校准或选定频率的预定变化范围内。

8. 发明授权

US07242235B1 Dual data rate flip-flop 有权
标题翻译：双数据速率触发器
公开(公告)号：US07242235B1
公开(公告)日：2007-07-10
申请号：US11067513
申请日：2005-02-25
申请人： Nam Duc Nguyen
发明人： Nam Duc Nguyen
IPC分类号： H03K3/356
CPC分类号： H03K3/0372
摘要： A flip-flop is configured to operate either in a double data-rate mode or a normal mode. When configured to operate in the double data-rate mode, the flip-flop outputs data on both edges of the applied clock. When configured to operate in the normal mode, the flip-flop outputs data on either the rising or falling edges of the applied clock. In the double data-rate mode, when a first latch disposed in the flip-flop operates in a sampling mode, the second latch disposed in the flip-flop operates in a holding mode to supply the output data, and when the second latch operates in the sampling mode, the first latch operates in the holding mode to supply the output data. Accordingly, with each of the rising or falling edge of the clock, one of the latches supplies an output data.
摘要翻译：触发器被配置为以双数据速率模式或正常模式操作。当配置为在双数据速率模式下工作时，触发器在应用时钟的两个边沿输出数据。当配置为在正常模式下工作时，触发器在施加时钟的上升沿或下降沿输出数据。在双数据速率模式中，当设置在触发器中的第一锁存器以采样模式工作时，设置在触发器中的第二锁存器以保持模式工作以提供输出数据，并且当第二锁存器操作时在采样模式下，第一锁存器在保持模式下操作以提供输出数据。因此，随着时钟的上升沿或下降沿中的每一个，锁存器之一提供输出数据。

9. 发明授权

US07315210B2 Differential operational amplifier 有权
标题翻译：差分运算放大器
公开(公告)号：US07315210B2
公开(公告)日：2008-01-01
申请号：US11299279
申请日：2005-12-08
申请人： Nam Duc Nguyen
发明人： Nam Duc Nguyen
IPC分类号： H03F3/45
CPC分类号： H03F1/34 , H03F3/45183 , H03F3/45475 , H03F3/45645 , H03F3/45654 , H03F2203/45074 , H03F2203/45424 , H03F2203/45431 , H03F2203/45511
摘要： The input stage of an operational amplifier includes at least four signal-receiving stages adapted to receive four primary input signals. If the voltage level associated with any of the input signal changes, at least one transistor in each of the at least four signal-receiving stages conducts more current and at least one transistor in each of these stages conducts less current. The four signal-receiving stages collectively generate at least four intermediate signals that are delivered to the output stage of the differential amplifier, which in response, generates a pair of differential output signals. Two of the input signals are derived from the pair of differential output signals and are fed back to control the amplifier.
摘要翻译：运算放大器的输入级包括适于接收四个主要输入信号的至少四个信号接收级。如果与任何输入信号相关联的电压电平改变，则至少四个信号接收级中的每一个中的至少一个晶体管传导更多的电流，并且这些级中的每一个中的至少一个晶体管传导更少的电流。四个信号接收级共同地产生至少四个传递到差分放大器的输出级的中间信号，差分放大器作为响应，产生一对差分输出信号。输入信号中的两个来自差分输出信号对，并被反馈以控制放大器。

10. 发明授权

US07113040B2 Differential amplifier 有权
公开(公告)号：US07113040B2
公开(公告)日：2006-09-26
申请号：US10917812
申请日：2004-08-13
申请人： Nam Duc Nguyen
发明人： Nam Duc Nguyen
IPC分类号： H03F3/45
CPC分类号： H03F3/45475 , H03F1/34 , H03F3/45183 , H03F3/45645 , H03F3/45654 , H03F2203/45074 , H03F2203/45424 , H03F2203/45431 , H03F2203/45511
摘要： The input stage of an operational amplifier includes at least four signal-receiving stages adapted to receive four input signals. If the voltage level associated with any of the input signal changes, at least one transistor in each of the at least four signal-receiving stages conducts more current and at least one transistor in each of these stages conducts less current. The four signal-receiving stages collectively generate four intermediate signals that are delivered to the output stage of the differential amplifier, which in response, generates a pair of differential output signals. Two of the input signals are derived from the pair of differential output signals and are fed back to the input stage of the amplifier.

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