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    • 3. 发明申请
    • HARMONIC-REJECTION MODULATION DEVICE
    • 谐波抑制调制装置
    • US20070242775A1
    • 2007-10-18
    • US11611256
    • 2006-12-15
    • Nean-Chu ChengYing-Che TsengSen-You LiuDid-Min Shih
    • Nean-Chu ChengYing-Che TsengSen-You LiuDid-Min Shih
    • H04L27/20
    • H04L27/20H03B27/00H03D7/165H03D2200/0086H04L27/2057H04L27/206
    • A harmonic-rejection modulation device is provided, which includes a phase splitter, a low pass filter, and a modulator. Based on a square wave, the phase splitter generates a plurality of unfiltered local oscillating signals having phase angles of 0°, 30°, 90°, 120°, 180°, 210°, 270° and 300°, respectively. The low pass filter filters the high frequency components of the unfiltered local oscillating signals to generate a plurality of local oscillating signals having phase angles of 0°, 30°, 90°, 120°, 180°, 210°, 270° and 300°, respectively. The modulator modulates a baseband signal with the local oscillating signals, wherein the third harmonics of the local oscillating signals are eliminated by the modulation process of the modulator. The invention also provides a method of modulating a baseband signal.
    • 提供了一种谐波抑制调制装置,其包括相分离器,低通滤波器和调制器。 基于方波,分相器分别产生具有0°,30°,90°,120°,180°,210°,270°和300°的相位角的多个未滤波的本地振荡信号。 低通滤波器对未滤波的本地振荡信号的高频分量进行滤波,以产生具有0°,30°,90°,120°,180°,210°,270°和300°的相位角的多个本地振荡信号 , 分别。 调制器用本地振荡信号调制基带信号,其中通过调制器的调制过程消除本地振荡信号的三次谐波。 本发明还提供一种调制基带信号的方法。
    • 4. 发明授权
    • Harmonic-rejection modulation device
    • 谐波抑制调制装置
    • US07518459B2
    • 2009-04-14
    • US11611256
    • 2006-12-15
    • Nean-Chu ChengYing-Che TsengSen-You LiuDid-Min Shih
    • Nean-Chu ChengYing-Che TsengSen-You LiuDid-Min Shih
    • H04L27/20
    • H04L27/20H03B27/00H03D7/165H03D2200/0086H04L27/2057H04L27/206
    • A harmonic-rejection modulation device is provided, which includes a phase splitter, a low pass filter, and a modulator. Based on a square wave, the phase splitter generates a plurality of unfiltered local oscillating signals having phase angles of 0°, 30°, 90°, 120°, 180°, 210°, 270° and 300°, respectively. The low pass filter filters the high frequency components of the unfiltered local oscillating signals to generate a plurality of local oscillating signals having phase angles of 0°, 30°, 90°, 120°, 180°, 210°, 270° and 300°, respectively. The modulator modulates a baseband signal with the local oscillating signals, wherein the third harmonics of the local oscillating signals are eliminated by the modulation process of the modulator. The invention also provides a method of modulating a baseband signal.
    • 提供了一种谐波抑制调制装置,其包括相分离器,低通滤波器和调制器。 基于方波,分相器分别产生具有0°,30°,90°,120°,180°,210°,270°和300°的相位角的多个未滤波的本地振荡信号。 低通滤波器对未滤波的本地振荡信号的高频分量进行滤波,以产生具有0°,30°,90°,120°,180°,210°,270°和300°的相位角的多个本地振荡信号 , 分别。 调制器用本地振荡信号调制基带信号,其中通过调制器的调制过程消除本地振荡信号的三次谐波。 本发明还提供一种调制基带信号的方法。
    • 5. 发明授权
    • Fractional frequency divider
    • 分数分频器
    • US07492852B1
    • 2009-02-17
    • US11868496
    • 2007-10-07
    • Sen-You Liu
    • Sen-You Liu
    • H03K21/00
    • H03K23/68H03K23/667
    • A divide-by-N/(N+0.5) frequency divider is disclosed. Two pairs of flip-flops are respectively triggered by an input clock and an inverted input clock, and a frequency-dividing selector is used to select one output of the two pairs of flip-flops as frequency-divided output signal. Two latches are respectively triggered by the input clock and the inverted input clock, and a modulus selector is used to select one output of the two latches. A modulus logic circuit determines being in either N frequency-dividing mode or (N+0.5) frequency-dividing mode based on a modulus control signal. A frequency-dividing logic circuit receives output of the modulus logic circuit and an inverted frequency-divided output signal to swallow half the input clock per output cycle in the (N+0.5) frequency-dividing mode, therefore obtaining division resolution of half the input clock.
    • 公开了N /(N + 0.5)分频器。 两对触发器分别由输入时钟和反相输入时钟触发,并且分频选择器用于选择两对触发器的一个输出作为分频输出信号。 两个锁存器分别由输入时钟和反相输入时钟触发,并且使用模数选择器来选择两个锁存器的一个输出。 模数逻辑电路基于模数控制信号确定处于N分频模式或(N + 0.5)分频模式。 分频逻辑电路接收模数逻辑电路的输出和反相分频输出信号,以在(N + 0.5)分频模式中吞吐输入时钟的一半输入周期,从而获得输入的一半的分频分辨率 时钟。
    • 6. 发明授权
    • Communications system with variable load and related method
    • 具有可变负载和相关方法的通信系统
    • US07444122B2
    • 2008-10-28
    • US11669161
    • 2007-01-31
    • Pi-An WuSen-You Liu
    • Pi-An WuSen-You Liu
    • H04B1/04
    • H03L7/18H03C3/225
    • A mobile system has a frequency synthesizer and an amplifier module coupled to the frequency synthesizer. The frequency synthesizer is controlled by frequency division data to generate a tuning signal with a frequency corresponding to a reference signal and the frequency division data. The mobile system provides an input signal based on the frequency of the tuning signal having a frequency spectrum corresponding to the frequency of the tuning signal. The amplifier module has a variable load circuit for providing an equivalent impedance, an amplifier circuit coupled to the variable load circuit for establishing an output signal corresponding to the input signal and the equivalent impedance of the variable load circuit, and a mapping circuit for modifying the equivalent impedance of the variable load circuit based on the frequency division data.
    • 移动系统具有耦合到频率合成器的频率合成器和放大器模块。 频率合成器由分频数据控制,以产生具有对应于参考信号和分频数据的频率的调谐信号。 移动系统基于具有与调谐信号的频率对应的频谱的调谐信号的频率来提供输入信号。 放大器模块具有用于提供等效阻抗的可变负载电路,耦合到可变负载电路的放大器电路,用于建立对应于可变负载电路的输入信号和等效阻抗的输出信号,以及映射电路,用于修改 基于分频数据的可变负载电路的等效阻抗。
    • 7. 发明授权
    • Phase-frequency detector capable of reducing dead zone
    • 相位检测器能够减少死区
    • US07388408B2
    • 2008-06-17
    • US11616031
    • 2006-12-26
    • Sen-You LiuPi-An Wu
    • Sen-You LiuPi-An Wu
    • H03D13/00
    • H03L7/0891H03D13/004
    • A phase-frequency detector generates output signals at a first and a second output end based on input signals received at a first and a second input end. The phase-frequency detector includes two latch circuits, two pulse generators, two inverting circuits, two sensing devices, and a reset control circuit. The sensing devices control the pulse generators based on signals received at corresponding first ends of the sensing devices. The inverting circuits generate signals to the first and second output ends of the phase-frequency detector based on signals received at corresponding first ends of the inverting circuits. The reset control circuit generates reset signals based on signals received at the first and second output ends of the phase-frequency detector.
    • 相位频率检测器基于在第一和第二输入端接收的输入信号在第一和第二输出端产生输出信号。 相位频率检测器包括两个锁存电路,两个脉冲发生器,两个反相电路,两个感测装置和复位控制电路。 感测装置基于在感测装置的相应第一端处接收的信号来控制脉冲发生器。 反相电路基于在反相电路的相应第一端处接收到的信号,向相位 ​​- 频率检测器的第一和第二输出端产生信号。 复位控制电路根据在相位频率检测器的第一和第二输出端接收到的信号产生复位信号。
    • 8. 发明申请
    • COMMUNICATIONS SYSTEM WITH VARIABLE LOAD AND RELATED METHOD
    • 具有可变负载的通信系统及相关方法
    • US20080012648A1
    • 2008-01-17
    • US11669161
    • 2007-01-31
    • Pi-An WuSen-You Liu
    • Pi-An WuSen-You Liu
    • H03L7/00
    • H03L7/18H03C3/225
    • A mobile system has a frequency synthesizer and an amplifier module coupled to the frequency synthesizer. The frequency synthesizer is controlled by frequency division data to generate a tuning signal with a frequency corresponding to a reference signal and the frequency division data. The mobile system provides an input signal based on the frequency of the tuning signal having a frequency spectrum corresponding to the frequency of the tuning signal. The amplifier module has a variable load circuit for providing an equivalent impedance, an amplifier circuit coupled to the variable load circuit for establishing an output signal corresponding to the input signal and the equivalent impedance of the variable load circuit, and a mapping circuit for modifying the equivalent impedance of the variable load circuit based on the frequency division data.
    • 移动系统具有耦合到频率合成器的频率合成器和放大器模块。 频率合成器由分频数据控制,以产生具有对应于参考信号和分频数据的频率的调谐信号。 移动系统基于具有与调谐信号的频率对应的频谱的调谐信号的频率来提供输入信号。 放大器模块具有用于提供等效阻抗的可变负载电路,耦合到可变负载电路的放大器电路,用于建立对应于可变负载电路的输入信号和等效阻抗的输出信号,以及映射电路,用于修改 基于分频数据的可变负载电路的等效阻抗。
    • 9. 发明申请
    • PHASE-FREQUENCY DETECTOR CAPABLE OF REDUCING DEAD ZONE
    • 相位检测器可以减少死区
    • US20070268050A1
    • 2007-11-22
    • US11616031
    • 2006-12-26
    • Sen-You LiuPi-An Wu
    • Sen-You LiuPi-An Wu
    • H03L7/06
    • H03L7/0891H03D13/004
    • A phase-frequency detector generates output signals at a first and a second output end based on input signals received at a first and a second input end. The phase-frequency detector includes two latch circuits, two pulse generators, two inverting circuits, two sensing devices, and a reset control circuit. The sensing devices control the pulse generators based on signals received at corresponding first ends of the sensing devices. The inverting circuits generate signals to the first and second output ends of the phase-frequency detector based on signals received at corresponding first ends of the inverting circuits. The reset control circuit generates reset signals based on signals received at the first and second output ends of the phase-frequency detector.
    • 相位频率检测器基于在第一和第二输入端接收的输入信号在第一和第二输出端产生输出信号。 相位频率检测器包括两个锁存电路,两个脉冲发生器,两个反相电路,两个感测装置和复位控制电路。 感测装置基于在感测装置的相应第一端处接收的信号来控制脉冲发生器。 反相电路基于在反相电路的相应第一端处接收到的信号,向相位 ​​- 频率检测器的第一和第二输出端产生信号。 复位控制电路根据在相位频率检测器的第一和第二输出端接收到的信号产生复位信号。