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1. 发明授权

US07250633B2 Gallium nitride-based light emitting device having ESD protection capacity and method for manufacturing the same 有权
标题翻译：具有ESD保护能力的氮化镓系发光器件及其制造方法
公开(公告)号：US07250633B2
公开(公告)日：2007-07-31
申请号：US11220844
申请日：2005-09-08
申请人： Jun Ho Seo , Suk Kil Yoon , Seung Wan Chae
发明人： Jun Ho Seo , Suk Kil Yoon , Seung Wan Chae
IPC分类号： H01L27/15
CPC分类号： H01L33/04 , H01L27/0248 , H01L27/15 , H01L33/32 , H01L33/38 , H01L33/44 , H01L2933/0016
摘要： A gallium nitride-based light emitting device, and a method for manufacturing the same are disclosed. The light emitting device comprises an n-type GaN-based clad layer, an active layer, a p-type GaN-based clad layer and a p-side electrode sequentially stacked on a substrate. The device further comprises an n-side electrode formed on one region of the n-type GaN-based clad layer, and two or more MIM type tunnel junctions formed on the other regions of the n-type GaN-based clad layer. Each of the MIM type tunnel junctions comprises a lower metal layer formed on the GaN-based clad layer so as to contact the n-type GaN-based clad layer, an insulating film formed on the lower metal layer, and an upper metal layer formed on the insulating film. The device is protected from reverse ESD voltage, so that tolerance to reverse ESD voltage can be enhanced, thereby improving reliability of the device.
摘要翻译：公开了一种氮化镓基发光器件及其制造方法。发光器件包括依次层叠在衬底上的n型GaN基覆盖层，有源层，p型GaN基覆盖层和p侧电极。该器件还包括形成在n型GaN基覆盖层的一个区域上的n侧电极和形成在n型GaN基覆盖层的其它区域上的两个或更多个MIM型隧道结。每个MIM型隧道结包括形成在GaN基覆层上的下金属层，以便接触n型GaN基覆层，形成在下金属层上的绝缘膜和形成的上金属层在绝缘膜上。该器件可防止反向ESD电压，从而可以提高对反向ESD电压的容限，从而提高器件的可靠性。

2. 发明授权

US07645689B2 Gallium nitride-based light emitting device having ESD protection capacity and method for manufacturing the same 失效
标题翻译：具有ESD保护能力的氮化镓系发光器件及其制造方法
公开(公告)号：US07645689B2
公开(公告)日：2010-01-12
申请号：US11812868
申请日：2007-06-22
申请人： Jun Ho Seo , Suk Kil Yoon , Seung Wan Chae
发明人： Jun Ho Seo , Suk Kil Yoon , Seung Wan Chae
IPC分类号： H01L21/20
CPC分类号： H01L33/04 , H01L27/0248 , H01L27/15 , H01L33/32 , H01L33/38 , H01L33/44 , H01L2933/0016
摘要： A gallium nitride-based light emitting device, and a method for manufacturing the same are disclosed. The light emitting device comprises an n-type GaN-based clad layer, an active layer, a p-type GaN-based clad layer and a p-side electrode sequentially stacked on a substrate. The device further comprises an n-side electrode formed on one region of the n-type GaN-based clad layer, and two or more MIM type tunnel junctions formed on the other regions of the n-type GaN-based clad layer. Each of the MIM type tunnel junctions comprises a lower metal layer formed on the GaN-based clad layer so as to contact the n-type GaN-based clad layer, an insulating film formed on the lower metal layer, and an upper metal layer formed on the insulating film. The device is protected from reverse ESD voltage, so that tolerance to reverse ESD voltage can be enhanced, thereby improving reliability of the device.
摘要翻译：公开了一种氮化镓基发光器件及其制造方法。发光器件包括依次层叠在衬底上的n型GaN基覆盖层，有源层，p型GaN基覆盖层和p侧电极。该器件还包括形成在n型GaN基覆盖层的一个区域上的n侧电极和形成在n型GaN基覆盖层的其它区域上的两个或更多个MIM型隧道结。每个MIM型隧道结包括形成在GaN基覆层上的下金属层，以便接触n型GaN基覆层，形成在下金属层上的绝缘膜和形成的上金属层在绝缘膜上。该器件可防止反向ESD电压，从而可以提高对反向ESD电压的容限，从而提高器件的可靠性。

3. 发明授权

US06741136B2 Circuit for preventing system malfunction in semiconductor memory and method thereof 有权
标题翻译：用于防止半导体存储器中的系统故障的电路及其方法
公开(公告)号：US06741136B2
公开(公告)日：2004-05-25
申请号：US10152624
申请日：2002-05-23
申请人： Jun Ho Seo
发明人： Jun Ho Seo
IPC分类号： H03B100
CPC分类号： G11C7/222 , G11C7/22
摘要： A circuit for preventing a system malfunction in a semiconductor memory includes an oscillating circuit generating an oscillating clock signal by receiving an oscillating signal, a system clock generator generating a system clock signal by receiving the oscillating clock signal, and a malfunction preventing unit resetting an inner system by sensing an amplitude variation of the oscillating signal wherein the amplitude variation is caused by noise.
摘要翻译：用于防止半导体存储器中的系统故障的电路包括通过接收振荡信号产生振荡时钟信号的振荡电路，通过接收振荡时钟信号产生系统时钟信号的系统时钟发生器，以及故障防止单元，通过感测振幅信号的振幅变化，其中振幅变化是由噪声引起的。

4. 发明授权

US07148514B2 Nitride semiconductor light emitting diode and fabrication method thereof 有权
标题翻译：氮化物半导体发光二极管及其制造方法
公开(公告)号：US07148514B2
公开(公告)日：2006-12-12
申请号：US10870467
申请日：2004-06-18
申请人： Jun Ho Seo , Jong Ho Jang
发明人： Jun Ho Seo , Jong Ho Jang
IPC分类号： H01L27/15 , H01L29/26 , H01L31/12 , H01L33/00 , H01L29/06
CPC分类号： H01L33/46 , H01L2224/48091 , H01L2224/49107 , H01L2224/73265 , Y10S257/918 , H01L2924/00014
摘要： The invention relates to a nitride semiconductor LED and a fabrication method thereof. In the LED, a first nitride semiconductor layer, an active region a second nitride semiconductor layer of a light emitting structure are formed in their order on a transparent substrate. A dielectric mirror layer is formed on the underside of the substrate, and has at least a pair of alternating first dielectric film of a first refractivity and a second dielectric film of a second refractivity larger than the first refractivity. A lateral insulation layer is formed on the side of the substrate and the light emitting structure. The LED of the invention effectively collimate undesirably-directed light rays, which may be otherwise extinguished, to maximize luminous efficiency, and are protected by the dielectric mirror layer formed on the side thereof to remarkably improve ESD characteristics.
摘要翻译：本发明涉及一种氮化物半导体LED及其制造方法。在LED中，第一氮化物半导体层，有源区，发光结构的第二氮化物半导体层依次形成在透明基板上。电介质镜层形成在衬底的下侧，并且具有至少一对第一折射率的交替的第一介电膜和具有大于第一折射率的第二折射率的第二电介质膜。在基板和发光结构的侧面上形成横向绝缘层。本发明的LED有效地准直了可能被熄灭的不期望的导向的光线，以使发光效率最大化，并且被形成在其侧面上的电介质镜层保护以显着改善ESD特性。

5. 发明授权

US07015731B2 CMOS output buffer circuit 有权
标题翻译： CMOS输出缓冲电路
公开(公告)号：US07015731B2
公开(公告)日：2006-03-21
申请号：US10879301
申请日：2004-06-30
申请人： Jun Ho Seo
发明人： Jun Ho Seo
IPC分类号： H03B1/00
CPC分类号： H03K17/164 , H03K17/145 , H03K2217/0036
摘要： A CMOS output buffer circuit comprises an input unit, a compensation control unit, a first switching unit and a second switching unit. The input unit outputs a data signal in response to a stop signal for determining transmission of the data signal. The compensation control unit determines a power voltage level with reference to the stop signal and the data signal when the data signal is transmitted, and outputs a plurality of compensating signals depending on the power voltage level. The first switching unit including a driving unit driven by the data signal outputted from the input unit and a compensation driving unit driven by combination of the data signal and the plurality of compensating signals compensates change of the power voltage level to output current. The second switching unit operated complementarily with the first switching unit outputs current. Accordingly, the CMOS output buffer circuit supplies a predetermined output current regardless change of a power voltage, thereby reducing power consumption and minimizing overshoot/undershoot noise to stabilize a power supplied to a device.
摘要翻译： CMOS输出缓冲电路包括输入单元，补偿控制单元，第一开关单元和第二开关单元。输入单元响应用于确定数据信号的发送的停止信号输出数据信号。补偿控制单元在发送数据信号时参考停止信号和数据信号来确定电源电压电平，并根据电源电压电平输出多个补偿信号。第一开关单元包括由从输入单元输出的数据信号驱动的驱动单元和通过数据信号和多个补偿信号的组合驱动的补偿驱动单元补偿电力电压电平变化为输出电流。与第一开关单元互补地操作的第二开关单元输出电流。因此，CMOS输出缓冲电路不管电源电压的变化而提供预定的输出电流，从而降低功耗并最小化过冲/下冲噪声，以稳定提供给器件的功率。

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