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1. 发明授权

US08138008B1 Forming an oxide MEMS beam 有权
标题翻译：形成氧化物MEMS光束
公开(公告)号：US08138008B1
公开(公告)日：2012-03-20
申请号：US12955224
申请日：2010-11-29
申请人： Joseph P. Hasselbach , Karen L. Lestage , Anthony K. Stamper
发明人： Joseph P. Hasselbach , Karen L. Lestage , Anthony K. Stamper
IPC分类号： H01L21/00
CPC分类号： B81C1/00666 , B81B2203/0118 , B81C1/00111
摘要： Solutions for forming a semiconductor including an oxide MEMS beam are disclosed. In one embodiment, a method of forming a beam within a sealed cavity includes: depositing a lower insulator layer comprising one or more layers; depositing an upper insulator layer over the first insulator layer, the upper insulator layer comprising one or more layers, wherein a composite stress of the upper insulator layer is different than a composite stress of the lower insulator layer.
摘要翻译：公开了用于形成包括氧化物MEMS光束的半导体的解决方案。在一个实施例中，在密封空腔内形成梁的方法包括：沉积包括一层或多层的下绝缘体层; 在所述第一绝缘体层上沉积上绝缘体层，所述上绝缘体层包括一层或多层，其中所述上绝缘体层的复合应力不同于所述下绝缘体层的复合应力。

2. 发明申请

US20120133006A1 OXIDE MEMS BEAM 审中-公开
标题翻译：氧化物MEMS光束
公开(公告)号：US20120133006A1
公开(公告)日：2012-05-31
申请号：US12955220
申请日：2010-11-29
申请人： Joseph P. Hasselbach , Karen L. Lestage , Anthony K. Stamper
发明人： Joseph P. Hasselbach , Karen L. Lestage , Anthony K. Stamper
IPC分类号： H01L29/84
CPC分类号： H01G5/18 , B81B3/0072 , B81B2203/0118 , B81C2201/0167 , H01G5/16
摘要： In one embodiment, a semiconductor structure includes a beam positioned within a sealed cavity, the beam including: an upper insulator layer including one or more layers; and a lower insulator layer including one or more layers, wherein a composite stress of the upper insulator layer is different than a composite stress of the lower insulator layer, such that the beam bends.
摘要翻译：在一个实施例中，半导体结构包括位于密封空腔内的光束，所述光束包括：包括一层或多层的上绝缘体层; 以及包括一层或多层的下绝缘体层，其中上绝缘体层的复合应力不同于下绝缘体层的复合应力，使得光束弯曲。

3. 发明申请

US20120161255A1 SEALED MEMS CAVITY AND METHOD OF FORMING SAME 审中-公开
标题翻译：密封MEMS密封圈及其形成方法
公开(公告)号：US20120161255A1
公开(公告)日：2012-06-28
申请号：US12979592
申请日：2010-12-28
申请人： Thomas H. Gabert , Joseph P. Hasselbach , Anthony K. Stamper
发明人： Thomas H. Gabert , Joseph P. Hasselbach , Anthony K. Stamper
IPC分类号： H01L29/84 , H01L21/48
CPC分类号： B81C1/00293 , B81C2203/0145
摘要： Embodiments of the invention provide methods of sealing a micro electromechanical systems (MEMS) cavity and devices resulting therefrom. A first aspect of the invention provides a method of sealing a micro electromechanical systems (MEMS) cavity in a substrate, the method comprising: forming in a substrate a cavity filled with a sacrificial material; forming a lid over the cavity; forming at least one vent hole over the lid extending to the cavity; removing the sacrificial material from the cavity; depositing a first material onto the lid such that a size of at least one vent hole at a surface of the substrate is reduced but not sealed; and depositing a second material onto the first material to seal the at least one vent hole, wherein a MEMS cavity within the substrate and beneath the at least one vent hole substantially retains a pressure at which the at least one vent hole is sealed by the second material.
摘要翻译：本发明的实施例提供了密封微机电系统（MEMS）腔和由此产生的装置的方法。本发明的第一方面提供了一种密封衬底中的微机电系统（MEMS）空腔的方法，所述方法包括：在衬底中形成填充有牺牲材料的腔体; 在空腔上形成盖子; 在所述盖上形成延伸到所述空腔的至少一个通气孔; 从腔中去除牺牲材料; 将第一材料沉积到所述盖上，使得所述基板的表面处的至少一个通气孔的尺寸减小但不被密封; 以及将第二材料沉积到所述第一材料上以密封所述至少一个通气孔，其中所述基底内的MEMS空腔和所述至少一个通气孔下方基本上保持所述至少一个通气孔被所述第二通气孔密封的压力材料。

4. 发明授权

US09058455B2 Backside integration of RF filters for RF front end modules and design structure 有权
标题翻译：用于RF前端模块的RF滤波器的背面集成和设计结构
公开(公告)号：US09058455B2
公开(公告)日：2015-06-16
申请号：US13354705
申请日：2012-01-20
申请人： James W. Adkisson , Panglijen Candra , Thomas J. Dunbar , Jeffrey P. Gambino , Mark D. Jaffe , Anthony K. Stamper , Randy L. Wolf
发明人： James W. Adkisson , Panglijen Candra , Thomas J. Dunbar , Jeffrey P. Gambino , Mark D. Jaffe , Anthony K. Stamper , Randy L. Wolf
IPC分类号： G06F17/50 , H01L21/768 , H01L23/48 , H03H9/64 , H01L23/00 , H01L27/06 , H01L49/02 , H01L23/66 , H01L25/16
CPC分类号： H01L41/293 , G06F17/5063 , G06F17/5068 , H01L21/76898 , H01L23/481 , H01L23/66 , H01L24/03 , H01L24/05 , H01L24/24 , H01L25/16 , H01L27/0694 , H01L28/40 , H01L41/0815 , H01L41/25 , H01L2224/03009 , H01L2224/0401 , H01L2224/04105 , H01L2224/0557 , H01L2224/05572 , H01L2224/06181 , H01L2224/12105 , H01L2224/14181 , H01L2224/16145 , H01L2224/24145 , H01L2225/06548 , H03H9/64
摘要： A design structure for an integrated radio frequency (RF) filter on a backside of a semiconductor substrate includes: a device on a first side of a substrate; a radio frequency (RF) filter on a backside of the substrate; and at least one substrate conductor extending from the front side of the substrate to the backside of the substrate and electrically coupling the RF filter to the device.
摘要翻译：在半导体衬底的背面上的集成射频（RF）滤波器的设计结构包括：在衬底的第一侧上的器件; 在衬底的背面上的射频（RF）滤波器; 以及至少一个衬底导体，其从所述衬底的前侧延伸到所述衬底的所述背面并将所述RF滤波器电耦合到所述器件。

5. 发明授权

US08973250B2 Methods of manufacturing a micro-electro-mechanical system (MEMS) structure 有权
标题翻译：制造微电子机械系统（MEMS）结构的方法
公开(公告)号：US08973250B2
公开(公告)日：2015-03-10
申请号：US13164323
申请日：2011-06-20
申请人： Christopher V. Jahnes , Anthony K. Stamper
发明人： Christopher V. Jahnes , Anthony K. Stamper
IPC分类号： H04R31/00 , B81B3/00 , B81C1/00 , B81B7/00 , H01L41/113 , H01L41/09
CPC分类号： B81B3/001 , B81B3/0021 , B81B3/0059 , B81B3/0072 , B81B7/0006 , B81B7/008 , B81B2201/016 , B81B2203/0163 , B81C1/00015 , B81C1/0015 , B81C1/00476 , G06F17/5045 , H01L41/094 , H01L41/1134 , H01L41/1138 , Y10T29/49002 , Y10T29/49005 , Y10T29/4908 , Y10T29/49121
摘要： Micro-Electro-Mechanical System (MEMS) structures, methods of manufacture and design structures are provided. The method of forming a MEMS structure includes forming a wiring layer on a substrate comprising actuator electrodes and a contact electrode. The method further includes forming a MEMS beam above the wiring layer. The method further includes forming at least one spring attached to at least one end of the MEMS beam. The method further includes forming an array of mini-bumps between the wiring layer and the MEMS beam.
摘要翻译：提供微机电系统（MEMS）结构，制造方法和设计结构。形成MEMS结构的方法包括在包括致动器电极和接触电极的基板上形成布线层。该方法还包括在布线层上方形成MEMS光束。该方法还包括形成至少一个连接到MEMS梁的至少一端的弹簧。该方法还包括在布线层和MEMS光束之间形成微小凸块的阵列。

6. 发明授权

US08865497B2 Planar cavity MEMS and related structures, methods of manufacture and design structures 有权
标题翻译：平面腔MEMS及相关结构，制造方法和设计结构
公开(公告)号：US08865497B2
公开(公告)日：2014-10-21
申请号：US12973422
申请日：2010-12-20
申请人： George A. Dunbar, III , Zhong-Xiang He , Jeffrey C. Maling , William J. Murphy , Anthony K. Stamper
发明人： George A. Dunbar, III , Zhong-Xiang He , Jeffrey C. Maling , William J. Murphy , Anthony K. Stamper
IPC分类号： H01L29/84 , B81C1/00 , B81B3/00 , G06F17/50 , H01H57/00
CPC分类号： B81B3/0072 , B81B3/0021 , B81B2201/01 , B81B2201/014 , B81B2203/0118 , B81B2203/0315 , B81B2203/04 , B81C1/0015 , B81C1/00365 , B81C1/00476 , B81C1/00619 , B81C1/00626 , B81C1/00666 , B81C2201/0109 , B81C2201/013 , B81C2201/0167 , B81C2201/017 , B81C2203/0136 , B81C2203/0172 , G06F17/5068 , G06F17/5072 , H01H1/0036 , H01H57/00 , H01H59/0009 , H01H2057/006 , H01L41/1136 , H01L2924/0002 , Y10S438/937 , Y10T29/42 , Y10T29/435 , Y10T29/49002 , Y10T29/49105 , Y10T29/49121 , Y10T29/49126 , Y10T29/4913 , Y10T29/49155 , Y10T29/5313 , H01L2924/00
摘要： A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires from the lower wiring layer. The method further includes forming an electrode beam over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition.
摘要翻译：形成至少一个微机电系统（MEMS）的方法包括在基板上形成下布线层。该方法还包括从下布线层形成多条分立布线。该方法还包括在多个离散导线上形成电极束。形成电极束和多个离散导线中的至少一个形成有最小化后续硅沉积中的小丘和三点的布局。

7. 发明授权

US08829518B2 Test structure and calibration method 有权
标题翻译：测试结构和校准方法
公开(公告)号：US08829518B2
公开(公告)日：2014-09-09
申请号：US13231516
申请日：2011-09-13
申请人： Jeffrey C. Maling , Anthony K. Stamper , Eric J. White
发明人： Jeffrey C. Maling , Anthony K. Stamper , Eric J. White
IPC分类号： H01L29/10
CPC分类号： B81C99/004
摘要： A test structure for measuring a Micro-Electro-Mechanical System (MEMS) cavity height structure and calibration method. The method includes forming a sacrificial cavity material over a plurality of electrodes and forming an opening into the sacrificial cavity material. The method further includes forming a transparent or substantially transparent material in the opening to form a transparent or substantially transparent window. The method further includes tuning a thickness of the sacrificial cavity material based on measurements obtained through the transparent or substantially transparent window.
摘要翻译：用于测量微机电系统（MEMS）腔体高度结构和校准方法的测试结构。该方法包括在多个电极上形成牺牲腔材料并在牺牲腔材料中形成开口。该方法还包括在开口中形成透明或基本上透明的材料以形成透明或基本上透明的窗口。该方法还包括基于通过透明或基本上透明的窗口获得的测量值调整牺牲腔材料的厚度。

8. 发明授权

US08791545B2 Interconnect structures and design structures for a radiofrequency integrated circuit 有权
标题翻译：射频集成电路的互连结构和设计结构
公开(公告)号：US08791545B2
公开(公告)日：2014-07-29
申请号：US13560446
申请日：2012-07-27
申请人： Timothy J. Dalton , Ebenezer E. Eshun , Sarah L. Grunow , Zhong-Xiang He , Anthony K. Stamper
发明人： Timothy J. Dalton , Ebenezer E. Eshun , Sarah L. Grunow , Zhong-Xiang He , Anthony K. Stamper
IPC分类号： H01L21/02
CPC分类号： H01L21/76885 , H01L21/76816 , H01L21/76832 , H01L21/76834 , H01L27/016 , H01L28/20 , H01L28/40
摘要： Interconnect structures that include a passive element, such as a thin film resistor or a metal-insulator-metal (MIM) capacitor, methods for fabricating an interconnect structure that includes a passive element, and design structures embodied in a machine readable medium for designing, manufacturing, or testing an integrated circuit, such as a radiofrequency integrated circuit. A top surface of a dielectric layer is recessed relative to a top surface of a conductive feature in the dielectric layer. The passive element is formed on the recessed top surface of the dielectric layer and includes a layer of a conductive material that is coplanar with, or below, the top surface of the conductive feature.
摘要翻译：包括诸如薄膜电阻器或金属 - 绝缘体 - 金属（MIM）电容器的无源元件的互连结构，用于制造包括无源元件的互连结构的方法，以及体现在机器可读介质中的设计结构，用于设计，制造或测试诸如射频集成电路的集成电路。电介质层的顶表面相对于电介质层中导电特征的顶表面凹陷。无源元件形成在介电层的凹入的顶表面上，并且包括与导电特征的顶表面共面或低于导电特征的顶表面的导电材料层。

9. 发明授权

US08569888B2 Wiring structure and method of forming the structure 有权
标题翻译：布线结构及形成方法
公开(公告)号：US08569888B2
公开(公告)日：2013-10-29
申请号：US13114079
申请日：2011-05-24
申请人： Fen Chen , Jeffrey P. Gambino , Anthony K. Stamper , Timothy D. Sullivan
发明人： Fen Chen , Jeffrey P. Gambino , Anthony K. Stamper , Timothy D. Sullivan
IPC分类号： H01L23/48 , H01L21/4763
CPC分类号： H01L21/76816 , H01L21/76843 , H01L23/5283 , H01L23/53223 , H01L23/53238 , H01L23/5329 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Disclosed is a wiring structure and method of forming the structure with a conductive diffusion barrier layer having a thick upper portion and thin lower portion. The thicker upper portion is located at the junction between the wiring structure and the adjacent dielectric materials. The thicker upper portion: (1) minimizes metal ion diffusion and, thereby TDDB; (2) allows a wire width to dielectric space width ratio that is optimal for low TDDB to be achieved at the top of the wiring structure; and (3) provides a greater surface area for via landing. The thinner lower portion: (1) allows a different wire width to dielectric space width ratio to be maintained in the rest of the wiring structure in order to balance other competing factors; (2) allows a larger cross-section of wire to reduce current density and, thereby reduce EM; and (3) avoids an increase in wiring structure resistivity.
摘要翻译：公开了一种具有导电扩散阻挡层的结构的布线结构和方法，所述导电扩散阻挡层具有较厚的上部和较薄的下部。较厚的上部位于布线结构和相邻电介质材料之间的接合处。较厚的上部：（1）最小化金属离子扩散，从而使TDDB; （2）允许在布线结构的顶部实现对于低TDDB最佳的电线宽度与电介质空间宽度比; 和（3）为通孔着陆提供更大的表面积。较薄的下部：（1）允许在布线结构的其余部分中保持不同的导线宽度与电介质空间宽度比，以平衡其他竞争因素; （2）允许更大的导线截面减小电流密度，从而减少EM; 和（3）避免了布线结构电阻率的增加。

10. 发明申请

US20130256758A1 INTEGRATED CIRCUIT STRUCTURE HAVING AIR-GAP TRENCH ISOLATION AND RELATED DESIGN STRUCTURE 有权
标题翻译：具有空气阻隔层分离的集成电路结构及相关设计结构
公开(公告)号：US20130256758A1
公开(公告)日：2013-10-03
申请号：US13436045
申请日：2012-03-30
申请人： Renata A. Camillo-Castillo , James S. Dunn , David L. Harame , Anthony K. Stamper
发明人： Renata A. Camillo-Castillo , James S. Dunn , David L. Harame , Anthony K. Stamper
IPC分类号： H01L29/737 , H01L21/764
CPC分类号： H01L29/0649 , H01L21/76224 , H01L21/764 , H01L29/737
摘要： A method of forming an integrated circuit structure includes: forming a vent via extending through a shallow trench isolation (STI) and into a substrate; selectively removing an exposed portion of the substrate at a bottom of the vent via to form an opening within the substrate, wherein the opening within the substrate abuts at least one of a bottom surface or a sidewall of the STI; and sealing the vent via to form an air gap in the opening within the substrate.
摘要翻译：形成集成电路结构的方法包括：通过延伸通过浅沟槽隔离（STI）形成通气孔并进入衬底; 在所述通气孔的底部选择性地去除所述衬底的暴露部分以在所述衬底内形成开口，其中所述衬底内的所述开口邻接所述STI的底表面或侧壁中的至少一个; 并密封通气孔以在基底内的开口中形成气隙。

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