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    • 1. 发明授权
    • Input buffer circuit for transforming pseudo differential signals into full differential signals
    • 输入缓冲电路,用于将伪差分信号变换为全差分信号
    • US06456122B1
    • 2002-09-24
    • US09899223
    • 2001-07-06
    • Joon-young ParkChang-sik YooKee-wook JungWon-chan Kim
    • Joon-young ParkChang-sik YooKee-wook JungWon-chan Kim
    • G11C706
    • H03K3/35613H03K5/2481H03K19/01721H03K19/018528
    • An input buffer circuit for transforming pseudo differential input signals into full differential output signals wherein, the input buffer circuit includes a pull-up current source, two pull-down current sources, a differential input portion, and a positive feedback portion. The pull-up current source is formed of two PMOS transistors which are always in an “on” state, and provides an electric current. The two pull-down current sources are each formed of an NMOS transistor, which are always in an on state, and sink a pull-up electric current. The differential input portion is formed of two NMOS transistors, and receives an input signal and a reference signal, respectively. The positive feedback portion is formed of two NMOS transistors, and enlarges a voltage difference between two output terminals of the input circuit using positive feedback.
    • 一种用于将伪差分输入信号变换为全差分输出信号的输入缓冲电路,其中,输入缓冲电路包括上拉电流源,两个下拉电流源,差分输入部分和正反馈部分。 上拉电流源由总是处于“导通”状态的两个PMOS晶体管形成,并且提供电流。 两个下拉电流源各自由NMOS晶体管形成,它们总是处于导通状态,并且吸收上拉电流。 差分输入部分由两个NMOS晶体管构成,分别接收输入信号和参考信号。 正反馈部分由两个NMOS晶体管形成,并且使用正反馈放大输入电路的两个输出端之间的电压差。